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81. 发明申请

WO2006050185A2 AUTOMATED ACCESS NETWORK CROSS-CONNECT SYSTEM 审中-公开
标题翻译：自动访问网络交叉连接系统
公开(公告)号：WO2006050185A2
公开(公告)日：2006-05-11
申请号：PCT/US2005039118
申请日：2005-10-28
申请人： UTSTARCOM INC , KELLIHER TIMOTHY
发明人： KELLIHER TIMOTHY
IPC分类号： H04M3/00 , H04M1/00 , H04M5/00 , H04M7/00 , H04M9/00
CPC分类号： H04Q3/5455 , H04Q11/0067 , H04Q2011/0033 , H04Q2011/0039 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13076 , H04Q2213/13106 , H04Q2213/13141 , H04Q2213/13214 , H04Q2213/13292 , H04Q2213/13302 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/1336
摘要： A system for automating cross connections in an access network. The automated cross connect system comprises of a plurality of upstream line interface circuits adapted for connection to upstream communication links, and a plurality of downstream line interface circuits adapted for connection to downstream communication links. The upstream and downstream line interface circuits are interconnected by an automated cross connect switch that selectively couples particular upstream line interface circuits to particular downstream line interface circuits, in response to routing commands sent from a command center. Thus, the automated cross connect system selectively establishes a bi-directional communication path between the upstream line interface circuits and the downstream line interface circuits, thereby providing a communication path between a selected upstream communication link and downstream communication link. The automated cross connect switch may be implemented in either a space or time multiplexing devices, such as a physical layer router, which comprises an array of cross connected multiplexers, or a time domain multiplexer switch, which composes an array of serializers connected to a time division multiplexed bus.
摘要翻译：用于在接入网络中自动进行交叉连接的系统。自动交叉连接系统包括适于连接到上游通信链路的多个上游线路接口电路，以及适于连接到下游通信链路的多个下游线路接口电路。上游和下游线路接口电路通过自动交叉连接交换机互连，自动交叉连接交换机响应于从命令中心发送的路由命令，将特定的上游线路接口电路选择性地耦合到特定的下游线路接口电路。因此，自动交叉连接系统选择性地在上游线路接口电路和下游线路接口电路之间建立双向通信路径，由此提供所选择的上游通信链路和下游通信链路之间的通信路径。自动交叉连接开关可以在空间或时间复用设备中实现，例如物理层路由器，其包括交叉连接的多路复用器阵列或时域多路复用器开关，其构成连接到时间的串行器阵列多路复用总线。

82. 发明申请

WO2003034244A1 DATA STRUCTURE FOR DATA TRANSMISSION ON A TIME DIVISION MULTIPLEXED BUS 审中-公开
标题翻译：数据传输在时分多路复用总线上的数据结构
公开(公告)号：WO2003034244A1
公开(公告)日：2003-04-24
申请号：PCT/US2002/032610
申请日：2002-10-11
申请人： INTEL CORPORATION
发明人： PALOMINO ECHARTEA, Jesus , LOPEZ, Guillermo , SUZUKI, Shiro
IPC分类号： G06F13/372
CPC分类号： H04L12/40032 , H04L49/90 , H04Q2213/1305 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13166 , H04Q2213/13174 , H04Q2213/13204 , H04Q2213/13214 , H04Q2213/13292 , H04Q2213/13299
摘要： A memory stores data for transfer over a bus by a computer program that operates according to a bus frame protocol. The memory includes a data structure stored in the memory. The data structure includes a matrix having blocks arranged in N rows and M columns, where N and M are integers that are greater than one. A block of the matrix includes data used with the bus frame protocol and corresponds to a destination port and a time slot for the data.
摘要翻译：存储器通过根据总线帧协议操作的计算机程序通过总线存储用于传送的数据。存储器包括存储在存储器中的数据结构。数据结构包括具有排列成N行和M列的块的矩阵，其中N和M是大于1的整数。矩阵的块包括与总线帧协议一起使用的数据，并且对应于数据的目的地端口和时隙。

83. 发明申请

WO2002091757A1 A SCHEDULING METHOD OF REALIZING THE QUALITY OF SERVICE OF ROUTER IN INTEGRATED SERVICE 审中-公开
公开(公告)号：WO2002091757A1
公开(公告)日：2002-11-14
申请号：PCT/CN2002/000150
申请日：2002-03-13
IPC分类号： H04Q3/64
CPC分类号： H04Q3/66 , H04Q2213/13103 , H04Q2213/13141 , H04Q2213/13166 , H04Q2213/13196 , H04Q2213/13213 , H04Q2213/13214
摘要： The invention discloses a scheduling method of realizing the quality of service of router in integrated service. In this method, the classified data packet is inserted into three different service queue through enqueue process; in accordance with set virtual clock, a guarantee rate clock value for deciding sequence is counted when the classified data packet should be transmited ; and in dequeue course, the Value is used and the different processing method are adopted in three queue to transmit data packets, thus the equity and effieciency of scheduling is improved.

84. 发明申请

WO00008872A2 NETWORK OF COUPLED DATA UNITS IN A DIGITAL SWITCHING SYSTEM 审中-公开
标题翻译：在数字交换系统连接网络的数据单元
公开(公告)号：WO00008872A2
公开(公告)日：2000-02-17
申请号：PCT/DE1999/002444
申请日：1999-08-04
IPC分类号： H04Q11/04 , H04Q3/00
CPC分类号： H04Q11/0407 , H04Q2213/13093 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13107 , H04Q2213/13204 , H04Q2213/13214 , H04Q2213/1329 , H04Q2213/13336 , H04Q2213/1334 , H04Q2213/13393
摘要： Conventional digital switching systems have message buffers that possess a number of processors forming a store and forward network. Messages forwarded via switches can be sent from and to processors in such a network. A switch is required to have a message store since messages are sent irrespective of the ready-to-receive state of the receiver and irrespective of the availability of all line sections. The aim of the invention is to provide a network that can dispense with the storage of messages in the switch. The invention relates to a network of data units that are coupled and transmit messages to each other in a digital switching system, whereby the send data unit and the receive data unit comprise means for performing handshakes and the switch contains means (46) for reserving a data path in response to a handshake. The invention further relates to switching systems, especially message buffers contained therein.
摘要翻译：传统的数字交换系统具有消息分布，这有一个数字，形成存储和转发网络处理器。在这样的网络消息从和到通过开关路由处理器发送。因为消息被接收者和所有部分的可用性的接受性而不管发送，开关必须具有消息存储。本发明具有的目的是提供在其中存储的消息中的开关不是必需的网络。根据本发明，提供了一种与网络耦合的经由数据单元介质中的数字交换系统，其中的数据的发送器单元和所述接收器的数据单元包括用于用于保留一数据路径中执行握手和开关装置（46）的装置，以彼此的消息包括：响应于握手。数字交换系统，在他们的新闻发布包含尤其如此。

85. 发明申请

WO99038351A1 APPARATUS AND METHOD FOR DIGITAL TELEPHONY 审中-公开
标题翻译：数字电话的装置和方法
公开(公告)号：WO99038351A1
公开(公告)日：1999-07-29
申请号：PCT/IL1999/000041
申请日：1999-01-24
IPC分类号： H04M11/06 , H04Q11/04
CPC分类号： H04Q11/04 , H04M11/068 , H04Q2213/13034 , H04Q2213/13107 , H04Q2213/13199 , H04Q2213/13214 , H04Q2213/13292 , H04Q2213/1336 , H04Q2213/13381 , H04Q2213/13396
摘要： A telecommunications system including an at least partially digital telephone link having an analog end portion, first and second modems disposed along the link, and analog/digital devices disposed along the link intermediate the modems which are operative to support communications between the first and second modems substantially at bit rates in excess of 28.8 Kbps.
摘要翻译：一种电信系统，包括具有模拟端部分的至少部分数字电话链路，沿该链路设置的第一和第二调制解调器以及沿调制解调器中间的链路设置的模拟/数字设备，其可操作以支持第一和第二调制解调器之间的通信基本上以超过28.8 Kbps的比特率。

86. 发明申请

WO1998015123A1 APPARATUS, METHOD AND SYSTEM FOR WIRELINE AUDIO AND VIDEO CONFERENCING AND TELEPHONY 审中-公开
标题翻译：电视音视频和视频会议和电视的装置，方法和系统
公开(公告)号：WO1998015123A1
公开(公告)日：1998-04-09
申请号：PCT/US1997017869
申请日：1997-10-01
申请人： MOTOROLA INC.
发明人： MOTOROLA INC. , BURKE, Timothy, M. , NEWLIN, Douglas
IPC分类号： H04N07/14
CPC分类号： H04N7/148 , H04M3/56 , H04Q11/0457 , H04Q2213/13003 , H04Q2213/13034 , H04Q2213/13093 , H04Q2213/13097 , H04Q2213/13103 , H04Q2213/13107 , H04Q2213/13176 , H04Q2213/1319 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/13214 , H04Q2213/1324 , H04Q2213/1332 , H04Q2213/13332 , H04Q2213/13337 , H04Q2213/13396
摘要： A video access apparatus (110, 150) provides for audio and video teleconferencing and telephony via a first communication channel (103) having communication with a network (140), such as the public switched telephone network or an ISDN network. The video access apparatus (110) includes a wireline network interface (210) for reception of a first protocol signal to form a received protocol signal and for transmission of a second protocol signal to form a transmitted protocol signal; a radio frequency modulator/demodulator (205) to convert a baseband output video signal to a radio frequency output video signal and to convert a radio frequency input video signal to a baseband input video signal; a user interface (215) for reception of a first control signal of a plurality of control signals; and a processor arrangement (190) responsive, through a set of program instructions, and in respone to the first control signal, to convert the received protocol signal to the baseband output video signal and to an output audio signal, and to convert the baseband input video signal and an input audio signal to the second protocol signal.
摘要翻译：视频访问装置（110,150）经由具有与诸如公共交换电话网络或ISDN网络的网络（140）通信的第一通信信道（103）来提供音频和视频电话会议和电话。视频接入装置（110）包括有线网络接口（210），用于接收第一协议信号以形成接收到的协议信号，并传输第二协议信号以形成发送的协议信号; 射频调制器/解调器（205），用于将基带输出视频信号转换为射频输出视频信号，并将射频输入视频信号转换为基带输入视频信号; 用于接收多个控制信号的第一控制信号的用户接口（215）; 以及处理器装置（190），其通过一组程序指令响应于所述第一控制信号，将接收到的协议信号转换为基带输出视频信号和输出音频信号，并将基带输入视频信号和到第二协议信号的输入音频信号。

87. 发明申请

WO1993005483A1 TELEPHONIC-INTERFACE LOTTERY SYSTEM 审中-公开
标题翻译：电话接口系统
公开(公告)号：WO1993005483A1
公开(公告)日：1993-03-18
申请号：PCT/US1992007241
申请日：1992-08-26
申请人： FIRST DATA RESOURCES INC.
发明人： FIRST DATA RESOURCES INC. , KATZ, Ronald, A.
IPC分类号： G07C15/00
CPC分类号： G07F17/32 , A63F3/0665 , A63F3/081 , A63F2003/086 , A63F2009/242 , G07C11/00 , G07C15/005 , G07C15/006 , G07C2011/04 , G07F17/3248 , H04M3/36 , H04M3/38 , H04M3/42 , H04M3/42059 , H04M3/436 , H04M3/46 , H04M3/493 , H04M3/51 , H04M11/00 , H04M2201/40 , H04M2203/1066 , H04M2203/2016 , H04M2242/22 , H04Q3/0016 , H04Q3/002 , H04Q3/54533 , H04Q3/5455 , H04Q3/54591 , H04Q3/665 , H04Q3/72 , H04Q3/74 , H04Q2213/13034 , H04Q2213/13072 , H04Q2213/1309 , H04Q2213/13091 , H04Q2213/13093 , H04Q2213/13095 , H04Q2213/13096 , H04Q2213/13097 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13107 , H04Q2213/1313 , H04Q2213/13141 , H04Q2213/1316 , H04Q2213/13173 , H04Q2213/13174 , H04Q2213/13175 , H04Q2213/13178 , H04Q2213/13204 , H04Q2213/13213 , H04Q2213/13214 , H04Q2213/13216 , H04Q2213/1322 , H04Q2213/13256 , H04Q2213/1328 , H04Q2213/1332 , H04Q2213/1333 , H04Q2213/13349 , H04Q2213/1337 , H04Q2213/13375 , H04Q2213/13376 , H04Q2213/13377 , H04Q2213/13405 , Y10S379/903
摘要： A telephonic-interface lottery system (D) interfaces with a multiplicity of individual terminals (T1-Tn) of a telephone network facility (C) to enable lottery players to call and play for at least one additional chance to possibly win by dialing a pay-to-dial telephone number indicated on a "scratch-off" or online game lottery ticket (LT) for use in the system. At the terminals (T1-Tn), callers are prompted by voice-generated instructions to provide digital data, such as their telephone number, age, social security number, and/or drivers license number. In addition, the sequence number of the caller as well as the date and time of the call is recorded for positive association with a caller and is stored for processing. The caller's identification data is confirmed using various techniques and callers may be ranked and accounted for on the basis of entitlement and sequence. In accordance with one format, an instant winner is selected online by utilizing techniques such as determining a random winning sequence number or a winning lottery number generated by a number generator. As an adjunct or alternative, the identification data is processed at a later time to determine a grand prize drawing winner by using various processing techniques for determining winners.
摘要翻译：电话接口彩票系统（D）与电话网络设施（C）的多个单独终端（T1-Tn）接口，以使得彩票玩家可以通过拨打付款至少一个额外的机会进行呼叫和播放在“刮刮”或在线游戏彩票（LT）上指示的在系统中使用的拨号电话号码。在终端（T1-Tn），通过语音产生的指令提示呼叫者提供数字数据，例如他们的电话号码，年龄，社会安全号码和/或驾驶执照号码。此外，呼叫者的序列号以及呼叫的日期和时间被记录为与呼叫者的正相关，并被存储用于处理。使用各种技术确认呼叫者的识别数据，并且呼叫者可以根据授权和序列进行排名和考虑。根据一种格式，通过利用诸如确定由数字发生器产生的随机获胜序列号或获胜彩票号码的技术在线选择即时赢家。作为附件或替代方案，识别数据在稍后的时间被处理以通过使用各种处理技术来确定获奖者来确定大奖得主。

88. 发明授权

US07827428B2 System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture 有权
标题翻译：用于在多层全图互连架构中提供集群范围的系统时钟的系统
公开(公告)号：US07827428B2
公开(公告)日：2010-11-02
申请号：US11848440
申请日：2007-08-31
申请人： Lakshminarayana B. Arimilli , Ravi K. Arimilli , Bernard C. Drerup , Jody B. Joyner , Jerry D. Lewis
发明人： Lakshminarayana B. Arimilli , Ravi K. Arimilli , Bernard C. Drerup , Jody B. Joyner , Jerry D. Lewis
IPC分类号： G06F1/00 , G06F1/04 , G06F1/12
CPC分类号： G06F1/12 , H04J3/0685 , H04Q2213/13092 , H04Q2213/13214 , H04Q2213/13322 , H04Q2213/1336
摘要： A system for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are generated in each of the processor chips based on the synchronized heartbeat signals. As a result, the internal system clock signals of each of the processor chips are synchronized since the heartbeat signals, that are the basis for the internal system clock signals, are synchronized. Mechanisms are provided for performing such synchronization using direct couplings of processor chips within the same processor book, different processor books in the same supernode, and different processor books in different supernodes of the MTFG interconnect architecture.
摘要翻译：提供了一种用于在多层全图（MTFG）互连架构中提供集群范围的系统时钟的系统。计算群集中的每个处理器芯片发送的心跳信号同步。基于同步的心跳信号，在每个处理器芯片中产生内部系统时钟信号。结果，每个处理器芯片的内部系统时钟信号被同步，因为作为内部系统时钟信号的基础的心跳信号被同步。提供了用于使用同一处理器书中的处理器芯片的直接耦合，同一超级节点中的不同处理器书以及MTFG互连体系结构的不同超节点中的不同处理器簿来执行这种同步的机制。

89. 发明申请

US20090119535A1 Method and apparatus for managing network synchronization information among multiple line cards 有权
标题翻译：用于管理多个线路卡之间的网络同步信息的方法和装置
公开(公告)号：US20090119535A1
公开(公告)日：2009-05-07
申请号：US12283048
申请日：2008-09-09
申请人： Adrian Grah , Steven G. Driediger , John S. Gryba , Michel Rochon
发明人： Adrian Grah , Steven G. Driediger , John S. Gryba , Michel Rochon
IPC分类号： G06F1/04
CPC分类号： G06F1/10 , H04J3/0688 , H04Q2213/13003 , H04Q2213/13167 , H04Q2213/13214 , H04Q2213/1332 , H04Q2213/1336
摘要： A method and apparatus for handling, maintaining, and controlling network synchronization information emanating from a plurality of line card circuits is described. The technique described may be applied to a redundant pair of line card circuits, where one line card circuit is active, while the other is inactive. Line card activity latches are managed by means of hardware logic that may be configured at the time of line card commissioning. The activity latches are coupled to a logic element. An incoming clock signal is applied to the logic element. If an activity latch indicates that a line card circuit is active, the logic element provides the incoming clock signal as an outgoing clock signal to a control card circuit. If the activity latch indicates that the line card circuit is inactive, the logic element blocks the incoming clock signal from being passed and provides a static output level as the outgoing clock signal to the control card circuit. The control card circuit is provided with circuitry to receive the outgoing clock signals from multiple line card circuits. The circuitry is sensitive to whether or not the line card circuits are configured for redundant operation. One or more of these clock signals are then selected and used for network synchronization.
摘要翻译：描述了一种用于处理，维护和控制从多个线路卡电路发出的网络同步信息的方法和装置。所描述的技术可以应用于一对线路卡电路，其中一个线路卡电路是活动的，而另一个线路卡电路是不活动的。线卡活动锁存器通过可在线路卡调试时配置的硬件逻辑来管理。活动锁存器耦合到逻辑元件。输入时钟信号被施加到逻辑元件。如果活动锁存器指示线卡电路是有效的，则逻辑元件将输入时钟信号作为输出时钟信号提供给控制卡电路。如果活动锁存器指示线路卡电路不活动，则逻辑元件阻止输入时钟信号被传递，并且将作为输出时钟信号的静态输出电平提供给控制卡电路。控制卡电路设置有用于从多个线路卡电路接收输出时钟信号的电路。电路对线卡电路是否配置为冗余操作非常敏感。然后选择这些时钟信号中的一个或多个，并用于网络同步。

90. 发明授权

US07486665B2 Transport of DTMF tones over VOATM/VOIP networks 有权
标题翻译：通过VOATM / VOIP网络传输DTMF音
公开(公告)号：US07486665B2
公开(公告)日：2009-02-03
申请号：US10994559
申请日：2004-11-22
申请人： Anantha R. Mekala , Subrahmanyam V. Kunapuli , Jason A. Kuhne , Salman Haider
发明人： Anantha R. Mekala , Subrahmanyam V. Kunapuli , Jason A. Kuhne , Salman Haider
IPC分类号： H04L12/66 , H04J3/12
CPC分类号： H04Q11/04 , H04L12/66 , H04L65/1026 , H04L65/103 , H04M7/1295 , H04Q2213/13034 , H04Q2213/13196 , H04Q2213/13214 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13296 , H04Q2213/13389 , H04Q2213/13405
摘要： A communication device, such as a Voice over Internet Protocol (VoIP) gateway, determines a duration for Dual Tone Multi-Frequency (DTMF) tone portions of telephony signal. If the duration is less than a pre-determined amount, a minimum duration is enforced during DTMF playback at a remote end of a network connection connected to a destination gateway. Minimum playback duration can be enforced at the terminating gateway—however, the originatinggateway can also encode a DTMF packet with a minimum duration value. At the terminating receiver it is not always possible to playback exactly what happened at the originating point in the same time frame. One solution to is to, at the terminating gateway, drop the first portion of voice packets that overlap with the end portion of played back DTMF tones.
摘要翻译：通信设备，例如因特网协议语音（VoIP）网关，确定电话信号的双音多频（DTMF）音部分的持续时间。如果持续时间小于预定的量，则在连接到目的地网关的网络连接的远程端的DTMF回放期间执行最小持续时间。最终重放持续时间可以在终端网关上实施 - 然而，发起端口也可以对具有最小持续时间值的DTMF分组进行编码。在终端接收机处，并不总是可以在同一时间帧内准确地回放起始点发生的事件。一种解决方案是在终端网关处丢弃与回放DTMF音调的末端部分重叠的语音分组的第一部分。

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