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    • 81. 发明申请
    • INTERFACE CIRCUIT FOR CONNECTING A MICROPHONE CIRCUIT TO A PREAMPLIFIER.
    • 将麦克风电路连接到前置放大器的接口电路。
    • WO2012065793A1
    • 2012-05-24
    • PCT/EP2011/068029
    • 2011-10-14
    • ST-ERICSSON SABARBIERI, AndreaNICOLLINI, Germano
    • BARBIERI, AndreaNICOLLINI, Germano
    • H03H11/46H03H5/12
    • H04R3/00H03H5/12H03H11/46
    • An interface circuit (INT C ) is disclosed, adapted to connect a microphone circuit (MC D ) to a preamplifier (PA), the microphone circuit (MC D ) comprising a microphone (3) and at least an output node (M0, M0') and the preamplifier (PA) comprising at least an input node (10, 10') adapted to be connected to said output node (Mo, Mo') through said interface circuit (INT C ). The interface circuit (INT C ) comprises at least a decoupling capacitor (C DEC ) for DC decoupling the input node (10, 10') from the output node (Mo, Mo'), the decoupling capacitor (C DEC ) having a first end connected/connectable to the input node (10, 10') and a second end connected/connectable to the output node. The interface circuit (INT C ) comprises at least one active circuit (UGAMP/- UGAMP ' ), comprising a resistor having a first connected to the first end of the decoupling capacitor (C DEC ) r adapted to operatively act as a resistance multiplier and having an equivalent resistance that together with the decoupling capacitor (C DEC ) defines a high-pass filter operatively connected / connectable between the microphone (3) and the preamplifier. The interface circuit comprises a biasing circuit connected to the second end of the resistor.
    • 公开了一种接口电路(INTC),其适于将麦克风电路(MCD)连接到前置放大器(PA),所述麦克风电路(MCD)包括麦克风(3)和至少一个输出节点(M0,M0')和 所述前置放大器(PA)包括至少一个适于通过所述接口电路(INTC)连接到所述输出节点(Mo,Mo')的输入节点(10,10')。 接口电路(INTC)包括至少一个用于使输入节点(10,10')与输出节点(Mo,Mo')去耦的解耦电容器(CDEC),去耦电容器(CDEC)具有连接/ 可连接到输入节点(10,10')和连接/可连接到输出节点的第二端。 接口电路(INTC)包括至少一个有源电路(UGAMP / UGAMP'),其包括第一连接到去耦电容器(CDEC)r的第一端的电阻器,其适于可操作地用作电阻倍增器并且具有 与去耦电容器(CDEC)一起限定了在麦克风(3)和前置放大器之间可操作地连接/连接的高通滤波器的等效电阻。 接口电路包括连接到电阻器的第二端的偏置电路。
    • 83. 发明申请
    • ACTIVE LOAD ARRANGEMENT
    • 主动负载安排
    • WO2003105341A1
    • 2003-12-18
    • PCT/SE2002/001092
    • 2002-06-06
    • TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)BLADH, Mats
    • BLADH, Mats
    • H03H11/46
    • H03H11/46G01R31/316H03F1/56H03F2200/492
    • The present invention relates to an active load arrangement Z used to provide proper output load to an object TO under test. The arrangement Z comprises a voltage controlled transistor MOSFET having a source S, a gate G and a drain D. The drain D is associated with the gate G and connected to an arrangement input I2 associated with an output 01 of the object under test. The source S is connected to an arrangement output 02 associated with an input I1 of the object under test. A feedback arrangement is connected to the source S and the gate G. The feedback arrangement changes phase and amplitude of the gate-to-source voltage by varying frequency in order to obtain low impedance at low impedance at low frequencies and high impedance at high frequencies.
    • 本发明涉及一种用于向待测物体TO提供适当的输出负载的有源负载装置Z。 布置Z包括具有源极S,栅极G和漏极D的压控晶体管MOSFET。漏极D与栅极G相关联,并连接到与被测试对象的输出01相关联的布置输入I2。 源S连接到与被测试对象的输入I1相关联的布置输出02。 反馈装置连接到源极S和栅极G.反馈装置通过改变频率来改变栅极至源极电压的相位和振幅,以便在低频下获得低阻抗并在高频下获得高阻抗 。
    • 84. 发明申请
    • ADJUSTABLE RESISTANCE DEVICE WITH CONTROL CIRCUIT
    • 具有控制电路的可调电阻装置
    • WO1995024712A2
    • 1995-09-14
    • PCT/IB1995000117
    • 1995-02-24
    • PHILIPS ELECTRONICS N.V.PHILIPS NORDEN AB
    • PHILIPS ELECTRONICS N.V.PHILIPS NORDEN ABKASPERKOVITZ, Wolfdietrich, GeorgDE RUYTER, Hendricus, Clemens
    • G09G00/00
    • H03H11/46H03H11/0433H03H11/0472
    • An adjustable resistance device comprising a first parallel arrangement (1) of a first resistor and a first positive-feedback transconductor is provided with a control circuit (20) for controlling the controllable resistance section in the first parallel arrangement (1), which control circuit (20) comprises a control loop including a second parallel arrangement (2) which is a copy of the first parallel arrangement (1). The control circuit (20) controls the controllable section of the second parallel arrangement (2) in such a manner that the negative resistance value formed by a second transconductor is substantially equal in magnitude to the resistance value of a second resistor, so that the second parallel arrangement (2) is bistable in the transition range. By selecting the positive resistance value in the first parallel arrangement (1) to be a factor smaller than the negative resistance value, which factor can be realised accurately in an integrated circuit, it is possible to obtain a higher effective resistance with a smaller spread.
    • 一种包括第一电阻器和第一正反馈跨导体的第一并联装置(1)的可调电阻装置设置有用于控制第一并联装置(1)中的可控电阻部分的控制电路(20),该控制电路 (20)包括控制回路,该控制回路包括作为第一并联装置(1)的副本的第二并联装置(2)。 控制电路(20)以这样的方式控制第二并联装置(2)的可控部分,使得由第二跨导体形成的负电阻值的大小与第二电阻器的电阻值大致相等,使得第二 平行布置(2)在过渡范围内是双稳态的。 通过将第一并联装置(1)中的正电阻值选择为小于负电阻值的因子,可以在集成电路中精确地实现哪个因子,可以以较小的扩展获得更高的有效电阻。
    • 87. 发明公开
    • Schaltung zum Einstellen einer Impedanz
    • EP2088672A2
    • 2009-08-12
    • EP09007134.1
    • 2007-01-10
    • Micro-Epsilon Messtechnik GmbH & Co. KG
    • Hrubes, Franz
    • H03H11/46
    • H03H11/46H03H11/24H03H11/28
    • Eine Schaltung zum Einstellen einer Impedanz zwischen zwei Polen, wobei die Impedanz die Eingangsimpedanz der Schaltung ist, wobei die Schaltung Verstärker und Einstellmittel umfasst, wobei mittels des/der Einstellmittel die Verstärkung mindestens eines der Verstärker und/oder der Schaltung insgesamt verändert werden kann, und wobei durch Beeinflussen des/der Einstellmittel die Impedanz zwischen den beiden Polen veränderbar ist, ist im Hinblick auf ein möglichst großen Einstellbereich und ein möglichst stabiles Betriebsverhalten derart ausgestaltet, dass die Schaltung eine Rückkopplungsschleife mit einer Rückkopplungsimpedanz aufweist und dass durch Beeinflussen des/der Einstellmittel der für die Eingangsimpedanz der Schaltung wirksame Anteil der Rückkopplungsimpedanz einstellbar ist.
    • 两极(2,3)之间的阻抗调节电路(1)具有设置有调整单元的放大器,放大器和/或电路的放大是可变的。 两极之间的阻抗可通过影响调节单元来改变。 该放大器包括和运算放大器。 放大器的一个或两个极点作为缓冲放大器提供。 当静止电位为极点处的固定电位时,不提供缓冲放大器。
    • 90. 发明公开
    • MONOLITHISCH INTEGRIERBARER, ABSTIMMBARER RESONANZKREIS UND DARAUS GEBILDETE SCHALTUNGSANORDNUNGEN
    • 单片集成可调谐谐振电路及其制品电路。
    • EP0657071A1
    • 1995-06-14
    • EP94920866.0
    • 1994-06-28
    • SICAN, GESELLSCHAFT FÜR SILIZIUM-ANWENDUNGEN UND CAD/CAT NIEDERSACHSEN mbH
    • SCHMIDT, Lothar
    • H03B5H03H11
    • H03B5/125H03B5/1215H03B5/1231H03B2200/0036H03H11/46H03H11/48
    • A circuitry arrangement for a resonant circuit that may be completely monolithically integrated and electrically tuned has a differential amplifier stage with two transistors T1, T1' fed by a constant current source I0 that are differentially loaded at their collectors by a voltage-dependent capacity and inductively loaded in relation to the circuit mass by a pair of emitter followers T2, T2' with electrically adjustable impedances that act upon the base. In order to implement the electrically adjustable impedances, transistors with associated resistances are provided (for example a pair of emitter followers T3, T3 with base pre-resistances R1, R1') which may be adjusted by control currents (for example I1, I1'). The voltage-dependent capacity is implemented by transistors T4, T4' whose short-circuited emitters and collectors are connected so that the circuit node thus obtained is applied to the circuit mass through a voltage source U1. This circuit arrangement may also be used in a controllable oscillator by interconnecting two resonant circuits in a loop. The output signal of the first resonant circuit is used to control the second resonant circuit and the output signal of the second resonant circuit is inverted and used to control the first resonant circuit. In this way, two signals may be tapped at the outputs of both resonant circuits. The frequency of said signals may be varied by a control voltage and their frequency-independent phase difference equals π/2. A particularly advantageous implementation of such an oscillator is obtained by decoupling the output signals of both resonant circuits through two identical output driver stages.