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81. 发明公开

EP1735904A2 MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE 有权转让
标题翻译：整体式时钟发生器和时序/频率的参考
公开(公告)号：EP1735904A2
公开(公告)日：2006-12-27
申请号：EP05726012.7
申请日：2005-03-21
申请人： Mobius Microsystems, Inc.
发明人： MCCORQUODALE, Michael, Shannon , PERNIA, Scott, Michael , BASU, Amar, Sarbbasesh
IPC分类号： H03B1/00 , H03B5/04 , H03B5/12
CPC分类号： H03L1/02 , H03B5/04 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B2200/0038 , H03B2200/005 , H03B2200/0098 , H03J2200/10 , H03L1/00 , H03L1/026 , H03L7/00 , H03L7/06 , H03L7/0812 , H03L7/099 , H03L7/24
摘要： In various embodiments, the invention provides a clock generator and/or a timing and frequency reference, with multiple operating modes, such power conservation, clock, reference, and pulsed modes. The various apparatus embodiments include a resonator adapted to provide a first signal having a resonant frequency; an amplifier; a temperature compensator adapted to modify the resonant frequency in responser to temperature; and a process variation compensator adapted to modify the resonant frequency in response to fabrication process variation. In addition, the various embodiments may also include a frequency divider adapted to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies substantially equal to or lower than the resonant frequency; and a frequency selector adapted to provide an output signal from the plurality of second signals. The output signal may be provided in any of various forms, such as differential or single-ended, and substantially square-ware or sinusoidal.

82. 发明公开

EP1333501A3 Multi-terminal MOS varactor 审中-公开
标题翻译： MOS-Varaktor mit mehrerenAnschlüssen
公开(公告)号：EP1333501A3
公开(公告)日：2005-01-05
申请号：EP03250374.0
申请日：2003-01-21
申请人： Sharp Kabushiki Kaisha
发明人： Adan, Alberto Oscar, c/o Sharp Kabushiki Kaisha
IPC分类号： H01L29/93
CPC分类号： H01L29/94 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03L7/099 , H03L2207/06
摘要： In a multi-terminal MOS varactor, a floating electrode 8 of a MOS capacitor (Cf) 5 is connected to one of two terminals of each of a plurality of capacitors (C1-Cn) 6-1 through 6-n. To the other terminals (Vg1-Vgn) 9-1 through 9-n of the respective capacitors (C1-Cn) 6-1 through 6-n, control voltages Vg1-Vgn are applied, and a terminal (Vn) 11 of the MOS capacitor (Cf) 5, the terminal being on the side of a well, receives a control voltage. In the multi-terminal MOS varactor with the arrangement above, it is possible to progressively change the valid electrostatic capacity C of the other terminal (Vgj) 9-j of an arbitrary capacitor (Cj) 6-j, by changing the control voltage. Since electrostatic capacity can be progressively changed in this MOS varactor, adopting this MOS varactor to an oscillator enables to control a frequency and sensitivity of the oscillator.
摘要翻译：在多端子MOS变容二极管中，MOS电容器（Cf）5的浮置电极8连接到多个电容器（C1-Cn）6-1至6-n中的每一个的两个端子中的一个。对各电容器（C1〜Cn）6-1〜6-n的其他端子（Vg1〜Vgn）9-1〜9-n施加控制电压Vg1〜Vgn， MOS电容器（Cf）5，端子位于阱的一侧，接收控制电压。在具有上述结构的多端子MOS变容二极管中，通过改变控制电压，可以逐渐改变任意电容器（Cj）6-j的另一个端子（Vgj）9-j的有效静电电容C. 由于在这个MOS变容二极管中可以逐渐改变静电容量，所以将这个MOS变容二极管应用于振荡器可以控制振荡器的频率和灵敏度。

83. 发明授权

EP1252706B1 OSZILLATOR-/MISCHERSCHALTUNG 有权
标题翻译：振荡器/混频器电路
公开(公告)号：EP1252706B1
公开(公告)日：2004-09-22
申请号：EP00991099.3
申请日：2000-12-19
申请人： Infineon Technologies AG
发明人： SEWALD, Dieter
IPC分类号： H03B5/12 , H03D7/14
CPC分类号： H03D7/1408 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03D7/1441
摘要： The invention relates to an oscillator circuit and a mixer circuit that, in part, contain the same components. The mixer circuit comprises at least two switch elements. The outputs of said switch elements are each coupled in a crosswise manner to the control inputs of the respective other switch element via a feedback element. The feedback element is disposed of in such a way to additionally enable an oscillatory operation of the oscillator/mixer circuit.

84. 发明公开

EP1244215A1 Phase lock loop gain control using unit current sources 有权
标题翻译： Phasenregelschleifeverstärkungssteuerungmit Einheitsstromquellen
公开(公告)号：EP1244215A1
公开(公告)日：2002-09-25
申请号：EP02252014.2
申请日：2002-03-20
申请人： Broadcom Corporation
发明人： Gomez, Ramon A.
IPC分类号： H03L7/00
CPC分类号： H03L7/00 , H03B5/1212 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1278 , H03B2200/0046 , H03B2200/0048 , H03B2200/005 , H03B2201/02 , H03B2201/0208 , H03B2201/025 , H03D7/165 , H03D7/18 , H03J5/244 , H03J2200/10 , H03L7/0898 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/107 , H03L7/1072 , H03L7/18
摘要： A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO (222) includes a parallel LC circuit (228) having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.
摘要翻译：增益补偿器补偿锁相环（PLL）中变容二极管调谐电压调谐振荡器（VCO）的增益变化。 VCO（222）包括具有多个固定电容器的并联LC电路（228），该固定电容器可以根据电容器控制信号切换或切换出LC电路，以执行VCO的频带选择调谐。增益补偿器通过产生基于控制LC电路中的固定电容器的相同电容器控制信号的电荷泵参考电流来补偿可变VCO增益。增益补偿器通过使用单位电流源复制参考刻度电流来产生电荷泵参考电流。参考比例电流复制的次数是基于切换到LC电路的固定电容，因此是PLL的频带。参考比例电流是基于特定某些PLL特性（如参考频率，环路带宽和环路阻尼）的PLL控制产生的。因此，除了补偿可变VCO增益之外，参考泵电流可以有效地优化用于改变PLL工作条件。

85. 发明公开

EP1195000A1 SPANNUNGSGESTEUERTER OSZILLATOR MIT LC-SCHWINGKREIS 有权
标题翻译：采用LC谐振电路中的电压控制振荡器
公开(公告)号：EP1195000A1
公开(公告)日：2002-04-10
申请号：EP00938530.3
申请日：2000-04-26
申请人： Institut Für HalbleiterphysikFrankfurt (Oder) GmbH
发明人： HERZEL, Frank , WEGER, Peter
IPC分类号： H03B5/12
CPC分类号： H03L7/099 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03B5/1268 , H03B5/1293 , H03B2201/0216 , H03K3/354 , H03L2207/06
摘要： The invention relates to a voltage-controlled oscillator with an LC resonant circuit, especially for producing integrated voltage-controlled oscillators for the lower GHz range. The aim of the invention is to provide a voltage-controlled oscillator with an LC resonant circuit with which a continuous frequency tuning across a wide range of frequencies can be achieved with only little phase noise or phase jitter. To this end, the voltage-controlled oscillator with an LC resonant circuit with at least one inductivity can be connected to a further inductivity in periodic parallel and/or in series via a switch device that is actuated by the oscillator frequency, one control input of the switch device being connected to a variable DC voltage. The ratio of the duration of the conductive state and the duration of the non-conductive state of the switch devices can be modified within an oscillation period of the oscillator depending on the value of the control voltage. Corresponding to the ratio of the duration of the conductive state and the duration of the non-conductive state of the switch devices within one oscillation period of the oscillator the time-averaged, effective inductivity can be modified depending on the value of the control voltage.

86. 发明专利

JP2017538366A ＭｕＧＦＥＴを含む電圧制御発振器审中-公开
公开(公告)号：JP2017538366A
公开(公告)日：2017-12-21
申请号：JP2017532149
申请日：2015-11-12
申请人：ザイリンクスインコーポレイテッドXilinx Incorporated , ザイリンクスインコーポレイテッドXilinx Incorporated
发明人：ベケレ，アデバベイ・エム , ウパディアヤ，パラグ
IPC分类号： H03B5/12
CPC分类号： H03B5/1253 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03B5/1271 , H03B5/1278 , H03B5/129 , H03B2201/0208 , H03B2201/0266 , H03B2201/0291 , H03B2201/031 , H03B2201/038
摘要：電圧制御発振(100)が記載される。そのための装置では、インダクタ(120)がタップを有し、かつ、正極側出力ノード(105)および負極側出力ノード(106)を有するかまたはこれらのノードに結合される。タップは第1の電流を受信するように結合される。粗粒度コンデンサアレイ(130)が正極側出力ノード(105)および負極側出力ノード(106)に結合され、かつ、選択信号(168)をそれぞれ受信するように結合される。バラクタ(140)が正極側出力ノード(105)および負極側出力ノード(106)に結合され、かつ、制御電圧(143)を受信するように結合される。バラクタ(140)はMuGFET(141,142)を含む。トランスコンダクタンスセル(150)が正極側出力ノード(105)および負極側出力ノード(106)に結合され、トランスコンダクタンスセル(150)は共通ノード(107)を有する。周波数スケーリングされる抵抗器ネットワーク(160)が共通ノード(107)に結合され、かつ、第2の電流のための経路の抵抗についての選択信号(168)を受信するように結合される。

87. 发明专利

JP2012165314A Oscillator and semiconductor integrated circuit device 有权
标题翻译：振荡器和半导体集成电路器件
公开(公告)号：JP2012165314A
公开(公告)日：2012-08-30
申请号：JP2011025908
申请日：2011-02-09
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： IIZUKA YOICHI , IKEDA YASURO , ONISHI SATOSHI
IPC分类号： H03B5/04 , H03B5/08 , H03B5/12 , H03K3/0231 , H03L1/02
CPC分类号： H03B5/1212 , H03B1/00 , H03B5/1228 , H03B5/1253 , H03L1/026
摘要： PROBLEM TO BE SOLVED: To provide an oscillator that compensates for temperature characteristics even if the magnitude of a capacity Cpara directly parasitic between output terminals of the oscillator is not negligible, and a semiconductor integrated circuit device incorporating the oscillator.SOLUTION: The oscillator having an inductive element L, a capacitive element C and an amplifier 30 connected in parallel between a first terminal and a second terminal, and amplifying in the amplifier a resonance generated by the inductive element and the capacitive element for output from the first terminal and the second terminal includes a first resistive element Rc having a larger resistance value than a parasitic resistance Rof the inductive element connected in series with the capacitive element between the first terminal and the second terminal.
摘要翻译：要解决的问题：即使在振荡器的输出端子之间直接寄生的容量Cpara的幅度不可忽略的情况下也提供补偿温度特性的振荡器，以及并入该振荡器的半导体集成电路装置。解决方案：振荡器具有在第一端子和第二端子之间并联连接的电感元件L，电容元件C和放大器30，并且在放大器中放大由电感元件和电容元件产生的谐振，从第一端子和第二端子输出的第一电阻元件Rc的电阻值大于与电容元件串联连接的电感元件的寄生电阻R L 第一终端和第二终端。版权所有（C）2012，JPO＆INPIT

88. 发明专利

JP4669130B2 Oscillation device 有权
公开(公告)号：JP4669130B2
公开(公告)日：2011-04-13
申请号：JP2001002149
申请日：2001-01-10
申请人：川崎マイクロエレクトロニクス株式会社
发明人：バンコーラランドピーター , 浩一明山
IPC分类号： H03B5/12 , H03B27/00
CPC分类号： H03B27/00 , H03B5/1215 , H03B5/1228 , H03B5/1253

89. 发明专利

JP2009253515A Voltage-controlled variable frequency oscillation circuit and signal processing circuit 有权
标题翻译：电压控制可变频率振荡电路和信号处理电路
公开(公告)号：JP2009253515A
公开(公告)日：2009-10-29
申请号：JP2008097064
申请日：2008-04-03
申请人： Sony Corp , ソニー株式会社
发明人： SUZUKI MASAHITO
IPC分类号： H03B5/08 , H03B5/12 , H03L7/099 , H04B1/26
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1253 , H03B5/1262 , H03B5/1265 , H03B5/1278 , H03B5/1293
摘要： PROBLEM TO BE SOLVED: To provide a voltage-controlled variable frequency oscillation circuit capable of securing a wide frequency variation region in accordance with a capacitance variation region of a variable capacitive element.
SOLUTION: The voltage-controlled variable frequency oscillation circuit includes an oscillation circuit section 103 including a resonance circuit 101 which has coils L1 and L2 and variable capacitive elements 111 and 112, and a negative resistance circuit 102. A first resistor 301 is provided between the oscillation circuit section 103 and a power supply potential VDD. Also, a second resistor 302 is connected between the oscillation circuit section and a grounding potential end.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够根据可变电容元件的电容变化区域确保宽频率变化区域的压控变频振荡电路。解决方案：压控变频振荡电路包括振荡电路部分103，其包括具有线圈L1和L2的谐振电路101和可变电容元件111和112以及负电阻电路102.第一电阻器301是设置在振荡电路部分103和电源电位VDD之间。此外，第二电阻器302连接在振荡电路部分和接地电位端之间。版权所有（C）2010，JPO＆INPIT

90. 发明专利

JP2009517905A Oscillator, including the start-up control device 审中-公开
公开(公告)号：JP2009517905A
公开(公告)日：2009-04-30
申请号：JP2008541749
申请日：2006-11-23
申请人：テレフオンアクチーボラゲットエルエムエリクソン(パブル)
发明人：イスベルグ，マルティン
IPC分类号： H03B5/32
CPC分类号： H03B5/06 , H03B5/1209 , H03B5/1228 , H03B5/1231 , H03B5/1253 , H03B5/1265 , H03B5/368 , H03B2200/0094 , H03J5/244 , H03L3/00
摘要：発振装置（１）には、発振器コア（２）と、制御可能な静電容量値を有する、発振器コア（２）に接続された容量性ローディングユニット（３、３ａ、３ｂ）と、第１および第２のメモリユニット（５ａ、５ｂ）を含む、容量性ローディングユニットに接続されたメモリ装置（４）と、が含まれる。第１のメモリユニット（５ａ）は、始動期間中に、静電容量値を制御するために容量性ローディングユニット（３、３ａ、３ｂ）に供給される第１の値を格納するように構成される。第２のメモリユニット（５ｂ）は、動作期間中に、静電容量値を制御するために容量性ローディングユニット（３、３ａ、３ｂ）に供給される第２の値を格納するように構成される。発振装置（１）の始動方法によれば、発振信号の振幅が測定される。さらに、動作期間の開始時点が、発振信号が所定の閾値を超える時点として選択される。

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