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81. 发明授权

US09041673B2 Method of controlling noise processing circuit of touch panel and related noise processing apparatus 有权
标题翻译：控制触摸屏噪声处理电路及相关噪声处理装置的方法
公开(公告)号：US09041673B2
公开(公告)日：2015-05-26
申请号：US13802811
申请日：2013-03-14
申请人： Raydium Semiconductor Corporation
发明人： Hsu-Ming Chuang , Shih-Tzung Chou
IPC分类号： G06F3/041
CPC分类号： G06F3/0416 , G06F3/0418
摘要： The present invention provides a method of controlling a noise processing circuit of a touch panel and a related noise signal processing apparatus. At first, the present invention detects whether the touch panel is interfered with by noise. Then, according to whether the noise interferes with the touch panel, the noise processing circuit is controlled to be activated or not activated. Therefore, the noise processing circuit can be turned off if it is unnecessary, thereby to reduce the workload due to the noise processing.
摘要翻译：本发明提供了一种控制触摸面板和相关噪声信号处理装置的噪声处理电路的方法。首先，本发明检测触摸面板是否被噪声干扰。然后，根据噪声是否干扰触摸面板，噪声处理电路被控制为被激活或未被激活。因此，如果不需要，噪声处理电路可以被关闭，从而减少由于噪声处理引起的工作量。

82. 发明申请

US20140348280A1 CLOCK-EMBEDDED SERIAL DATA TRANSMISSION SYSTEM AND CLOCK RECOVERY METHOD 审中-公开
标题翻译：时钟嵌入式串行数据传输系统和时钟恢复方法
公开(公告)号：US20140348280A1
公开(公告)日：2014-11-27
申请号：US14284520
申请日：2014-05-22
申请人： Raydium Semiconductor Corporation
发明人： Da-Rong HUANG
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H03L7/085
摘要： A clock-embedded serial data transmission system is disclosed. The clock-embedded serial data transmission system includes a combinational logic circuit. The combinational logic circuit includes a clock window generator and a clock generator. The clock window generator is used to generate a first clock window according to two clock phases. The clock generator is coupled to a clock window generator and used to select a periodic data within the first clock window from a serial data signal according to the first clock window and generate a recovery clock accordingly.
摘要翻译：公开了一种时钟嵌入式串行数据传输系统。时钟嵌入式串行数据传输系统包括组合逻辑电路。组合逻辑电路包括时钟窗口发生器和时钟发生器。时钟窗口生成器用于根据两个时钟相位产生第一个时钟窗口。时钟发生器耦合到时钟窗口发生器并用于根据第一时钟窗口从串行数据信号中选择第一时钟窗口内的周期性数据，并相应地产生恢复时钟。

83. 发明申请

US20140347061A1 ELECTROSTATIC DETECTING CIRCUIT AND METHOD THEREOF 有权
标题翻译：静电检测电路及其方法
公开(公告)号：US20140347061A1
公开(公告)日：2014-11-27
申请号：US14286663
申请日：2014-05-23
申请人： RAYDIUM SEMICONDUCTOR CORPORATION
发明人： Cheng-Chin LIU
IPC分类号： G01R29/12
CPC分类号： G01R31/002 , G01N27/60 , G01R5/28 , G01R15/165 , G01R19/0023 , G01R29/12 , G01R29/24 , G01R31/12
摘要： An electronic detecting circuit includes at least one electrostatic protective module, at least one detection module, and a microprocessor controller module. The at least one detection module is respectively connected to the at least one electrostatic protective module, and the at least one detection module generates a driving record signal according to a driving state of the at least one electrostatic protective module. The microprocessor controller module is coupled with the at least one detection module, wherein the microprocessor controller module records the driving record signal when the at least one detection module transmits the driving record signal to the microprocessor controller module.
摘要翻译：电子检测电路包括至少一个静电保护模块，至少一个检测模块和微处理器控制器模块。所述至少一个检测模块分别连接到所述至少一个静电保护模块，并且所述至少一个检测模块根据所述至少一个静电保护模块的驱动状态产生驱动记录信号。所述微处理器控制器模块与所述至少一个检测模块耦合，其中当所述至少一个检测模块将所述驱动记录信号传送到所述微处理器控制器模块时，所述微处理器控制器模块记录所述驱动记录信号。

84. 发明授权

US08841955B1 Voltage level shifter 有权
标题翻译：电压电平转换器
公开(公告)号：US08841955B1
公开(公告)日：2014-09-23
申请号：US13946815
申请日：2013-07-19
申请人： Raydium Semiconductor Corporation
发明人： Yi-Ting Wang
IPC分类号： H03L5/00
CPC分类号： H03L5/00 , H03K3/35613 , H03K3/356165
摘要： The voltage level shifter includes a first voltage shift circuit, a second voltage shift circuit, a first switch circuit, a second switch circuit, a third switch circuit and a fourth switch circuit. The first voltage shift circuit receives a first input voltage, and the second voltage shift circuit receives a second voltage shift circuit. When the first voltage is high level voltage, a second output voltage and a first voltage are transformed to a ground voltage so as to open the second switch circuit and the fourth switch circuit, and then the first output voltage is transited to a system voltage. When the second voltage is high level voltage, a first output voltage and a second voltage are transited to a ground voltage so as to open the first switch circuit and the third switch circuit, and then the second output voltage is transited to the system voltage.
摘要翻译：电压电平移位器包括第一电压移位电路，第二电压移位电路，第一开关电路，第二开关电路，第三开关电路和第四开关电路。第一电压移位电路接收第一输入电压，第二电压移位电路接收第二电压移位电路。当第一电压为高电平电压时，将第二输出电压和第一电压变换为接地电压，以便打开第二开关电路和第四开关电路，然后将第一输出电压转换为系统电压。当第二电压为高电平电压时，将第一输出电压和第二电压转换到接地电压，以便打开第一开关电路和第三开关电路，然后将第二输出电压转换到系统电压。

85. 发明申请

US20140253566A1 SOURCE DRIVING CIRCUIT AND DATA TRANSMISSION METHOD THEREOF 有权
标题翻译：源驱动电路及其数据传输方法
公开(公告)号：US20140253566A1
公开(公告)日：2014-09-11
申请号：US13959703
申请日：2013-08-05
申请人： Raydium Semiconductor Corporation
发明人： YING-LIEH CHEN , WEN-TSUNG LIN , LI-PING LIN
IPC分类号： G09G5/00
CPC分类号： G09G5/006 , G09G3/2096 , G09G2300/0408 , G09G2310/0275
摘要： A source driving circuit is disclosed. The source driving circuit includes a first integrated source driver and a second integrated source driver. The first integrated source driver includes a first receiving unit, a timing controller, a first source-driving-unit and a first transmission unit. The first receiving unit receives an original image data through a displayport (DP) interface, and decodes the original image data to a first display data and a second display data. The timing controller transmits a first control signal and a second signal. The first source-driving-unit receives the first control signal and the first display data. The first transmission unit receives the second display data, and the second integrated source driver receives the second control signal and the second display data, so as to elevate the compatibility between the source driver and the DP interface.
摘要翻译：公开了一种源极驱动电路。源极驱动电路包括第一集成源极驱动器和第二集成源极驱动器。第一集成源驱动器包括第一接收单元，定时控制器，第一源驱动单元和第一传输单元。第一接收单元通过显示端口（DP）接口接收原始图像数据，并将原始图像数据解码为第一显示数据和第二显示数据。定时控制器发送第一控制信号和第二信号。第一源驱动单元接收第一控制信号和第一显示数据。第一传输单元接收第二显示数据，第二集成源驱动器接收第二控制信号和第二显示数据，以提高源驱动器和DP接口之间的兼容性。

86. 发明授权

US08766690B2 Device with automatic de-skew capability 有权
标题翻译：具有自动去偏移功能的设备
公开(公告)号：US08766690B2
公开(公告)日：2014-07-01
申请号：US13567423
申请日：2012-08-06
申请人： Yu Jen Yen
发明人： Yu Jen Yen
IPC分类号： H03K5/12 , H03L7/00
CPC分类号： G09G5/008 , G09G5/18
摘要： A source driver with an automatic de-skew capability is configured to receive a data signal and a clock signal from a timing controller, which are configured to drive a liquid crystal display panel. The source driver includes a signal delay unit, a setup time register, a hold time register, a first signal delay unit, a second delay unit and a logic circuit. In one embodiment of the present disclosure, the first data delay signal is configured to sample the second clock delay signal and the second data delay signal is configured to sample the first clock delay signal.
摘要翻译：具有自动去偏移能力的源极驱动器被配置为接收来自定时控制器的数据信号和时钟信号，其被配置为驱动液晶显示面板。源极驱动器包括信号延迟单元，建立时间寄存器，保持时间寄存器，第一信号延迟单元，第二延迟单元和逻辑电路。在本公开的一个实施例中，第一数据延迟信号被配置为对第二时钟延迟信号进行采样，并且第二数据延迟信号被配置为对第一时钟延迟信号进行采样。

87. 发明授权

US08766451B2 Chip packaging structure 有权
标题翻译：芯片封装结构
公开(公告)号：US08766451B2
公开(公告)日：2014-07-01
申请号：US13435770
申请日：2012-03-30
申请人： Chin-Yung Chen
发明人： Chin-Yung Chen
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/4985 , H01L24/13 , H01L24/14 , H01L24/16 , H01L2224/13111 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1316 , H01L2224/1412 , H01L2224/16225 , H01L2924/00014 , H01L2924/00
摘要： A chip packaging structure includes a flexible plate, a chip, and a plurality of leads. The chip is disposed on the flexible plate. A first boundary and a second boundary are defined on the flexible plate. The first boundary is located between the chip and the second boundary. A first area is formed between the first boundary and the chip. A second area is formed between the first boundary and the second boundary. The chip includes a plurality of signal conducting points and a plurality of non-signal conducting points. The plurality of leads are disposed on the flexible plate and include a plurality of signal leads and a plurality of non-signal leads. The width of the non-signal lead is smaller than the width of the signal lead extending out of the second boundary.
摘要翻译：芯片封装结构包括柔性板，芯片和多个引线。芯片设置在柔性板上。在柔性板上限定第一边界和第二边界。第一个边界位于芯片和第二个边界之间。在第一边界和芯片之间形成第一区域。在第一边界和第二边界之间形成第二区域。芯片包括多个信号导通点和多个非信号导通点。多个引线设置在柔性板上，并且包括多个信号引线和多个非信号引线。非信号引线的宽度小于从第二边界延伸出来的信号引线的宽度。

88. 发明授权

US08736373B2 Output buffer of source driver 有权
标题翻译：源驱动器的输出缓冲器
公开(公告)号：US08736373B2
公开(公告)日：2014-05-27
申请号：US13435340
申请日：2012-03-30
申请人： Chien-Ming Chen , Yann-Hsiung Liang , Hui-Wen Miao , Ko-Yang Tso
发明人： Chien-Ming Chen , Yann-Hsiung Liang , Hui-Wen Miao , Ko-Yang Tso
IPC分类号： H03F3/45 , G06F3/038
CPC分类号： H03F3/45183 , G09G3/3674 , G09G2310/0291
摘要： An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a ground voltage (AGND). The comparator compares an input voltage and an output voltage and outputs a control signal to the bias current source according to the compared result to control a bias current outputted by the bias current source to enhance the slew rate of the output buffer.
摘要翻译：公开了一种源驱动器的输出缓冲器。输出缓冲器包括缓冲器输入，缓冲器输出，差分输入级，偏置电流源，输出级，补偿电容和比较器。输出级和比较器均在模拟电源电压（AVDD）和接地电压（AGND）之间运行。比较器比较输入电压和输出电压，并根据比较结果向偏置电流源输出控制信号，以控制偏置电流源输出的偏置电流，以提高输出缓冲器的转换速率。

89. 发明申请

US20140070705A1 LED DRIVING APPARATUS AND OPERATING METHOD THEREOF 审中-公开
标题翻译： LED驱动装置及其操作方法
公开(公告)号：US20140070705A1
公开(公告)日：2014-03-13
申请号：US14025492
申请日：2013-09-12
申请人： Raydium Semiconductor Corporation
发明人： Chung-Tai Cheng , Chia-Hsiu Lin
IPC分类号： H05B33/08
CPC分类号： H05B33/0815 , H05B33/0812 , Y02B20/343
摘要： A LED driving apparatus and an operating method thereof are disclosed. The LED driving apparatus includes an output stage, a reference voltage regulator, a first input resistor, a second input resistor, and a controller. The output stage includes at least one LED. The reference voltage regulator is coupled to an input voltage and used to receive the input voltage and output a reference voltage signal. One end of the first input resistor is coupled to a node. One end of the second input resistor is coupled to the node, and the other end of the second input resistor is coupled to ground. The controller receives the reference voltage signal from the reference voltage regulator and receives a divided voltage signal from the node respectively, and outputs a setting voltage signal to the output stage.
摘要翻译：公开了一种LED驱动装置及其操作方法。 LED驱动装置包括输出级，参考电压调节器，第一输入电阻器，第二输入电阻器和控制器。输出级包括至少一个LED。参考电压调节器耦合到输入电压，并用于接收输入电压并输出参考电压信号。第一输入电阻器的一端耦合到节点。第二输入电阻器的一端耦合到节点，第二输入电阻器的另一端耦合到地。控制器从参考电压调节器接收参考电压信号，分别从节点接收分压电压信号，并将输出级输出设定电压信号。

90. 发明申请

US20140049300A1 POWER-ON RESET CIRCUIT 有权
标题翻译：上电复位电路
公开(公告)号：US20140049300A1
公开(公告)日：2014-02-20
申请号：US14067383
申请日：2013-10-30
申请人： RAYDIUM SEMICONDUCTOR CORPORATION
发明人： LI PING LIN
IPC分类号： H03K3/356
CPC分类号： H03K3/356191 , H03K17/223
摘要： A power on reset circuit is capable of changing logic level of reset signal at different threshold voltages.
摘要翻译：上电复位电路能够在不同的阈值电压下改变复位信号的逻辑电平。

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