专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明申请

US20050262413A1 Shift register, data line driving circuit, scanning line driving circuit, electro-optical device, and electronic apparatus 失效
标题翻译：移位寄存器，数据线驱动电路，扫描线驱动电路，电光器件和电子设备
公开(公告)号：US20050262413A1
公开(公告)日：2005-11-24
申请号：US11101502
申请日：2005-04-08
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： H01L51/50 , G01R31/28 , G06F11/00 , G09G3/20 , G09G3/30 , G09G3/36 , G11C19/00 , H05B33/14
CPC分类号： G06F1/3203 , G06F1/3262
摘要： To reduce a circuit area of a data line driving circuit. The data line driving circuit includes a plurality of circuit blocks. A circuit block BLi has shift register unit circuits Ai1 to Ai4, logical operation unit circuits Bi1 to Bi4 and a control unit circuit Ci. The control unit circuit Ci specifies the operation period of the corresponding circuit block on the basis of the input and output signals P0 to P4 of the shift register unit circuits Ai1 to Ai4 and supplies an X clock signal XCK and an inverted X clock signal XCKB to the shift register unit circuits Ai1 to Ai4.
摘要翻译：减少数据线驱动电路的电路面积。数据线驱动电路包括多个电路块。电路块BLi具有移位寄存器单元电路Ai 1至Ai 4，逻辑运算单元电路Bi 1至Bi 4和控制单元电路Ci。控制单元电路Ci基于移位寄存器单元电路Ai 1至Ai 4的输入和输出信号P 0至P 4指定相应电路块的操作周期，并且提供X时钟信号XCK和反相X 时钟信号XCKB到移位寄存器单元电路Ai 1到Ai 4。

82. 发明申请

US20050179037A1 Electro-optical device and electronic apparatus 有权
标题翻译：电光装置和电子设备
公开(公告)号：US20050179037A1
公开(公告)日：2005-08-18
申请号：US11036370
申请日：2005-01-18
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G02F1/1345 , G02F1/133 , G09F9/00 , G09F9/30 , G09G3/36 , H01L29/04 , H01L51/50 , H05B33/14
CPC分类号： G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0426 , G09G2330/12
摘要： To provide an electro-optical device and an electronic apparatus that have less parasitic capacitance between wiring lines resulted from the crossing wiring lines and operates at a high speed. The electro-optical device includes a first main signal wiring line which is arranged to correspond to a unit circuit and which transmits a predetermined signal; a first sub signal wiring line whose width is narrower than that of the first main signal wiring line; a second main signal wiring line arranged between the first main signal wiring line and the first sub signal wiring line; a first connection wiring line which is connected to the first main signal wiring line and the first sub signal wiring line and which is bridged over the second main signal wiring line; and an internal circuit having a plurality of elements connected to the first sub signal wiring line. The predetermined signal is branched from the first main signal wiring line and is supplied to the internal circuit through the first sub signal wiring line.
摘要翻译：提供一种由交叉布线产生的布线之间的寄生电容较小并且高速运转的电光装置和电子装置。电光装置包括：第一主信号布线，其布置成对应于单位电路并发送预定信号; 第一子信号布线，其宽度比第一主信号布线的宽度窄; 布置在第一主信号布线和第一子信号布线之间的第二主信号布线; 第一连接布线，其连接到第一主信号布线和第一子信号布线，并桥接在第二主信号布线上; 以及具有连接到第一子信号布线的多个元件的内部电路。预定信号从第一主信号布线分支，并通过第一子信号布线提供给内部电路。

83. 发明申请

US20050095735A1 Electrooptic device, electronic apparatus, and method for making the electrooptic device 失效
标题翻译：电光装置，电子设备和制造电光装置的方法
公开(公告)号：US20050095735A1
公开(公告)日：2005-05-05
申请号：US10979144
申请日：2004-11-03
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G02F1/13 , G02F1/1362 , G02F1/1368 , G09F9/00 , G09F9/30 , G09F9/35 , H01L21/66 , H01L21/77 , H01L21/84 , H01L27/12 , H01L27/13 , H01L29/786 , H01L51/50
CPC分类号： G02F1/13454 , G02F2001/136254 , G02F2203/69 , H01L27/124 , H01L27/1255 , H01L29/78621 , Y10T29/41
摘要： The invention provides an electrooptic device and an electronic apparatus, in which the electrical characteristics of many thin-film switching elements formed in a substrate to support an electrooptic material can be accurately inspected. The invention also provides a method for making the electrooptic device. In a TFT array substrate of a liquid crystal device, an inspection TFT is formed in one of dummy pixels disposed at the periphery of a pixel region. A pixel electrode connected to a drain region of the TFT functions as a first inspection pad. In an adjacent dummy pixel, the pixel electrode electrically connected to an extended portion of a data line functions as a second inspection pad. In another adjacent dummy pixel, the pixel electrode electrically connected to an extended portion of a scan line via a junction electrode functions as a third inspection pad.
摘要翻译：本发明提供一种电光装置和电子装置，其中可以精确地检查形成在基板中形成以支撑电光材料的许多薄膜开关元件的电特性。本发明还提供了制造电光装置的方法。在液晶装置的TFT阵列基板中，检测TFT形成在设置在像素区域周边的虚拟像素之一中。连接到TFT的漏极区域的像素电极用作第一检查焊盘。在相邻的虚拟像素中，电连接到数据线的延伸部分的像素电极用作第二检查焊盘。在另一个相邻的虚拟像素中，经由接合电极电连接到扫描线的延伸部分的像素电极用作第三检查焊盘。

84. 发明申请

US20050052384A1 Driving circuit, method for protecting the same, electro-optical apparatus, and electronic apparatus 有权
标题翻译：驱动电路，保护电路的方法，电光装置和电子设备
公开(公告)号：US20050052384A1
公开(公告)日：2005-03-10
申请号：US10894020
申请日：2004-07-20
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G02F1/133 , G02F1/1362 , G09F9/00 , G09F9/30 , G09G3/20 , G09G3/36 , H04N5/66
CPC分类号： G02F1/136204 , G09G3/3677
摘要： Aspects of the invention provide a driving circuit of an electro-optical panel that can include a plurality of power lines, a signal line, a driving device, and a protective circuit. The driving device can drive the electro-optical panel based on powers supplied from a power-supply circuit through the plurality of power lines and various signals input through the signal line. The protective circuit is provided between at least two power lines among the plurality of power lines, to which powers of different potentials are supplied, and can include an electrical path for dissipating static applied to one of the two power lines to the other. Accordingly, the driving circuit can increase resistance to static of an electro-optical apparatus, such as a liquid crystal apparatus.
摘要翻译：本发明的方面提供一种电光板的驱动电路，其可以包括多个电力线，信号线，驱动装置和保护电路。驱动装置可以基于从电源电路通过多条电力线提供的功率和通过信号线输入的各种信号来驱动电光面板。保护电路设置在多个电源线中的至少两个电力线之间，供应不同电位的电力，并且可以包括用于将施加到两个电力线中的一个的静电的电路径散发到另一个。因此，驱动电路可以提高诸如液晶装置之类的电光装置的抗静电能力。

85. 发明授权

US06791523B2 Electro-optical panel, method for driving the same, electro-optical device, and electronic equipment 有权
标题翻译：电光面板，其驱动方法，电光装置和电子设备
公开(公告)号：US06791523B2
公开(公告)日：2004-09-14
申请号：US09910879
申请日：2001-07-24
申请人： Shin Fujita , Tokuro Ozawa
发明人： Shin Fujita , Tokuro Ozawa
IPC分类号： G09G336
CPC分类号： G09G3/3659 , G09G2300/0842 , G09G2310/027
摘要： To maintain image quality when a field frequency is dynamically changed. In an image display area AA, control lines 4a are arranged respectively corresponding to scanning lines 3a, and TFTs 50 and 51, a pixel electrode 9a, and a storage capacitor 52 are arranged at each intersection of one of data lines 6a and scanning lines 3a. A control signal SC supplied through the control line 4a controls the TFT 51 for an on and off operation. A timing signal generator circuit 300 activates the control signal SC when a field frequency is not higher than 60 Hz, and deactivates the control signal SC when a field frequency is above 60 Hz. In this way, whether or not to connect the storage capacitor 52 to the pixel electrode 9a is determined.
摘要翻译：当场频率动态变化时，保持图像质量。在图像显示区域AA中，分别对应于扫描线3a布置控制线4a，并且在数据线6a和扫描线3a之间的每一个交点处布置TFT 50和51，像素电极9a和存储电容器52 。通过控制线4a提供的控制信号SC控制TFT51的开关动作。当场频率不高于60Hz时，定时信号发生器电路300激活控制信号SC，当场频率高于60Hz时，定时信号发生器电路300激活控制信号SC。以这种方式，确定是否将存储电容器52连接到像素电极9a。

86. 发明授权

US08619225B2 Liquid crystal device with pixel electrode under the common electrode and thinner than drain electrode, method of manufacturing liquid crystal device, and electronic apparatus 有权
标题翻译：具有普通电极下方的像素电极且比漏电极薄的液晶装置，液晶装置的制造方法以及电子装置
公开(公告)号：US08619225B2
公开(公告)日：2013-12-31
申请号：US12003020
申请日：2007-12-19
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G02F1/1343
CPC分类号： G02F1/134363 , G02F2001/134372
摘要： A liquid crystal device, which has a plurality of pixels and switching elements provided in correspondence with the pixels, includes an element substrate, an interlayer insulating film, a first electrode layer, and a second electrode layer. The switching elements are formed in the element substrate. The interlayer insulating film is formed on the switching elements. The first electrode layer is formed on the interlayer insulating film. The second electrode layer is formed in the element substrate and overlaps the first electrode in plan view through an interelectrode insulating film. Each of the pixels includes a first region and a second region. The first electrode layer overlaps the second electrode layer in plan view in the first region. Of the first electrode layer and the second electrode layer, only the first electrode layer is formed in the second region. The thickness of the second electrode layer is smaller than the thickness of the first electrode layer.
摘要翻译：具有与像素对应地设置的多个像素和开关元件的液晶装置包括元件基板，层间绝缘膜，第一电极层和第二电极层。开关元件形成在元件基板中。层间绝缘膜形成在开关元件上。第一电极层形成在层间绝缘膜上。第二电极层形成在元件基板中，并且在平面图中通过电极间绝缘膜与第一电极重叠。每个像素包括第一区域和第二区域。第一电极层在第一区域的平面图中与第二电极层重叠。在第一电极层和第二电极层中，在第二区域中仅形成第一电极层。第二电极层的厚度小于第一电极层的厚度。

87. 发明授权

US08526501B2 Decoder and decoding method based on video and audio time information 有权
标题翻译：基于视频和音频时间信息的解码和解码方法
公开(公告)号：US08526501B2
公开(公告)日：2013-09-03
申请号：US12656509
申请日：2010-02-01
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： H04N7/12
CPC分类号： H04N21/4307
摘要： A decoder is disclosed. A video decoder extracts, when receiving a video stream, video output time information attached to each video frame. Thereafter, a difference value calculator calculates a difference value between an occurrence time of a synchronizing signal and the video output time information. Further, an audio output time corrector corrects, using the difference value, audio output time information attached to each audio frame. Then, a video source outputs video represented by a video frame in synchronization with a synchronizing signal. An audio source outputs, when a value of reference time information and a corrected value of the audio output time information are synchronized, audio represented by an audio frame with the synchronized audio output time information.
摘要翻译：公开了解码器。视频解码器在接收到视频流时提取附加到每个视频帧的视频输出时间信息。此后，差值计算器计算同步信号的发生时间和视频输出时间信息之间的差值。此外，音频输出时间校正器使用差值校正附加到每个音频帧的音频输出时间信息。然后，视频源与同步信号同步地输出由视频帧表示的视频。当音频输出时间信息的参考时间信息和校正值被同步时，音频源输出具有同步音频输出时间信息的音频帧所代表的音频。

88. 发明授权

US08290284B2 Error determination device and error determination method 有权
标题翻译：错误确定装置和错误确定方法
公开(公告)号：US08290284B2
公开(公告)日：2012-10-16
申请号：US12659981
申请日：2010-03-26
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G06K9/36
CPC分类号： H04N19/112 , H04N19/164 , H04N19/172 , H04N19/89 , H04N19/895 , H04N21/4305 , H04N21/4307 , H04N21/4425
摘要： A processing-coefficient decision unit decides a processing coefficient based on a format of the stream. A target-PTS decision unit multiplies an input PTS value by the processing coefficient, to set this as a target PTS used to determine the continuity of the pictures. A reference-PTS calculation unit sets the target PTS as an initial value of a reference PTS, sequentially adds an increment corresponding to the PTS value per picture, and calculates the reference PTS which is compared with the target PTS. A difference calculation unit calculates a difference between the target PTS and the reference PTS. A threshold determination unit compares an absolute value of the difference with the processing coefficient being a threshold and determines whether the absolute value of the difference is less than the processing coefficient.
摘要翻译：处理系数决定单元基于流的格式来决定处理系数。目标PTS决定单元将输入PTS值乘以处理系数，将其设置为用于确定图像的连续性的目标PTS。参考PTS计算单元将目标PTS设置为参考PTS的初始值，顺序地添加与每个图像的PTS值对应的增量，并计算与目标PTS进行比较的参考PTS。差分计算单元计算目标PTS和参考PTS之间的差。阈值确定单元将差分的绝对值与作为阈值的处理系数进行比较，并且确定差的绝对值是否小于处理系数。

89. 发明授权

US08036266B2 Encoding/decoding system, encoding system, and decoding system 有权
标题翻译：编码/解码系统，编码系统和解码系统
公开(公告)号：US08036266B2
公开(公告)日：2011-10-11
申请号：US11976326
申请日：2007-10-23
申请人： Naoshi Kayashima , Takato Ohashi , Hiroshi Ohtsuru , Naoyuki Takeshita , Kazuhiro Yamashita , Yousuke Yamaguchi , Atsushi Ichiki , Shin Fujita
发明人： Naoshi Kayashima , Takato Ohashi , Hiroshi Ohtsuru , Naoyuki Takeshita , Kazuhiro Yamashita , Yousuke Yamaguchi , Atsushi Ichiki , Shin Fujita
IPC分类号： H04N7/12
CPC分类号： H04N21/4305 , H04N19/436 , H04N21/2365 , H04N21/242 , H04N21/4307 , H04N21/4347
摘要： Each of a plurality of encoders calculates a first time by adding an encoding delay time commonly determined between the encoders to a value of an STC counter, and transmits a system stream generated by including the calculated first time to a decoder associated with the encoder in one-to-one correspondence, of a plurality of decoders constituting a decoding system. Each of the decoders calculates a second time by adding the first time to an estimated maximum value commonly determined between the decoders by adding a decoding delay time to a value of stream fluctuation of an output time occurring between the encoders, and outputs the divided image data decoded from the system stream to a synthesizer that synthesizes the image data at the calculated second time.
摘要翻译：多个编码器中的每一个通过将编码器之间共同确定的编码延迟时间与STC计数器的值相加来计算第一次，并将通过将计算出的第一时间包括生成的系统流发送到与编码器相关联的解码器对应于构成解码系统的多个解码器。每个解码器通过将解码延迟时间与编码器之间出现的输出时间的流波动值相加，将第一时间加到解码器之间通常确定的估计最大值中，并输出分割图像数据从系统流解码为在所计算的第二次合成图像数据的合成器。

90. 发明授权

US07882411B2 Shift register, data line driving circuit, scanning line driving circuit, electro-optical device, and electronic apparatus 失效
标题翻译：移位寄存器，数据线驱动电路，扫描线驱动电路，电光器件和电子设备
公开(公告)号：US07882411B2
公开(公告)日：2011-02-01
申请号：US12292193
申请日：2008-11-13
申请人： Shin Fujita
发明人： Shin Fujita
IPC分类号： G01R31/28
CPC分类号： G06F1/3203 , G06F1/3262
摘要： To reduce a circuit area of a data line driving circuit. The data line driving circuit includes a plurality of circuit blocks. A circuit block has shift register unit circuits, logical operation unit circuits and a control unit circuit. The control unit circuit specifies the operation period of the corresponding circuit block on the basis of the input and output signals of the shift register unit circuits and supplies a clock signal and an inverted clock signal to the shift register unit circuit.
摘要翻译：减少数据线驱动电路的电路面积。数据线驱动电路包括多个电路块。电路块具有移位寄存器单元电路，逻辑运算单元电路和控制单元电路。控制单元电路基于移位寄存器单元电路的输入和输出信号指定对应的电路块的操作周期，并将时钟信号和反相时钟信号提供给移位寄存器单元电路。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式