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81. 发明专利

CA2761245A1 SEMICONDUCTOR DEVICE 未知
公开(公告)号：CA2761245A1
公开(公告)日：2010-11-18
申请号：CA2761245
申请日：2010-04-27
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： WADA KEIJI , HARADA SHIN , MASUDA TAKEYOSHI , HONAGA MISAKO , SASAKI MAKOTO , NISHIGUCHI TARO , NAMIKAWA YASUO , FUJIWARA SHINSUKE
IPC分类号： H01L29/12 , H01L21/02 , H01L21/20 , H01L21/336 , H01L29/78
摘要： Disclosed is a MOSFET (100) which is a semiconductor device that can be reduced in the on-resistance, while being suppressed in the occurrence of stacking faults due to a heat treatment during the device production process. The MOSFET (100) comprises a silicon carbide substrate (1), an active layer (7) that is formed from single crystal silicon carbide and arranged on one main surface of the silicon carbide substrate (1), a source contact electrode (92) that is arranged on the active layer (7), and a drain electrode (96) that is formed on the other main surface of the silicon carbide substrate (1). The silicon carbide substrate (1) contains a base layer (10) that is formed from silicon carbide and an SiC layer (20) that is formed from single crystal silicon carbide and arranged on the base layer (10). The impurity concentration of the base layer (10) is higher than 2 × 1019 cm-3, and the impurity concentration of the SiC layer (20) is higher than 5 × 1018 cm-3 but lower than 2 × 1019 cm-3.

82. 发明专利

CA2739570A1 INSULATED GATE BIPOLAR TRANSISTOR 未知
公开(公告)号：CA2739570A1
公开(公告)日：2010-10-14
申请号：CA2739570
申请日：2010-03-23
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , WADA KEIJI , HIYOSHI TORU
IPC分类号： H01L29/12 , H01L21/336 , H01L29/739 , H01L29/78
摘要： An IGBT (1), which is capable of reducing on resistance by reducing channel mobility, includes an n type substrate (11) made of SiC and having a main surface (11A) with an off angle of not less than 50° and not more than 65° relative to a plane orientation of {0001}, a p type reverse breakdown voltage holding layer (13) made of SiC and formed on the main surface (11A) of the substrate (11); an n type well region (14) formed to include a second main surface (13B) of the reverse breakdown voltage holding layer (13); an emitter region (15) formed in the well region (14) to include the second main surface (13B) and including a p type impurity at a concentration higher than that of the reverse breakdown voltage holding layer (13), a gate oxide film (17) formed on the reverse breakdown voltage holding layer (13), and a gate electrode (19) formed on the gate oxide film (17) In a region including an interface between the well region (14) and the gate oxide film (17), a high-concentration nitrogen region (22) is formed to have a nitrogen concentration higher than those of the well region (14) and the gate oxide film (17)

83. 发明专利

CA2684876A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 未知
公开(公告)号：CA2684876A1
公开(公告)日：2009-08-27
申请号：CA2684876
申请日：2008-10-03
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , FUJIKAWA KAZUHIRO
IPC分类号： H01L21/338 , H01L21/28 , H01L21/337 , H01L29/04 , H01L29/201 , H01L29/778 , H01L29/78 , H01L29/808 , H01L29/812
摘要： A substrate of hexagonal SiC is prepared such that the major surface make s a minimum angle of 1° or less against a face intersecting the (0001) face perpendicularly, e.g. the major surface turns to such a direction as the min imum angle against the [0001] direction perpendicular to the (0001) directio n is 1° or less. With such an arrangement, the breakdown voltage can be enha nced sharply as compared with a lateral semiconductor device where the major surface of the hexagonal SiC substrate is turning to a direction along the (0001) direction.

84. 发明专利

CA2500182A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 未知
公开(公告)号：CA2500182A1
公开(公告)日：2004-11-11
申请号：CA2500182
申请日：2004-04-20
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： FUJIKAWA KAZUHIRO , HARADA SHIN
IPC分类号： H01L21/04 , H01L21/265
摘要： A method for manufacturing semiconductor device is disclosed which enables t o perform ion implantation at high temperature wherein ions are accelerated by high energy. The method enables to simply perform selective and sufficiently deep impurity implantation into a semiconductor substrate (1, 101), especial ly into an SiC semiconductor substrate. The method for manufacturing device is characterized by comprising a step for forming a mask layer on a surface of the semiconductor substrate (1, 101) which mask layer is composed of a polyimide resin film (2) or of an SiO2 film (107a, 107b) and a metal thin fi lm (105), and a step for implanting impurity ions.

85. 发明专利

CA2783659A1 HORIZONTAL JUNCTION FIELD-EFFECT TRANSISTOR 未知
公开(公告)号：CA2783659A1
公开(公告)日：2001-06-28
申请号：CA2783659
申请日：2000-12-06
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , HIROTSU KENICHI
IPC分类号： H01L29/808 , H01L29/24 , H01L29/772
摘要： A horizontal SiC JFET including a high-mobility-carrier channel region is manufactured with high yield using an n-type SiC substrate. The horizontal JFET comprises an n-type SiC substrate (1n), p-type SiC film (2) formed on the front surface of the n-type SiC substrate, n-type SiC film (3) formed on a p-type SiC film and including a channel region (11), source and drain regions (22, 23) formed on the n-type SiC film and separated by the channel region, and a gate electrode (14) formed in contact with the n-type SiC substrate (in).

86. 发明公开

EP2725619A4 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME 审中-公开
公开(公告)号：EP2725619A4
公开(公告)日：2015-02-25
申请号：EP12805036
申请日：2012-05-25
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： MASUDA TAKEYOSHI , HARADA SHIN , WADA KEIJI , HIYOSHI TORU
IPC分类号： H01L29/12 , H01L21/20 , H01L21/205 , H01L21/336 , H01L29/16 , H01L29/78
CPC分类号： H01L29/045 , H01L21/049 , H01L21/3065 , H01L29/0623 , H01L29/0696 , H01L29/1608 , H01L29/66068 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7813
摘要： A substrate has a surface (SR) made of a semiconductor having a hexagonal single-crystal structure of polytype 4H. The surface (SR) of the substrate is constructed by alternately providing a first plane (S1) having a plane orientation of (0-33-8), and a second plane (S2) connected to the first plane (S1) and having a plane orientation different from the plane orientation of the first plane (S1). A gate insulating film is provided on the surface (SR) of the substrate. A gate electrode is provided on the gate insulating film.

87. 发明公开

EP2551891A4 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：EP2551891A4
公开(公告)日：2014-07-02
申请号：EP10848496
申请日：2010-12-20
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , SASAKI MAKOTO , NISHIGUCHI TARO , OKITA KYOKO , WADA KEIJI , MIYAZAKI TOMIHITO
IPC分类号： H01L21/02 , H01L21/336 , H01L29/12 , H01L29/739 , H01L29/78
CPC分类号： H01L29/7802 , H01L21/02002 , H01L21/02008 , H01L21/2007 , H01L29/045 , H01L29/1608 , H01L29/66068 , H01L29/66333 , H01L29/7395

88. 发明公开

EP2418683A4 INSULATED GATE FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：带有绝缘栅型场效应晶体管
公开(公告)号：EP2418683A4
公开(公告)日：2013-05-15
申请号：EP10761587
申请日：2010-03-23
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , WADA KEIJI , HIYOSHI TORU
IPC分类号： H01L29/78 , H01L21/336 , H01L29/04 , H01L29/16
CPC分类号： H01L29/7828 , H01L21/049 , H01L29/045 , H01L29/1608 , H01L29/518 , H01L29/66068 , H01L29/7838 , H01L2924/0002 , H01L2924/00

89. 发明公开

EP2432002A4 SILICON CARBIDE SUBSTRATE AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：碳化硅半导体元件
公开(公告)号：EP2432002A4
公开(公告)日：2012-11-21
申请号：EP10774828
申请日：2010-04-27
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , SASAKI MAKOTO , NISHIGUCHI TARO , NAMIKAWA YASUO , FUJIWARA SHINSUKE
IPC分类号： H01L21/02 , C30B23/00 , C30B29/36 , C30B33/06 , H01L21/20 , H01L29/04 , H01L29/16 , H01L29/66 , H01L29/739 , H01L29/78
CPC分类号： H01L29/1608 , C30B23/00 , C30B29/36 , C30B33/06 , H01L21/02378 , H01L21/02529 , H01L21/2007 , H01L29/045 , H01L29/66068 , H01L29/7395 , H01L29/7802
摘要： An IGBT (100), which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate (1), a drift layer (3), a well region (4), an n + region (5), an emitter contact electrode (92), a gate oxide film (91), a gate electrode (93), and a collector electrode (96). The silicon carbide substrate (1) includes: a base layer (10) made of silicon carbide and having p type conductivity; and a SiC layer (20) made of single-crystal silicon carbide and disposed on the base layer (10). The base layer (10) has a p type impurity concentration exceeding 1 × 10 18 cm -3 .

90. 发明公开

EP2083448A4 SILICON CARBIDE SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCING THE SAME 审中-公开
标题翻译：碳化硅半导体元件及其制造方法
公开(公告)号：EP2083448A4
公开(公告)日：2010-11-17
申请号：EP07831361
申请日：2007-11-07
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , MASUDA TAKEYOSHI
IPC分类号： H01L21/04 , H01L21/02 , H01L29/04 , H01L29/24 , H01L29/78
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02639 , H01L21/0445 , H01L21/049 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. A coating film (M1) made of Si is formed on an initial growth layer (11) on a 4H-SiC substrate (10), and an extended terrace surface (15A) is formed in a region covered with the coating film (M1). Next, the coating film (M1) is removed, and a new growth layer is epitaxially grown on the initial growth layer (11). A 3C-SiC portion (21a) made of 3C-SiC crystals having a polytype stable at a low temperature is grown on the extended terrace surface (15A) of the initial growth layer (11). A channel region of a MOSFET or the like is provided in the 3C-SiC portion (21a) having a narrow band gap. As a result, the channel mobility is improved because of a reduction in an interface state, and a silicon carbide semiconductor device having excellent performance characteristics is obtained.

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