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81. 发明专利

JPH096608A SOFTWARE PROTECTION SYSTEM 失效
公开(公告)号：JPH096608A
公开(公告)日：1997-01-10
申请号：JP15653895
申请日：1995-06-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , OMORI MOTOJI , TATEBAYASHI MAKOTO
IPC分类号： G06F12/14 , G06F1/00 , G06F9/06 , G06F21/22 , G06F21/24
摘要： PURPOSE: To reduce the number or digits or data, especially, a random value on a communication line at the time of using the communication line to acquire the execution right of software. CONSTITUTION: A software executer 101 generates the executer ID and order information and sends them to an order manager 102 to order the software. The order manager 102 generates an execution right generation password, which is information dependent upon received order information and executer secret information corresponding to the executer ID, and sends it to the software executer 101. The software executer 101 discriminates whether this execution right generation password matches with order information sent to the order manager 102 before and its own executer secret information or not; and if it matches, the software executer 101 generates the execution right of software corresponding to order information to execute this software.

82. 发明专利

JP2510303B2 失效
公开(公告)号：JP2510303B2
公开(公告)日：1996-06-26
申请号：JP30705689
申请日：1989-11-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HARADA TOSHIHARU , MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G09C1/00 , G06F7/72

83. 发明专利

JPH06342257A SEQUENTIAL CIPHERING SYSTEM 失效
公开(公告)号：JPH06342257A
公开(公告)日：1994-12-13
申请号：JP13175093
申请日：1993-06-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , TATEBAYASHI MAKOTO , OMORI MOTOJI
IPC分类号： G09C1/00
摘要： PURPOSE:To provide the safe sequential ciphering system which copes with the absence of a frame and a bit error by using a pseudo-random number generator using a linear feedback register (LFSR) small in hardware scale or program scale. CONSTITUTION:A ciphering part 100 sets initial values K0-K3 to respective LFSRs at the head of a frame, exclusively ORs generated pseudo-random number data PNi and normal data Pi, and sends out ciphertext data Ci. The ciphertext data Ci is added to the stored value of the LFSRs by exclusive OR and the results are stored in the LFSRs again. A deciphering part 101 sets secret initial values K0-K3, used in common to the ciphering part 100, in the respective LFSRs at the head of the frame and exclusively ORed with received ciphertext data C'i and the results are stored in the LFSRs again. The same pseudo-random number data PNi with the side of the ciphering part 100 are generated. The received ciphertext C'i and pseudo-random number data PNi are exclusively ORed to obtain ciphertext data P'i.

84. 发明专利

JPH06118872A DATA DISTURBING DEVICE 失效
公开(公告)号：JPH06118872A
公开(公告)日：1994-04-28
申请号：JP27127392
申请日：1992-10-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME
IPC分类号： G09C1/00
摘要： PURPOSE:To obtain the data disturbing device having a high disturbance effect, and also, being strong against the strongest difference attack at present by a hardware of a small scale. CONSTITUTION:Input data is divided into plural blocks. In a first selecting part, one piece or more of blocks are selected. In a block selecting signal generator 1, a block selecting signal is generated by using an output of a first selecting part and a block selecting key. In second selecting parts 2-4, by using the block selecting signal, one piece or more of blocks are selected from other input block than a first selecting part. In a first fusing part 5, an output of a second selecting part is and compressed to one block. Its output data is inputted to a data disturbing device F6 of one block, and an output of one block is obtained. In third selecting parts 7-9, an output of F is prepared by an input block portion, and by using NOT of the block selecting signal one piece or more of block are selected. In second fusing parts 10-12, the input data and an output of a third selecting part are fused by exclusive OR, and it is substituted in a substituting part 13 and becomes output data.

85. 发明专利

JPH05344118A 失效
公开(公告)号：JPH05344118A
公开(公告)日：1993-12-24
申请号：JP14596492
申请日：1992-06-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G09C1/00 , H04L9/06 , H04L9/14 , H04L9/18 , H04N7/167 , H04N21/2347
摘要： PURPOSE:To provide a data disturbing device which improves the disturbing effect and is immune to the strongest conventional differential attack with a small scale hardware. CONSTITUTION:Input data are divided into plural blocks. A first selection part selects the blocks more than one out of the divided blocks by using a secret block selection key. The output data are merged and compressed into one block by a first merge part. The output data are inputted to a data disturbing device F of one block, and the output value of one block is obtained. At second selection parts 7-10, the outputs of the data disturbing device F are prepared as many as input blocks, and blocks more than one are selected by using the refusal of the secret block selection key. At second merge parts 11-14, the input data and the outputs of the second selection parts are merged for each block, and this is defined as output data.

86. 发明专利

JPH05160828A SECRET COMMUNICATION AND SIGNATURE COMMUNICATION METHOD EMPLOYING NETWORK USING ELLIPTIC CURVE 失效
公开(公告)号：JPH05160828A
公开(公告)日：1993-06-25
申请号：JP31881691
申请日：1991-12-03
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIYAJI MITSUKO , MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G09C1/00 , G06F7/72 , H04L9/30 , H04L9/32
摘要： PURPOSE:To attain the ciphering system using an elliptic curve in the secret communication and the signature communication utilizing a network by inputting an integral number to an one-way function, moving its output to an integer ring and inputting the result to the function. CONSTITUTION:Let a group comprising elements on a finite field GF(p) on an elliptic curve E having a prime (p) and the finite field GF(p) as a field of definition be E[GF(p)], then the secret communication or the signature communication is implemented by calculating a numerically processed communication text or signature with elements of the E[GF(p)]. Then an integer (a) is inputted to one-way function F defined on an integer ring and whose values are taken in the GF(p). Its output is shifted to the integer ring by mapping (u) from the E[GF(p)] to the integer ring and inputted to a function phi defined on the integer ring and taking its value onto the integer ring.

87. 发明专利

JPH02151892A POWER RESIDUE ARITHMETIC DEVICE 失效
公开(公告)号：JPH02151892A
公开(公告)日：1990-06-11
申请号：JP30736188
申请日：1988-12-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G06F7/72 , G09C1/00
摘要： PURPOSE:To speed up arithmetic operation and to secure the safety of secret data by putting a 2nd calculating device in charge of the part of 'power calculation' of power residue arithmetic operation of a 1st calculating device to be found finally. CONSTITUTION:In the device which regards the product (n) of prime numbers (p) and (q) as a modulus and regards a positive integer (d) as power to performs the power residue arithmetic of an input (x), the 1st calculating device 1 divides the power residue arithmetic on the modulus (n) to be found finally into arithmetic operations on moduli (p) and (q), which are calculated by the 2nd calculating device 2. The prime factors (p) and (q) of (n) are unknown to the 2nd calculating device 2, so it is difficult for the 2nd calculating device 2 to obtain the secret information of an IC card on the 1st calculating device from data supplied from the 1st calculating device 1. The 1st calculating device 1 combines two data calculated by the 2nd calculating device 2 by using a Chinese residue theorem to obtain a desired result. Consequently, the arithmetic operation on the side of the IC card is speeded up to shorten the total coding time.

88. 发明专利

JPH0243594A BINARY FALSE RANDOM NUMBER GENERATOR 失效
公开(公告)号：JPH0243594A
公开(公告)日：1990-02-14
申请号：JP19410288
申请日：1988-08-03
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G06F7/58 , G09C1/00
摘要： PURPOSE:To change a period sequence itself in a binary false random number sequence by means of keys without deteriorating the properties of linear complexity, a period, etc., by adding N one-bit memories and N exclusive OR gates. CONSTITUTION:The title random number generator is provided with N binary period sequence forming devices 111 to 113 capable of setting up the initial value of an internal state and outputting a binary value uniformly determined by the internal state and N one-bit memories 3 to be initialized when N is defined as a positive integer. When a part of a key is substituted for the N one-bit memories 3 and the key to be stored in the memories 3 is changed, the binary random sequence to be an output can be changed and the outputs of the devices 111 to 113 can be coupled with respective bit values of the memories 3 by exclusive OR operation. Consequently, the binary random number sequence itself can be changed by keys without deteriorating characteristics in the period of an output sequence, linear complexity, and so on.

89. 发明专利

JPS63304289A SURPLUS MULTIPLIER 失效
公开(公告)号：JPS63304289A
公开(公告)日：1988-12-12
申请号：JP14028487
申请日：1987-06-04
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KANO YASUO , MATSUZAKI NATSUME
IPC分类号： G06F11/10 , G06F7/72 , G09C1/00

90. 发明专利

JPS62296183A DATA JAMMING APPARATUS 失效
公开(公告)号：JPS62296183A
公开(公告)日：1987-12-23
申请号：JP14077686
申请日：1986-06-17
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUZAKI NATSUME , TATEBAYASHI MAKOTO
IPC分类号： G09C1/00 , H04L9/00 , H04L9/06

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