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    • 81. 发明授权
    • Display device
    • 显示设备
    • US09164301B2
    • 2015-10-20
    • US14009604
    • 2012-04-04
    • Masaki UehataKohji SaitohMasami OzakiToshihiro Yanagi
    • Masaki UehataKohji SaitohMasami OzakiToshihiro Yanagi
    • G02F1/13G09G3/36
    • G02F1/1309G09G3/3614G09G3/3688G09G2310/0291
    • An auxiliary wire, which can be connected to each of a plurality of data signal lines (Sn), is constituted by (i) a first auxiliary wire (17) provided so as to intersect the plurality of data signal lines (Sn) on a side where end parts of the respective plurality of data signal lines (Sn) are connected to a data signal line driving circuit (4) and (ii) a second auxiliary wire (18) provided so as to intersect the plurality of data signal lines (Sn) on a side of the other end parts of the respective plurality of data signal lines (Sn). Between the first auxiliary wire (17) and the second auxiliary wire (17), there are provided (i) a positive-polarity amplifier circuit (6) for receiving a positive data signal from the data signal line driving circuit (4) and (ii) a negative-polarity amplifier circuit (7) for receiving a negative data signal from the data signal line driving circuit (4). An output signal is supplied to the second auxiliary wire (18) from the positive-polarity amplifier circuit (6) or the negative-polarity amplifier circuit (7).
    • 可以连接到多条数据信号线(Sn)中的每条数据信号线(Sn)的辅助线由(i)第一辅助线(17)构成,该第一辅助线(17)设置成与多个数据信号线 相应的多个数据信号线(Sn)的端部连接到数据信号线驱动电路(4)和(ii)设置成与多条数据信号线相交的第二辅助线(18) Sn)在相应的多条数据信号线(Sn)的另一端部的一侧。 在第一辅助线(17)和第二辅助线(17)之间提供(i)用于从数据信号线驱动电路(4)接收正数据信号的正极放大器电路(6)和( ii)用于从数据信号线驱动电路(4)接收负数据信号的负极性放大器电路(7)。 输出信号从正极放大电路(6)或负极性放大电路(7)提供给第二辅助线(18)。
    • 86. 发明授权
    • Display controller, display device, display system, and method for controlling display device
    • 显示控制器,显示装置,显示系统以及控制显示装置的方法
    • US08692822B2
    • 2014-04-08
    • US12309671
    • 2007-03-27
    • Toshihiro YanagiTakuji MiyamotoAtsuhito Murai
    • Toshihiro YanagiTakuji MiyamotoAtsuhito Murai
    • G09G5/00
    • G09G5/18G09G3/3611G09G2310/0283G09G2310/08G09G2340/0435
    • A display controller is capable of changing a refresh rate, indicative of how often a screen displayed on a display device having a plurality of pixels is switched, between a low refresh rate of 40 Hz and a normal refresh rate of 60 Hz and generates (i) a dot clock (reference clock) serving as a timing signal indicative of a timing of operation in the display device, (ii) video data indicative of an image to be displayed on the screen, (iii) Hsync for defining a horizontal period of a display on the screen, and (vi) Vsync for defining a vertical period of the display on the screen, so as to supply the dot clock, the video data, Hsync, and Vsync to the display device, wherein the display controller includes a dot clock generation circuit for generating the reference clock whose frequency is constant without depending on a change of the refresh rate. This makes it possible to provide the display controller which can suppress occurrence of noise also in switching the refresh rate and which does not allow any screen derangement which is caused by the noise.
    • 显示控制器能够改变在40Hz的低刷新率和60Hz的正常刷新率之间的刷新率,指示在具有多个像素的显示设备上显示的屏幕被切换的频率,并产生(i )用作指示显示装置中的操作定时的定时信号的点时钟(参考时钟),(ii)指示要在屏幕上显示的图像的视频数据,(iii)用于定义屏幕的水平周期的Hsync 屏幕上的显示器,以及(vi)用于定义屏幕上的显示的垂直周期的Vsync,以便将点时钟,视频数据,Hsync和Vsync提供给显示设备,其中显示控制器包括: 点时钟生成电路,用于产生频率恒定的参考时钟,而不依赖于刷新率的变化。 这使得可以在切换刷新率的同时提供能够抑制噪声发生的显示控制器,并且不允许由噪声引起的任何屏幕紊乱。
    • 89. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20140022232A1
    • 2014-01-23
    • US14009604
    • 2012-04-04
    • Masaki UehataKohji SaitohMasami OzakiToshihiro Yanagi
    • Masaki UehataKohji SaitohMasami OzakiToshihiro Yanagi
    • G02F1/13
    • G02F1/1309G09G3/3614G09G3/3688G09G2310/0291
    • An auxiliary wire, which can be connected to each of a plurality of data signal lines (Sn), is constituted by (i) a first auxiliary wire (17) provided so as to intersect the plurality of data signal lines (Sn) on a side where end parts of the respective plurality of data signal lines (Sn) are connected to a data signal line driving circuit (4) and (ii) a second auxiliary wire (18) provided so as to intersect the plurality of data signal lines (Sn) on a side of the other end parts of the respective plurality of data signal lines (Sn). Between the first auxiliary wire (17) and the second auxiliary wire (17), there are provided (i) a positive-polarity amplifier circuit (6) for receiving a positive data signal from the data signal line driving circuit (4) and (ii) a negative-polarity amplifier circuit (7) for receiving a negative data signal from the data signal line driving circuit (4). An output signal is supplied to the second auxiliary wire (18) from the positive-polarity amplifier circuit (6) or the negative-polarity amplifier circuit (7).
    • 可以连接到多条数据信号线(Sn)中的每条数据信号线(Sn)的辅助线由(i)第一辅助线(17)构成,该第一辅助线(17)设置成与多个数据信号线 相应的多个数据信号线(Sn)的端部连接到数据信号线驱动电路(4)和(ii)设置成与多条数据信号线相交的第二辅助线(18) Sn)在相应的多条数据信号线(Sn)的另一端部的一侧。 在第一辅助线(17)和第二辅助线(17)之间提供(i)用于从数据信号线驱动电路(4)接收正数据信号的正极放大器电路(6)和( ii)用于从数据信号线驱动电路(4)接收负数据信号的负极性放大器电路(7)。 输出信号从正极放大电路(6)或负极性放大电路(7)提供给第二辅助线(18)。