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    • 81. 发明申请
    • Inventory mitigation collaboration and balancing system with organized and archivable communication means
    • 库存缓解协作和平衡系统与有组织和可归档的沟通手段
    • US20070162356A1
    • 2007-07-12
    • US11253420
    • 2005-10-19
    • Huy NguyenPerpetua Tranlong
    • Huy NguyenPerpetua Tranlong
    • G06Q10/00
    • G06Q10/087
    • A computer-implemented inventory management system is provided in which inventory data and inventory balancing transactions are conducted external to existing inventory databases and within which communication means are integrated and organized by means allowing for storage, archival and auditing. More particularly, the invention relates to an inventory managements system which can be operated in conjunction with and parallel to existing enterprise resource planning software, and within which data, transaction, communication and information can be updated dynamically and iteratively in responses to changes or as a result of prior balancing transactions, and within which data views and executable functions are presented to each user uniquely based on the user's uniquely-identified criteria, and within which communication data are tracked, stored and maintained dynamically and iteratively for future access, organization and archival.
    • 提供了一个计算机实施的库存管理系统,其中库存数据和库存平衡交易在现有库存数据库外部进行,并通过允许存储,存档和审计的手段将通信手段整合在一起。 更具体地说,本发明涉及一种库存管理系统,其可以与现有的企业资源规划软件一起并行运行,并且可以在其中动态和迭代地更新数据,交易,通信和信息以响应变化或作为 先前平衡事务的结果,并且其中数据视图和可执行功能根据用户唯一标识的标准被唯一地呈现给每个用户,并且在其中跟踪,存储和维护通信数据以便将来访问,组织和归档 。
    • 82. 发明授权
    • Data transmission and rendering techniques implemented over a client-server system
    • 通过客户端 - 服务器系统实现的数据传输和渲染技术
    • US07240283B1
    • 2007-07-03
    • US09792400
    • 2001-02-22
    • Narasimha Rao PailaAjit Ramachandra MayyaHuy NguyenShannon Norrell
    • Narasimha Rao PailaAjit Ramachandra MayyaHuy NguyenShannon Norrell
    • G06F15/00G06F17/24G06F15/16G06Q30/00
    • H04L67/42G06F9/45512G06F17/2247G06Q30/0609G06Q30/0611H04L67/02H04L67/34
    • A technique is disclosed for generating formatted information for display on a computer system. The computer system may be configured to include at least one interface for communicating with a server computer system. A request is sent from the computer system to the server system. According to one embodiment, the request may correspond to an HTTP request for information relating to a specific HTML page or web page. A response is then received from the server system. According to one embodiment, the response includes response information comprising embedded instructions and data. The embedded instructions may include instructions for using the data to generate formatted markup information for display on the computer system. The embedded instructions are then executed on the data to thereby generate formatted markup information for display on the computer system. According to a specific embodiment, the formatted markup information corresponds to HTML data to be rendered for display on the computer system.
    • 公开了一种用于生成用于在计算机系统上显示的格式化信息的技术。 计算机系统可以被配置为包括用于与服务器计算机系统通信的至少一个接口。 将请求从计算机系统发送到服务器系统。 根据一个实施例,该请求可以对应于与特定HTML页面或网页有关的信息的HTTP请求。 然后从服务器系统接收到响应。 根据一个实施例,响应包括包括嵌入式指令和数据的响应信息。 嵌入式指令可以包括用于使用数据生成用于在计算机系统上显示的格式化标记信息的指令。 然后对数据执行嵌入的指令,从而生成用于在计算机系统上显示的格式化的标记信息。 根据具体实施例,格式化的标记信息对应于要呈现以在计算机系统上显示的HTML数据。
    • 84. 发明授权
    • Wave shaping output driver to adjust slew rate and/or pre-emphasis of an output signal
    • 波形整形输出驱动器来调整输出信号的转换速率和/或预加重
    • US07215161B2
    • 2007-05-08
    • US11068116
    • 2005-02-28
    • Huy Nguyen
    • Huy Nguyen
    • H03K3/017
    • H04L25/0286H03K2005/00286H04L25/026H04L25/03834
    • Integrated circuit, system, method and machine readable media embodiments adjust a slew rate and/or a transmit pre-emphasis of an output signal at selected phases during a bit time. A timing circuit provides a plurality of delayed data signals in response to a clock signal. A plurality of adjustable impedance circuits, including a plurality of select circuits, output a plurality of selected delayed data signals to form the output signal having an adjusted slew rate. Delay elements in the timing circuit are also biased from a current of a lock loop circuit to further adjust slew rate of the output signal. Transmit pre-emphasis of the output signal is adjusted by selecting a polarity of a selected delayed data signal in each of the plurality of adjustable impedance circuits. Each adjustable impedance circuit also includes a predriver and driver for adjusting impedance in response to a signal indicating an impedance value. In an embodiment, an integrated circuit is able to operate in multiple modes of operation depending upon the type of output signal, frequency range of the output signal, physical packaging and/or system configuration.
    • 集成电路,系统,方法和机器可读介质实施例在比特时间期间在所选择的相位调整输出信号的转换速率和/或发送预加重。 定时电路响应于时钟信号提供多个延迟的数据信号。 包括多个选择电路的多个可调阻抗电路输出多个所选择的延迟数据信号以形成具有调整压摆率的输出信号。 定时电路中的延迟元件也偏离锁定环电路的电流,以进一步调整输出信号的转换速率。 通过选择多个可调阻抗电路中的每一个中选择的延迟数据信号的极性来调整输出信号的发送预加重。 每个可调阻抗电路还包括预驱动器和驱动器,用于响应于指示阻抗值的信号来调节阻抗。 在一个实施例中,集成电路能够根据输出信号的类型,输出信号的频率范围,物理封装和/或系统配置在多种操作模式下操作。
    • 85. 发明申请
    • Integrated circuit device with controllable on-die impedance
    • 具有可控片上阻抗的集成电路器件
    • US20060132171A1
    • 2006-06-22
    • US11018163
    • 2004-12-20
    • Huy Nguyen
    • Huy Nguyen
    • H03K17/16
    • H03H11/245H03F1/56H03F3/347H03H11/46H03H11/53H03K17/693
    • Described are controllable impedances that may be adjusted by a combination of digital and analog signals. An adjustable impedance responsive to the digital signals establishes a gross resistance between two nodes by enabling one or more of a plurality of parallel-coupled impedance legs. Each leg includes at least one transistor for controlling the impedance of the leg over a continuous range. The gate voltage applied to the transistors of the selected impedance legs is an analog compensation voltage that varies with supply-voltage and temperature fluctuations in a manner that causes the collective impedance of the selected legs to remain stable despite the fluctuations. The combination of digital and analog impedance control provides for coarse impedance adjustments, such as to compensate for process variations, and additionally provides fine, adaptive adjustments to maintain the selected impedance despite changes in the supply voltage and temperature.
    • 描述了可以通过数字和模拟信号的组合来调节的可控阻抗。 响应于数字信号的可调阻抗通过启用多个并联耦合的阻抗支路中的一个或多个来建立两个节点之间的总电阻。 每条腿包括至少一个用于在连续范围内控制腿的阻抗的晶体管。 施加到所选择的阻抗支路的晶体管的栅极电压是随着电源电压和温度波动而变化的模拟补偿电压,使得所选择的支路的集体阻抗尽管波动而保持稳定。 数字和模拟阻抗控制的组合提供粗阻抗调整,例如补偿过程变化,并且还提供精细的自适应调整,以保持所选阻抗,尽管电源电压和温度有变化。
    • 86. 发明申请
    • Automated laboratory for high-throughput biological assays and RNA interference
    • 用于高通量生物测定和RNA干扰的自动化实验室
    • US20050054083A1
    • 2005-03-10
    • US10837218
    • 2004-04-30
    • Minh VuongTodd BennettJavier FloresBrian GrotDaniel HaleHuy NguyenWalter NilesTuong PhanSteve RodemsJeff StackPeter Coassin
    • Minh VuongTodd BennettJavier FloresBrian GrotDaniel HaleHuy NguyenWalter NilesTuong PhanSteve RodemsJeff StackPeter Coassin
    • B23B27/04C12M1/34C12N20060101
    • G01N35/1074G01N35/028
    • The invention is an automated multiple-purpose, integrated laboratory system comprising interchangeable modular elements for the construction and measurement of biological assays. The functions of the modular elements may include multiwell platform handling, chemical reagent or cell management, volumetric transfer of liquids for assay construction or for recovery of reaction products for analysis, incubation under controlled environmental conditions, measurement of spectrometric signals originating from the assays, processing and analysis of the resulting spectrometric data, and other functions. The modular elements are arranged around a number of robotic elements that deliver plates to different modular elements, transfer plates to groups of modules served by a different robotic element, or other actions necessary in plate handling. Liquid transfer to and from multiwell platforms, necessary for assay construction or for the initiation of physiological events in cells, is partitioned among different modules specialized for transferring nanoliter or smaller volume quantities of chemical concentrates, or microliter quantities of assay reagents, cells, media and other assay constituents. Applications of this invention include the quantitation and analysis of the expression of multiple genes in cells, measurement of multi-gene expression kinetics, analysis of activation or suppression of multiple signal transduction pathways, screening chemical compounds for modulatory effects on multi-gene expression or on signal transduction pathways or on other biochemical networks of cells, or other analytical biological or biochemical assays.
    • 本发明是一种自动多功能综合实验室系统,包括用于构建和测量生物测定的可互换模块化元件。 模块化元件的功能可以包括多井平台处理,化学试剂或细胞管理,用于测定构建的液体的体积转移或用于回收用于分析的反应产物,在受控环境条件下孵育,来自测定的光谱信号的测量,处理 并对所得光谱数据进行分析等功能。 模块化元件围绕若干机器人元件布置,其将板递送到不同的模块元件,将板传递到由不同的机器人元件服务的模块组或板处理中所需的其他动作。 液体转移至多孔平台,用于测定结构或细胞中生理事件发生所必需的多孔平台,在专门用于转移纳升或更小体积量的化学浓缩物或微量的测定试剂,细胞,培养基和 其他检测成分。 本发明的应用包括细胞中多个基因的表达的定量和分析,多基因表达动力学的测定,多重信号转导途径的激活或抑制分析,筛选化合物对多基因表达的调节作用或 信号转导途径或细胞的其他生物化学网络或其他分析生物或生物化学测定。
    • 88. 发明授权
    • Virtualized data storage system optimizations
    • 虚拟化数据存储系统优化
    • US09348842B2
    • 2016-05-24
    • US12730198
    • 2010-03-23
    • David Tze-Si WuHuy NguyenAdityashankar KiniDilip Kumar UppugandlaChinmaya Manjunath
    • David Tze-Si WuHuy NguyenAdityashankar KiniDilip Kumar UppugandlaChinmaya Manjunath
    • G06F17/30G06F12/08G06F15/16G06F3/06
    • G06F17/30233G06F3/0643G06F3/0653G06F3/067G06F12/0862G06F17/30132G06F2212/6024
    • Virtual storage arrays consolidate branch data storage at data centers connected via wide area networks. Virtual storage arrays appear to storage clients as local data storage; however, virtual storage arrays actually store data at the data center. Virtual storage arrays overcome bandwidth and latency limitations of the wide area network by predicting and prefetching storage blocks, which are then cached at the branch location. Virtual storage arrays leverage an understanding of the semantics and structure of high-level data structures associated with storage blocks to predict which storage blocks are likely to be requested by a storage client. Virtual storage arrays may use proximity-based, heuristic-based, and access time-based prefetching to predict high-level data structure entities that are likely to be accessed by the storage client. Virtual storage arrays then identify and prefetch storage blocks corresponding with the predicted high-level data structure entities.
    • 虚拟存储阵列将通过广域网连接的数据中心的分支数据存储整合。 虚拟存储阵列对存储客户端显示为本地数据存储; 然而,虚拟存储阵列实际上将数据存储在数据中心。 虚拟存储阵列通过预测和预取存储块来克服广域网的带宽和延迟限制,然后将存储块缓存在分支位置。 虚拟存储阵列利用对与存储块相关联的高级数据结构的语义和结构的理解,以预测存储客户端可能请求哪些存储块。 虚拟存储阵列可以使用基于邻近的,基于启发式的和基于时间的访问预取来预测存储客户机可能访问的高级数据结构实体。 然后,虚拟存储阵列识别并预取与预测的高级数据结构实体相对应的存储块。