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81. 发明授权

US07844807B2 Branch target address cache storing direct predictions 失效
标题翻译：分支目标地址缓存存储直接预测
公开(公告)号：US07844807B2
公开(公告)日：2010-11-30
申请号：US12024197
申请日：2008-02-01
申请人： David S. Levitan , Lixin Zhang
发明人： David S. Levitan , Lixin Zhang
IPC分类号： G06F9/35 , G06F9/355 , G06F9/40
CPC分类号： G06F9/3806 , G06F9/322 , G06F9/3844
摘要： In at least one embodiment, a processor includes at least one execution unit and instruction sequencing logic that fetches instructions for execution by the execution unit. The instruction sequencing logic includes branch logic that outputs predicted branch target addresses for use as instruction fetch addresses. The branch logic includes a branch target address cache (BTAC) having at least one direct entry providing storage for a direct branch target address prediction associating a first instruction fetch address with a branch target address to be used as a second instruction fetch address immediately after the first instruction fetch address and at least one indirect entry providing storage for an indirect branch target address prediction associating a third instruction fetch address with a branch target address to be used as a fourth instruction fetch address subsequent to both the third instruction fetch address and an intervening fifth instruction fetch address.
摘要翻译：在至少一个实施例中，处理器包括至少一个执行单元和指令排序逻辑，其提取由执行单元执行的指令。指令排序逻辑包括分支逻辑，该分支逻辑输出用作指令获取地址的预测分支目标地址。分支逻辑包括分支目标地址高速缓存（BTAC），其具有至少一个直接条目，为直接分支目标地址预测提供存储，该直接分支目标地址预测将第一指令获取地址与分支目标地址相关联，以将分配目标地址紧随在第二指令获取地址之后第一指令获取地址和至少一个间接条目提供用于间接分支目标地址预测的存储，用于将第三指令获取地址与分支目标地址相关联，以将分配目标地址用作第三指令提取地址和中间地址之后的第四指令获取地址第五指令提取地址。

82. 发明申请

US20100192829A1 SPAR HULL BELLY STRAKE DESIGN AND INSTALLATION METHOD 审中-公开
标题翻译： SPAR HULL BELLY STRAKE设计和安装方法
公开(公告)号：US20100192829A1
公开(公告)日：2010-08-05
申请号：US12365811
申请日：2009-02-04
申请人： Michael Y. H. Luo , Harvey O. Mohr , Lixin Zhang
发明人： Michael Y. H. Luo , Harvey O. Mohr , Lixin Zhang
IPC分类号： B63B3/14 , B63B35/44
CPC分类号： B63B39/005 , B63B1/048 , B63B35/4406 , B63B2035/442
摘要： A spar hull for a floating vessel can include a hard tank having a belly portion, a fixed strake coupled to the outer surface of the tank and a folding strake coupled to the belly portion of the tank, the folding strake having one or more strake panels and one or more support frames. A method for installing folding belly strakes on a spar hull may include providing a floating spar hull having a hard tank with a belly side, rotating the spar so that the belly side is in a first workable position, coupling at least one folding strake to the belly side of the spar, and coupling the strake in a folded position for transport. The method may include positioning the spar hull offshore in a transport position, upending the spar hull, unfolding the strake, fixing the strake in the unfolded position and installing the spar hull.
摘要翻译：用于浮动船只的翼梁可以包括具有腹部的硬罐，耦合到罐的外表面的固定板条和耦合到罐的腹部的折叠板，折叠板具有一个或多个板条板和一个或多个支撑框架。用于在翼梁上安装折叠式腹板的方法可以包括：提供具有带有腹部侧面的硬罐的浮动翼梁，旋转翼梁使得腹部侧处于第一可操作位置，将至少一个折叠板连接到翼梁的腹部侧面，并将平台连接在折叠位置以便运输。该方法可以包括将桨叶船体近海定位在运输位置，从而升高翼梁船体，展开船形板，将船板固定在展开位置并安装翼梁船体。

83. 发明授权

US07657729B2 Efficient multiple-table reference prediction mechanism 失效
标题翻译：高效多表参考预测机制
公开(公告)号：US07657729B2
公开(公告)日：2010-02-02
申请号：US11457178
申请日：2006-07-13
申请人： Wael R. El-Essawy , Ramakrishnan Rajamony , Hazim Shafi , William E. Speight , Lixin Zhang
发明人： Wael R. El-Essawy , Ramakrishnan Rajamony , Hazim Shafi , William E. Speight , Lixin Zhang
IPC分类号： G06F9/00
CPC分类号： G06F12/0862 , G06F9/3455 , G06F9/383 , G06F9/3832 , G06F12/0897 , G06F2212/6026
摘要： A method and an apparatus for enabling a prefetch engine to detect and support hardware prefetching with different streams in received accesses. Multiple (simple) history tables are provided within (or associated with) the prefetch engine. Each of the multiple tables is utilized to detect different access patterns. The tables are indexed by different parts of the address and are accessed in a preset order to reduce the interference between different patterns. When an address does not fit the patterns of a first table, the address is passed to the next table to be checked for a match of different patterns. In this manner, different patterns may be detected at different tables within a single prefetch engine.
摘要翻译：一种用于使预取引擎能够在接收的访问中检测和支持不同流的硬件预取的方法和装置。在预取引擎（或与其相关联）中提供了多个（简单）历史表。多个表中的每一个用于检测不同的访问模式。这些表由地址的不同部分索引，并以预设顺序访问，以减少不同模式之间的干扰。当地址不符合第一个表的模式时，该地址将传递给下一个表，以便检查不同模式的匹配。以这种方式，可以在单个预取引擎内的不同表处检测不同的模式。

84. 发明申请

US20090198965A1 METHOD AND SYSTEM FOR SOURCING DIFFERING AMOUNTS OF PREFETCH DATA IN RESPONSE TO DATA PREFETCH REQUESTS 失效
标题翻译：用于根据数据预先要求采集预取数据的不同数据的方法和系统
公开(公告)号：US20090198965A1
公开(公告)日：2009-08-06
申请号：US12024165
申请日：2008-02-01
申请人： RAVI K. ARIMILLI , Gheorghe C. Cascaval , Balaram Sinharoy , William E. Speight , Lixin Zhang
发明人： RAVI K. ARIMILLI , Gheorghe C. Cascaval , Balaram Sinharoy , William E. Speight , Lixin Zhang
IPC分类号： G06F9/312
CPC分类号： G06F9/383 , G06F9/30043 , G06F9/3455
摘要： According to a method of data processing, a memory controller receives a prefetch load request from a processor core of a data processing system. The prefetch load request specifies a requested line of data. In response to receipt of the prefetch load request, the memory controller determines by reference to a stream of demand requests how much data is to be supplied to the processor core in response to the prefetch load request. In response to the memory controller determining to provide less than all of the requested line of data, the memory controller provides less than all of the requested line of data to the processor core.
摘要翻译：根据数据处理的方法，存储器控制器从数据处理系统的处理器核心接收预取负载请求。预取加载请求指定所请求的数据行。响应于接收到预取加载请求，存储器控制器通过参考需求请求流来确定响应于预取加载请求将多少数据提供给处理器核。响应于存储器控制器确定提供少于全部所请求的数据行，存储器控制器将少于所有请求的数据行提供给处理器核。

85. 发明申请

US20090198909A1 Jump Starting Prefetch Streams Across Page Boundaries 有权
标题翻译：跨页面边界跳转开始预取流
公开(公告)号：US20090198909A1
公开(公告)日：2009-08-06
申请号：US12024632
申请日：2008-02-01
申请人： William E. Speight , Lixin Zhang
发明人： William E. Speight , Lixin Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0862 , G06F2212/1024 , G06F2212/6026 , G06F2212/655
摘要： A method, processor, and data processing system for enabling utilization of a single prefetch stream to access data across a memory page boundary. A prefetch engine includes an active streams table in which information for one or more scheduled prefetch streams are stored. The prefetch engine also includes a victim table for storing a previously active stream whose next prefetch crosses a memory page boundary. The scheduling logic issues a prefetch request with a real address to fetch data from the lower level memory. Then, responsive to detecting that the real address of the stream's next sequential prefetch crosses the memory page boundary, the prefetch engine determines when the first prefetch stream can continue across the page boundary of the first memory page (via an effective address comparison). The PE automatically reinserts the first prefetch stream into the active stream table to jump start prefetching across the page boundary.
摘要翻译：一种方法，处理器和数据处理系统，用于使单个预取流能够跨存储器页面边界访问数据。预取引擎包括活动流表，其中存储一个或多个调度预取流的信息。预取引擎还包括用于存储先前活动的流的受害者表，其下一个预取跨越存储器页面边界。调度逻辑发出具有真实地址的预取请求以从下层存储器获取数据。然后，响应于检测到流的下一个顺序预取的实际地址与存储器页面边界相交，预取引擎确定第一预取流何时可以跨第一存储器页的页面边界（经由有效的地址比较）继续。 PE自动将第一个预取流重新插入到活动流表中，以跨页边界跳转开始预取。

86. 发明申请

US20090198906A1 Techniques for Multi-Level Indirect Data Prefetching 有权
标题翻译：多级间接数据预取技术
公开(公告)号：US20090198906A1
公开(公告)日：2009-08-06
申请号：US12024260
申请日：2008-02-01
申请人： Ravi K. Armilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
发明人： Ravi K. Armilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
IPC分类号： G06F12/00
CPC分类号： G06F12/1027 , G06F12/0862 , G06F12/0897 , G06F2212/6026 , G06F2212/681
摘要： A technique for performing data prefetching using multi-level indirect data prefetching includes determining a first memory address of a pointer associated with a data prefetch instruction. Content that is included in a first data block (e.g., a first cache line of a memory) at the first memory address is then fetched. A second memory address is then determined based on the content at the first memory address. Content that is included in a second data block (e.g., a second cache line) at the second memory address is then fetched (e.g., from the memory or another memory). A third memory address is then determined based on the content at the second memory address. Finally, a third data block (e.g., a third cache line) that includes another pointer or data at the third memory address is fetched (e.g., from the memory or the another memory).
摘要翻译：使用多级间接数据预取来执行数据预取的技术包括确定与数据预取指令相关联的指针的第一存储器地址。然后取出包含在第一存储器地址的第一数据块（例如，存储器的第一高速缓存行）中的内容。然后基于第一存储器地址处的内容来确定第二存储器地址。包含在第二存储器地址的第二数据块（例如，第二高速缓存行）中的内容然后被取出（例如，从存储器或另一个存储器）。然后基于第二存储器地址处的内容来确定第三存储器地址。最后，取出（例如，从存储器或另一个存储器）中包含第三存储器地址处的另一指针或数据的第三数据块（例如，第三高速缓存行）。

87. 发明申请

US20090198905A1 Techniques for Prediction-Based Indirect Data Prefetching 有权
标题翻译：基于预测的间接数据预取技术
公开(公告)号：US20090198905A1
公开(公告)日：2009-08-06
申请号：US12024248
申请日：2008-02-01
申请人： Ravi K. Arimilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
发明人： Ravi K. Arimilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
IPC分类号： G06F12/02
CPC分类号： G06F12/0862 , G06F12/0897 , G06F12/1027 , G06F2212/6026
摘要： A technique for data prefetching using indirect addressing includes monitoring data pointer values, associated with an array, in an access stream to a memory. The technique determines whether a pattern exists in the data pointer values. A prefetch table is then populated with respective entries that correspond to respective array address/data pointer pairs based on a predicted pattern in the data pointer values. Respective data blocks (e.g., respective cache lines) are then prefetched (e.g., from the memory or another memory) based on the respective entries in the prefetch table.
摘要翻译：使用间接寻址的数据预取技术包括在到存储器的访问流中监视与阵列相关联的数据指针值。该技术确定数据指针值中是否存在模式。然后基于数据指针值中的预测模式，填充与各个阵列地址/数据指针对相对应的条目的预取表。然后，基于预取表中的相应条目，预取（例如，从存储器或另一存储器）分别的数据块（例如，相应的高速缓存行）。

88. 发明申请

US20090198904A1 Techniques for Data Prefetching Using Indirect Addressing with Offset 有权
标题翻译：使用偏移量进行间接寻址的数据预取技术
公开(公告)号：US20090198904A1
公开(公告)日：2009-08-06
申请号：US12024246
申请日：2008-02-01
申请人： Ravi K. Arimilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
发明人： Ravi K. Arimilli , Balaram Sinharoy , William E. Speight , Lixin Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0862 , G06F12/1045 , G06F2212/6028
摘要： A technique for performing data prefetching using indirect addressing includes determining a first memory address of a pointer associated with a data prefetch instruction. Content, that is included in a first data block (e.g., a first cache line) of a memory, at the first memory address is then fetched. An offset is then added to the content of the memory at the first memory address to provide a first offset memory address. A second memory address is then determined based on the first offset memory address. A second data block (e.g., a second cache line) that includes data at the second memory address is then fetched (e.g., from the memory or another memory). A data prefetch instruction may be indicated by a unique operational code (opcode), a unique extended opcode, or a field (including one or more bits) in an instruction.
摘要翻译：使用间接寻址执行数据预取的技术包括确定与数据预取指令相关联的指针的第一存储器地址。然后取出包含在第一存储器地址的存储器的第一数据块（例如，第一高速缓存行）中的内容。然后将偏移量添加到第一存储器地址处的存储器的内容以提供第一偏移存储器地址。然后基于第一偏移存储器地址确定第二存储器地址。包括第二存储器地址上的数据的第二数据块（例如，第二高速缓存行）然后被取出（例如，从存储器或另一个存储器）。数据预取指令可以由指令中的唯一操作代码（操作码），唯一扩展操作码或字段（包括一个或多个位）来指示。

89. 发明申请

US20070179260A1 Isotactic 3, 4-isoprene-based polymer 失效
标题翻译：全异戊二烯基异戊二烯基聚合物
公开(公告)号：US20070179260A1
公开(公告)日：2007-08-02
申请号：US10591322
申请日：2005-03-04
申请人： Zhaomin Hou , Lixin Zhang
发明人： Zhaomin Hou , Lixin Zhang
IPC分类号： C08F4/06 , C08F4/44
CPC分类号： C08F136/08 , C08F4/54 , C08F4/52
摘要： The present invention provides 3,4-isoprene-based polymer with high regioregularity, in particular high tacticity. Specifically, the present invention provides an isoprene-based polymer, including a structural unit represented by Formula (I) in Claims, wherein the isotacticity of an arrangement of the structural units is 99% mmmm or more in terms of pentad content. Further, the present invention provides a production method for the isoprene-based polymer, which comprises polymerizing an isoprene-based compound in the presence of a polymerization catalyst containing a complex represented by the following Formula (A) in Claims.
摘要翻译：本发明提供了具有高定向性，特别是高立构规整度的3,4-异戊二烯类聚合物。具体地说，本发明提供了一种异戊二烯类聚合物，其包括由权利要求中的式（I）表示的结构单元，其中结构单元的排列的全同立构规整度为五元组含量为99％mm以上。此外，本发明提供了一种异戊二烯类聚合物的制造方法，其包括在含有权利要求中的下述通式（A）所示的络合物的聚合催化剂的存在下使异戊二烯系化合物聚合。

90. 发明申请

US20070043699A1 Method and system for visualizing data relationships using tree and grid layouts 失效
标题翻译：使用树和网格布局可视化数据关系的方法和系统
公开(公告)号：US20070043699A1
公开(公告)日：2007-02-22
申请号：US11205579
申请日：2005-08-17
申请人： Lixin Zhang
发明人： Lixin Zhang
IPC分类号： G06F17/30
CPC分类号： G06F17/30554 , Y10S707/99933 , Y10S707/99938 , Y10S707/99943 , Y10S707/99952
摘要： The tree layout and grid layout (1.1, 1.2) are used to visualize data and their relationship in a relational database. The tree layout (1.1) uses tree nodes to represent table records, and uses parent-child relationships of the tree nodes to represent data relationships between table records. The grid layout (1.2) is to display the detailed table record data associated with a tree node. Users only need to execute one SQL query to retrieve the initial data (3.1 to 3.6), then keep expanding tree nodes to see any related table records (4.1 to 4.10). Click any tree node will display the table record data in a grid layout (5.1 to 5.5).
摘要翻译：树布局和网格布局（1.1,1.2）用于可视化数据及其在关系数据库中的关系。树布局（1.1）使用树节点来表示表记录，并使用树节点的父子关系来表示表记录之间的数据关系。网格布局（1.2）是显示与树节点相关联的详细表格记录数据。用户只需要执行一个SQL查询来检索初始数据（3.1到3.6），然后继续扩展树节点以查看任何相关的表格记录（4.1到4.10）。单击任何树节点将在网格布局中显示表记录数据（5.1到5.5）。

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