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81. 发明专利

JPH02250335A MANUFACTURE OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH02250335A
公开(公告)日：1990-10-08
申请号：JP7061589
申请日：1989-03-24
申请人： HITACHI LTD
发明人： KOBAYASHI MASAYOSHI , MIYASHITA ISAO , URYU TAKESHI , SHIMIZU SHUICHI
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/338 , H01L29/778 , H01L29/812
摘要： PURPOSE:To form an electrode such as a gate electrode of a T-sheped cross section without damaging an active layer and with good reproducibility by a method wherein a desired amount of an insulating film is removed, an opening part of a T-shaped cross section is formed and an electrode, with a structure of a T-shaped cross section, whose central part comes into contact with the active layer is formed by a lift-off method by utilizing an electron-beam resist film. CONSTITUTION:An insulating film 5 with which an active layer 2 is covered is formed in a desired depth by an anisotropic dry etching operation by making use of an electron-beam resist film 15 as a mask. After that, a desired thickness over a whole region in a surface-layer part of the electron-beam resist film 15 is removed by an isotropic dry etching operation; a T-shaped hollow is formed by a hollow of the insulating film 5 and by inside faces of the electron-beam resist film 15 placed on the insulating film 5. In addition, a prescribed depth of the insulating film 5 is removed by an anisotropic dry etching operation by making use of the electron-beam resist film 15 as a mask; a T-shaped opening part is formed; then, a gate electrode 6 is formed by a lift-off method. Thereby, the active layer is not damaged; a gate electrode of a T-shaped cross section can be formed with good reproducibility.

82. 发明专利

JPH01268067A SEMICONDUCTOR DEVICE AND APPLIED CIRCUIT THEREOF 失效
公开(公告)号：JPH01268067A
公开(公告)日：1989-10-25
申请号：JP9557288
申请日：1988-04-20
申请人： HITACHI LTD
发明人： YAMANE MASAO , KOBAYASHI MASAYOSHI , USAGAWA TOSHIYUKI , YAMASHITA KIICHI , TAKAHASHI SUSUMU
IPC分类号： H01L29/812 , H01L21/338 , H01L29/778 , H01L29/80
摘要： PURPOSE:To obtain a Schottky type field-effect transistor wherein gm and Schottky characteristics are not deteriorated even in a short gate element and the breakdown strength of a drain is high, by a constitution wherein the thickness of a semiconductor layer between a gate and a groove is larger than the thickness at the gate part, and the cross sectional area of the semiconductor layer at the groove part is smaller than that at the gate part. CONSTITUTION:In a field effect transistor, a semiconductor layer comprising an active layer 17 or a two-dimensional carrier forming layer is provided on a semi-insulating semiconductor substrate 10, and a source, a gate 13 and a drain are provided. In this transistor, a groove 15 is provided between the gate and the drain. The thickness of said semiconductor layer at a part between the gate 13 and the groove 15 is larger than that at the part of the gate 13. The cross sectional area of the semiconductor layer in the direction of the drain current at the part of the groove 15 is smaller than that at the part of the gate 13. For example, a semi-insulating or P type GaAs buffer layer 18, an N-type GaAs active layer 17 and an N-type GaAs cap layer 16 are sequentially grown on the semi-insulating GaAs substrate 10. After mesa etching is performed, an SiO2 film 19, a source electrode 11 and a drain electrode 12 are formed. The groove 15 and the gate electrode 13 are further formed.

83. 发明专利

JPH01248524A MANUFACTURE OF SEMICONDUCTOR 失效
公开(公告)号：JPH01248524A
公开(公告)日：1989-10-04
申请号：JP7457788
申请日：1988-03-30
申请人： HITACHI LTD
发明人： TAGAMI TOMONORI , KOBAYASHI MASAYOSHI , KUSANO CHUSHIRO , MISHIMA TOMOYOSHI , UCHIDA YOKO
IPC分类号： H01L29/73 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L21/331 , H01L21/337 , H01L21/338 , H01L29/205 , H01L29/737 , H01L29/78 , H01L29/80 , H01L29/812
摘要： PURPOSE:To enable etching to be performed selectively by using dry etching which allows for fine machining with improved controllability by exposing etching stop layer containing In with a reactive etching using a gas containing halogen elements as constituent elements. CONSTITUTION:An etching stop layer 5 including In is provided between a GaAs base layer 4 and an Al0.3Ga0.7As emitter layer 6. Since this etching stop layer 5 includes In as the configuration constituent, the etching rate of the etching stop layer 5 of reactive dry etching using an etching gas including halogen elements such as chlorine or fluorine for example, Cl2, CCl2F2, HCl, etc., should be 1/100 or less of GaAs or AlGaAs. Thus, a layer including In operates as an etching stop layer for a III-V chemical compound layer which does not include In.

84. 发明专利

JPH01241182A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01241182A
公开(公告)日：1989-09-26
申请号：JP6736888
申请日：1988-03-23
申请人： HITACHI LTD
发明人： KOBAYASHI MASAYOSHI , YAMANE MASAO , TAKAHASHI SUSUMU
IPC分类号： H01L29/812 , H01L21/302 , H01L21/338 , H01L29/778 , H01L29/80
摘要： PURPOSE:To enable formation of a self-aligned source drain electrode by providing a side wall on a gate electrode to form the source drain electrode after arranging a gate electrode by dry-etching a high density n-type GaAs layer. CONSTITUTION:After selectively dry-etching a high density n-type GaAs layer 6 of a gate opening pattern section, a gate electrode 9 is formed by lift-off method to self-align the gate electrode 9 against the high density n-type GaAs layer 6. Then side wall processing is made to the gate electrode 9 to cover entirely at least a space section between the layer 6 and the gate electrode 9 with a side wall 10. This requires to apply an insulation film for side wall formation thicker than a distance of the upper part of the space and to process the insulating film by anisotropic dryetching. After forming ohmic metal on the entire surface, the buried region is flattened and the ohmic metal of the upper part of the side wall and the gate electrode is eliminated. In this way, a source drain electrode 11 can be selfaligned against the side wall 10.

85. 发明专利

JPH01145809A FORMATION OF ELECTRODE 失效
公开(公告)号：JPH01145809A
公开(公告)日：1989-06-07
申请号：JP30313187
申请日：1987-12-02
申请人： HITACHI LTD
发明人： GOSHIMA SHIGEO , KOBAYASHI MASAYOSHI
IPC分类号： C23C14/24 , H01L21/28 , H01L21/285 , H01L21/3205
摘要： PURPOSE:To remove a spontaneous oxide film of substrate at a low temperature and to form a preferable electrode/ semiconductor boundary by employing a depositing device having a mechanism for introducing a hydrogen plasma into a depositing chamber. CONSTITUTION:A substrate crystal is charged in the substrate holder 7 of a depositing device 1. The device 1 is evacuated by a turbo molecule pump to 1X10 Torr or less. Then, the surface of a substrate is irradiated with a hydrogen plasma 3 generated by an electron cyclotron resonance. In this case, hydrogen radical is reacted with surface oxide of the substrate, the oxide is substantially dissociated thereby to obtain a clean surface of the crystal. Then, while the plasma 3 is irradiating, aluminum 4 heated by a resistance heating method is deposited on the substrate 6 by opening a shutter 5. In this case, since the hydrogen radical is reacted with remaining oxygen, it prevents the oxygen from mixing into an electrode metal.

86. 发明专利

JPH01132160A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01132160A
公开(公告)日：1989-05-24
申请号：JP28936587
申请日：1987-11-18
申请人： HITACHI LTD
发明人： USAGAWA TOSHIYUKI , KOBAYASHI MASAYOSHI , MISHIMA TOMOYOSHI
IPC分类号： H01L29/73 , H01L21/28 , H01L21/331 , H01L29/205 , H01L29/43 , H01L29/72 , H01L29/737
摘要： PURPOSE:To obtain a semiconductor device having a p-type GaAs layer or a p-type AlxGa1-xAs layer whose reliability is excellent by a method wherein a p GaAs or p InyGa1-yAs layer is arranged on the p-type GaAs or p-type AlxGa1-xAs layer, a non-alloy type metal layer is arranged on the p layer and both are brought into ohmic contact by a tunnel junction. CONSTITUTION:A p GaAs or p InyGa1-yAs layer 70 is arranged on a p-type GaAs or p-type AlxGa1-xAs layer 71; a non-alloy type metal layer 60 is arranged on the p GaAs or p InyGa1-yAs layer 70; both are brought into ohmic contact by a tunnel junction. For example, p GaAs 11 containing Be, undoped (p ) GaAs 12, undoped AlGaAs 13, n-type AlGaAs 14 containing Si, p-type AlGaAs 15 containing Be, p-type GaAs 16 containing Be and p GaAs 17 containing Be are laminated on a semiinsulating GaAs substrate 10 as shown in the figure; an emitter electrode 50 composed of Ti/Pt/Au is formed on it; in addition, a base electrode 51 and a collector electrode 52 are formed according to ordinary execution; a pnp-type 2 DEG-HBT is completed.

87. 发明专利

JPH01117070A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01117070A
公开(公告)日：1989-05-09
申请号：JP27314387
申请日：1987-10-30
申请人： HITACHI LTD
发明人： USAGAWA TOSHIYUKI , YAMANE MASAO , KOBAYASHI MASAYOSHI
IPC分类号： H01L29/812 , H01L21/338 , H01L29/201 , H01L29/778 , H01L29/80
摘要： PURPOSE:To remove noises in low frequency by forming a semiconductor layer having electron affinity smaller than a semiconductor layer and impurity concentration lower than the semiconductor layer onto the semiconductor layer and shaping a P-type semiconductor layer into a gate region in the former semiconductor layer. CONSTITUTION:Undoped GaAs 11, N-type GaAs 12 containing Si, undoped AlxGa1-xAs 13 and a P-type GaAs layer 16 including Be are formed successively onto a semi-insulating GaAs substrate 10. A gate region is etched, and SiO2 layers 23 are applied onto the sidewalls of a gate stepped section. A gate electrode metal 22 is shaped through a lift-off process. N GaAs 17 is grown selectively in a drain region, and AuGe/Ni/Au source-drain electrodes 20, 21 are formed.

88. 发明专利

JPS63318165A HETEROJUNCTION SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63318165A
公开(公告)日：1988-12-27
申请号：JP15328787
申请日：1987-06-22
申请人： HITACHI LTD
发明人： YAMANE MASAO , MISHIMA TOMOYOSHI , SASAKI YOSHIMITSU , KOBAYASHI MASAYOSHI , USAGAWA TOSHIYUKI , TAKAHASHI SUSUMU
IPC分类号： H01L29/205 , H01L21/338 , H01L29/778 , H01L29/80 , H01L29/812
摘要： PURPOSE:To protect a gate electrode from disconnection by a method wherein a buffer layer is formed thin on a mesa step section and, on one of its surfaces, an AlGaAs/GaAs superlattice layer or an etching stopper layer is provided. CONSTITUTION:A buffer layer 4 built for example of undoped GaAs on a mesa step section is formed thin and, on one of its surfaces, an etching stopper layer 3 is built of an AlGaAs/GaAs superlattice layer or a simple AlGaAs layer, which reduces the quantity to be removed by etching from the buffer layer 4. With the device being designed as such, the AlGaAs in the superlattice layer or the simple AlGaAs layer serves as a stopper layer in a process of dry-etching a GaAs layer 8 for the formation of a gate recess, preventing the formation of a great difference in the mesa step section and protecting a gate electrode 10 from disconnection.

89. 发明专利

JPS63174318A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63174318A
公开(公告)日：1988-07-18
申请号：JP481887
申请日：1987-01-14
申请人： HITACHI LTD
发明人： KOBAYASHI MASAYOSHI , TERANO AKIHISA
IPC分类号： H01L21/28 , H01L21/3205 , H01L23/52
摘要： PURPOSE:To obtain an ohmic electrode of a low contact resistance by heat- treating in a reducing atmosphere gas (H2, N2, Ar) a GaAs substrate on which metallic layers were stacked. CONSTITUTION:A P-type conductive layer 2 is formed on a GaAs substrate 1. A SiO2 film 3 is deposited by means of a CVD method, a cap annealing process is performed, activating the conductive layer 2. A SiO2 film 4 is deposited by means of a CVD method. As an ohmic electrode 5 to the conductive layer 2, a first layer Au, second layer Mo, third layer of an AuZn alloy, fourth layer Mo, and fifth layer Au are sequentially vacuum-evaporated with a thickness of 10nm, 10nm, 80nm, 100nm, and 300nm, respectively. The unnecessary electrode 5 deposited on a resist is removed. An alloying is performed in a N2 gas atmosphere for two minutes at a temperature of 400 deg.C, obtaining an ohmic contact to the conductive layer 2. With this, an ohmic electrode of a low contact resistance is obtained.

90. 发明专利

JPS6398155A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6398155A
公开(公告)日：1988-04-28
申请号：JP24291986
申请日：1986-10-15
申请人： HITACHI LTD
发明人： HIRUMA TAKEYUKI , USAGAWA TOSHIYUKI , KOBAYASHI MASAYOSHI
IPC分类号： H01L29/812 , H01L21/28 , H01L21/338 , H01L29/80
摘要： PURPOSE:To form an FET having a short gate length in a large quantity by setting an incident direction of a depositing or sputtering beam of a material for a gate electrode to a substrate to a direction inclined from a perpendicular direction to the substrate in a plane perpendicular to the gate electrode wiring direction. CONSTITUTION:Epitaxial films 2, 3 and an SiO2 insulating film 4 are formed on a substrate 1, coated with a photoresist 5, and then etched to the film 4 to open a hole 6, a source electrode 8 and a drain electrode 9 are formed, and a photoresist 5 and a metal 7 are removed. Then, it is coated with a photoresist 12 to form a pattern for forming a gate metal, the film 4 of the lower layer of the photoresist 12 is etched to form an undercut. Then, a gate metal 10 is deposited at an oblique incident angle to form a gate electrode 13, and the photoresist 12 and an unnecessary metal 11 are removed. Thus, an FET having a short gate length can be manufactured in a mass production to reduce the cost.

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