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    • 81. 发明授权
    • Inflation valve
    • 充气阀
    • US08210501B2
    • 2012-07-03
    • US12483772
    • 2009-06-12
    • William Lee
    • William Lee
    • F16K31/00
    • F16K15/20B63C9/24F16K15/063F16K15/18Y10T137/0491Y10T137/3724
    • An inflation valve is revealed. The inflation valve includes a longitudinal valve body, a valve member and an elastic member sleeved between the valve member and the longitudinal valve body. The longitudinal valve body includes an axially extending hole disposed therein, a projecting edge arranged on the axially extending hole and a round through hole disposed on a center of the projecting edge, and two alignment members having at least one projecting body and/or one concave slot. A round valve head is arranged on the front end of the valve member and alignment members corresponding to the alignment members of the longitudinal valve body disposed on an outer edge of the valve head. While being assembled, the valve head passes the through hole by alignment of the alignment members between the valve member and the longitudinal valve body and becomes staggered. Moreover, by the elastic member, the valve head presses and locks onto the round through hole to form a closed state.
    • 透露充气阀。 充气阀包括纵向阀体,阀构件和套在阀构件和纵向阀体之间的弹性构件。 所述纵阀体包括设置在其中的轴向延伸的孔,设置在所述轴向延伸孔上的突出边缘和设置在所述突出边缘的中心的圆形通孔,以及两个对准构件,其具有至少一个突出体和/ 槽 在阀构件的前端设置有圆形阀头,对置构件,其对应于设置在阀头的外缘上的纵向阀体的对准构件。 在组装时,阀头通过对准阀构件和纵向阀体之间的对准构件而通过通孔,并且变得交错。 此外,通过弹性构件,阀头按压并锁定在圆形通孔上以形成关闭状态。
    • 82. 发明授权
    • Efficient, scalable and high performance mechanism for handling IO requests
    • 高效,可扩展和高性能的机制来处理IO请求
    • US08001283B2
    • 2011-08-16
    • US12047257
    • 2008-03-12
    • William LeeThomas Benjamin Berg
    • William LeeThomas Benjamin Berg
    • G06F12/00G06F13/00
    • G06F9/5038G06F12/0815
    • A system, apparatus and method for managing input/output requests in a multi-processor system is disclosed. An IO coherence unit includes an IO request handler, a variable size transaction table, and an IO response handler. The size of the transaction table varies according to the number of pending IO requests. The IO request handler stores information about pending IO requests in the transaction table to establish an order among related requests and to permit out-of-order handling of unrelated requests. The IO response handler tracks responses to the IO requests and updates the information in the transaction table. The IO coherence unit returns responses to requesting devices in compliance with device ordering requirements.
    • 公开了一种用于在多处理器系统中管理输入/输出请求的系统,装置和方法。 IO相干单元包括IO请求处理程序,可变大小事务表和IO响应处理程序。 交易表的大小根据挂起的IO请求数量而变化。 IO请求处理程序将关于待处理IO请求的信息存储在事务表中,以便在相关请求之间建立一个顺序,并允许无序处理不相关的请求。 IO响应处理程序跟踪对IO请求的响应,并更新事务表中的信息。 IO相干单元根据设备订购要求返回对请求设备的响应。
    • 85. 发明授权
    • Bitumen/rubber compositions crosslinked with polythiomorpholines, polysulfides and/or mercaptobenzimidazole
    • 用多硫代吗啉,多硫化物和/或巯基苯并咪唑交联的沥青/橡胶组合物
    • US07608650B2
    • 2009-10-27
    • US12367303
    • 2009-02-06
    • Paul BurasWilliam LeeJames ButlerWendy Stanley
    • Paul BurasWilliam LeeJames ButlerWendy Stanley
    • C08L95/00
    • E01C7/18C08L9/06C08L81/04C08L95/00C08L2666/08
    • Asphalt and elastomeric polymer compositions crosslinked with mixed polythiomorpholines or at least one alkyl polysulfide can give polymer modified asphalts (PMAs) with improved properties and/or reduced H2S evolution. When at least one alkyl polysulfide is used to completely or partially replace conventional crosslinkers such as S or MBT, mercaptobenzimidazole (MBI) may be optionally used as a co-crosslinker. The use of mixed polythiomorpholines as crosslinkers provide PMAs with better low temperature profiles (BBR m-values). The use of at least one alkyl polysulfide crosslinker gives PMAs with improved PAV-aged DSR results, and reduced H2S evolution. The use of at least one alkyl polysulfide crosslinker together with MBI may give PMAs with improved PAV DSR Fail Temperatures.
    • 用混合多硫代吗啉或至少一种烷基多硫化物交联的沥青和弹性聚合物组合物可以得到具有改进性能和/或降低的H 2 S进化的聚合物改性沥青(PMA)。 当使用至少一种烷基多硫化物来完全或部分替代常规交联剂如S或MBT时,巯基苯并咪唑(MBI)可以任选地用作共交联剂。 使用混合的聚硫代吗啉作为交联剂为PMA提供了更好的低温谱(BBR m值)。 使用至少一种烷基多硫化物交联剂使PMA具有改进的PAV老化的DSR结果,并降低了H2S进化。 使用至少一种烷基多硫化物交联剂与MBI一起可以使PMA具有改进的PAV DSR失败温度。
    • 88. 发明申请
    • Hydrophilic Coating Of polymeric Substrates
    • 聚合物基质亲水涂层
    • US20090155519A1
    • 2009-06-18
    • US11954264
    • 2007-12-12
    • William Lee
    • William Lee
    • A61L31/00B44C1/00
    • A61L31/10A61L27/34A61L2420/02A61L2420/08Y10T428/22
    • A method of coating a polymeric substrate with a hydrophilic polymer, including (1) applying a base polymer dispersed in a first solvent onto a surface of a substrate formed of a moldable polymer, the first solvent being capable of penetrating into the substrate; (2) removing the first solvent to leave behind on the surface a first polymeric layer, wherein the first layer is formed of the base polymer, at least some molecules of which are partially entrapped in the substrate; (3) applying a hydrophilic polymer dispersed in a second solvent onto the first layer, the second solvent being capable of penetrating into the first layer; and (4) removing the second solvent to leave behind on the first layer a second polymeric layer, wherein the second layer is formed of the hydrophilic polymer, at least some molecules of which are partially entrapped in the first layer. Also disclosed is a coated polymeric substrate prepared by this method.
    • 一种用亲水性聚合物涂覆聚合物基材的方法,包括(1)将分散在第一溶剂中的基础聚合物施加到由可模制聚合物形成的基材的表面上,所述第一溶剂能够渗透到基材中; (2)去除所述第一溶剂以在所述表面上留下第一聚合物层,其中所述第一层由所述基础聚合物形成,所述基础聚合物的至少一些分子被部分截留在所述基材中; (3)将分散在第二溶剂中的亲水性聚合物施加到第一层上,第二溶剂能够渗透到第一层中; 和(4)除去第二溶剂以在第一层上留下第二聚合物层,其中第二层由亲水性聚合物形成,其中至少一些分子被部分截留在第一层中。 还公开了通过该方法制备的涂覆的聚合物基材。
    • 89. 发明申请
    • SPECULATIVE READ IN A CACHE COHERENT MICROPROCESSOR
    • 在高速缓存中读取相关的微处理器
    • US20090089510A1
    • 2009-04-02
    • US11864363
    • 2007-09-28
    • William LeeThomas Benjamin Berg
    • William LeeThomas Benjamin Berg
    • G06F12/00
    • G06F12/0828G06F12/0815G06F12/0831G06F12/0871G06F2212/507G06F2212/621Y02D10/13
    • A cache coherence manager, disposed in a multi-core microprocessor, includes a request unit, an intervention unit, a response unit and an interface unit. The request unit receives coherent requests and selectively issues speculative requests in response. The interface unit selectively forwards the speculative requests to a memory. The interface unit includes at least three tables. Each entry in the first table represents an index to the second table. Each entry in the second table represents an index to the third table. The entry in the first table is allocated when a response to an associated intervention message is stored in the first table but before the speculative request is received by the interface unit. The entry in the second table is allocated when the speculative request is stored in the interface unit. The entry in the third table is allocated when the speculative request is issued to the memory.
    • 设置在多核微处理器中的高速缓存一致性管理器包括请求单元,干预单元,响应单元和接口单元。 请求单元接收相干请求并有选择地发出响应的推测请求。 接口单元选择性地将推测请求转发到存储器。 接口单元至少包括三个表。 第一个表中的每个条目表示第二个表的索引。 第二个表中的每个条目表示第三个表的索引。 当对相关干预消息的响应存储在第一表中但在接口单元接收到推测请求之前,分配第一表中的条目。 当推测请求存储在接口单元中时,分配第二个表中的条目。 当向内存发出推测请求时,会分配第三个表中的条目。