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    • 81. 发明授权
    • LDPC (low density parity check) coded signal decoding using parallel and simultaneous bit node and check node processing
    • LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理
    • US07958428B2
    • 2011-06-07
    • US11846761
    • 2007-08-29
    • Ba-Zhong ShenHau Thien TranKelly Brian Cameron
    • Ba-Zhong ShenHau Thien TranKelly Brian Cameron
    • H03M13/00
    • H03M13/1137H04L1/005H04L1/0057
    • LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing. This novel approach to decoding of LDPC coded signals may be described as being LDPC bit-check parallel decoding. In some alternative embodiment, the approach to decoding LDPC coded signals may be modified to LDPC symbol-check parallel decoding or LDPC hybrid-check parallel decoding. A novel approach is presented by which the edge messages with respect to the bit nodes and the edge messages with respect to the check nodes may be updated simultaneously and in parallel to one another. Appropriately constructed executing orders direct the sequence of simultaneous operation of updating the edge messages at both nodes types (e.g., edge and check). For various types of LDPC coded signals, including parallel-block LDPC coded signals, this approach can perform decoding processing in almost half of the time as provided by previous decoding approaches.
    • LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理。 这种LDPC编码信号的解码方法可以被描述为LDPC比特检验并行解码。 在一些替代实施例中,解码LDPC编码信号的方法可以被修改为LDPC符号校验并行解码或LDPC混合校验并行解码。 提出了一种新颖的方法,通过该方法可以相对于校验节点相对于比特节点和边缘消息的边缘消息可以同时并且彼此并行地更新。 适当构造的执行命令指示在两种节点类型(例如,边缘和检查)上更新边缘消息的同时操作的顺序。 对于包括并行块LDPC编码信号的各种类型的LDPC编码信号,该方法可以在几乎一半的时间内执行由先前的解码方法提供的解码处理。
    • 84. 发明授权
    • Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder
    • LDPC(低密度奇偶校验)解码器的基于子矩阵的实现
    • US07530002B2
    • 2009-05-05
    • US11360267
    • 2006-02-23
    • Tak K. LeeHau Thien TranBa-Zhong ShenKelly Brian Cameron
    • Tak K. LeeHau Thien TranBa-Zhong ShenKelly Brian Cameron
    • H03M13/00
    • H03M13/116H03M13/1137H03M13/255H03M13/27H03M13/6362H03M13/6566
    • Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which an LDPC coded signal is decoded by processing 1 sub-matrix at a time. A low density parity check matrix corresponding to the LDPC code includes rows and columns of sub-matrices. For example, when performing bit node processing, 1 or more sub-matrices in a column are processed; when performing check node processing, 1 or more sub-matrices in a row are processed. If desired, when performing bit node processing, the sub-matrices in each column are successively processed together (e.g., all column 1 sub-matrices, all column 2 sub-matrices, etc.). Analogously, when performing check node processing, the sub-matrices in each row can be successively processed together (e.g., all row 1 sub-matrices, all row 2 sub-matrices in row 2, etc.).
    • LDPC(低密度奇偶校验)解码器的基于子矩阵的实现。 提出了一种新颖的方法,通过该方法通过一次处理1个子矩阵对LDPC编码信号进行解码。 对应于LDPC码的低密度奇偶校验矩阵包括子矩阵的行和列。 例如,当执行位节点处理时,处理列中的一个或多个子矩阵; 当执行校验节点处理时,处理一行中的一个或多个子矩阵。 如果需要,当执行位节点处理时,每列中的子矩阵被连续处理(例如,所有列1个子矩阵,全部2个子矩阵等)。 类似地,当执行校验节点处理时,可以一起连续地处理每行中的子矩阵(例如,所有行1子矩阵,行2中的所有行2子矩阵等)。
    • 86. 发明授权
    • Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders
    • 高效设计实现LDPC(低密度奇偶校验)解码器中的min ** / min ** - 或max ** / max ** - 函数
    • US07447985B2
    • 2008-11-04
    • US11172165
    • 2005-06-30
    • Hau Thien TranKelly Brian CameronBa-Zhong Shen
    • Hau Thien TranKelly Brian CameronBa-Zhong Shen
    • G06F11/00H03M13/00
    • H03M13/3911H03M13/1111H03M13/1117H03M13/112H03M13/45H04L1/005H04L1/0057
    • Efficient design to implement min**/min**− or max**/max**− functions in LDPC (Low Density Parity Check) decoders. When compared to prior art approaches, the novel and efficient implementation presented herein allows for the use of substantially less hardware and surface area within an actual communication device implemented to perform these calculations. In certain embodiments, the min** processing (and/or max** processing) is implemented to assist in the computationally intensive calculations required to decoded LDPC coded signals. In one instance, this is operable to assist in check node processing when decoding LDPC coded signals. However, the efficient principles and architectures presented herein may be implemented within other communication device types to decode other types of coded signals as well. For example, the processing presented herein may perform calculations within a variety of decoders including LDPC decoders, turbo decoders, TTCM decoders, and/or other decoder types without departing from the scope and spirit of the invention.
    • 高效设计实现LDPC(低密度奇偶校验)解码器中的min ** / min ** - 或max ** / max ** - 函数。 当与现有技术方法相比时,本文提出的新颖且有效的实现允许在实现为执行这些计算的实际通信设备中使用实质上更少的硬件和表面积。 在某些实施例中,实现最小**处理(和/或最大**处理)以帮助解码LDPC编码信号所需的计算密集计算。 在一种情况下,这可用于在解码LDPC编码信号时辅助校验节点处理。 然而,本文呈现的有效原理和架构可以在其他通信设备类型内实现,以解码其他类型的编码信​​号。 例如,在不脱离本发明的范围和精神的情况下,这里呈现的处理可以在包括LDPC解码器,turbo解码器,TTCM解码器和/或其他解码器类型的各种解码器中执行计算。