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81. 发明授权

US07303965B2 MIS transistor and method for producing same 失效
标题翻译： MIS晶体管及其制造方法
公开(公告)号：US07303965B2
公开(公告)日：2007-12-04
申请号：US09879208
申请日：2001-06-13
申请人： Yukihito Oowaki , Mizuki Ono , Mitsuhiro Noguchi , Daisaburo Takashima , Akira Nishiyama
发明人： Yukihito Oowaki , Mizuki Ono , Mitsuhiro Noguchi , Daisaburo Takashima , Akira Nishiyama
IPC分类号： H01L21/33 , H01L21/3205 , H01L31/00
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/66621 , H01L29/78
摘要： In a MIS transistor, the top surfaces of source/drain regions (S/D diffusion layers) formed on a semiconductor substrate 1 are arranged nearer to a gate electrode than a channel plane on the semiconductor substrate, and the top surfaces of the source/drain regions are arranged nearer than the channel plane than the interface between a gate insulator film provided on the upper side of the channel plane and the gate electrode. In this transistor, a groove is selectively formed in the surface of the semiconductor substrate, and a polycrystalline silicon deposited in the groove may be used as a mask to form impurity diffusion layers serving as source/drain regions to laminate and form a gate insulator film of a high dielectric film and a gate electrode. Alternatively, the polycrystalline silicon may be selectively formed to be used as a mask to elevate and form the impurity diffusion layer to laminate and form the gate insulator film and the gate electrode. Thus, it is possible to achieve both of the reduction of the resistance of the S/D diffusion layers and the reduction of the gate parasitic capacitance.
摘要翻译：在MIS晶体管中，形成在半导体基板1上的源极/漏极区域（S / D扩散层）的上表面布置成比半导体衬底上的沟道平面更靠近栅电极，源极/漏极区域的顶表面漏区比布置在沟道平面上侧的栅极绝缘膜与栅电极之间的界面更靠近沟道平面。在该晶体管中，在半导体衬底的表面中选择性地形成沟槽，并且可以将沉积在沟槽中的多晶硅用作掩模，以形成用作源极/漏极区域的杂质扩散层，以层压并形成栅极绝缘膜的高介电膜和栅电极。或者，可以选择性地形成多晶硅以用作掩模以升高和形成杂质扩散层以层压并形成栅极绝缘膜和栅电极。因此，可以实现S / D扩散层的电阻的降低和栅极寄生电容的降低。

82. 发明授权

US07223859B2 Method for producing (R)-3-[4-(trifluoromethyl) phenylamino]-pentanoic acid amide derivative 失效
标题翻译：（R）-3- [4-（三氟甲基）苯基氨基] - 戊酸酰胺衍生物的制备方法
公开(公告)号：US07223859B2
公开(公告)日：2007-05-29
申请号：US10801141
申请日：2004-03-16
申请人： Tatsuyoshi Tanaka , Masanobu Sugawara , Hirofumi Maeda , Akira Nishiyama , Yoshihiko Yasohara , Nobuo Nagashima
发明人： Tatsuyoshi Tanaka , Masanobu Sugawara , Hirofumi Maeda , Akira Nishiyama , Yoshihiko Yasohara , Nobuo Nagashima
IPC分类号： C07D205/02 , C07C233/00
CPC分类号： C07D205/08 , C07C231/02 , C07C309/66 , C07C309/73
摘要： The present invention provides a method for easily producing an (R)-3-[4-(trifluoromethyl)phenylamino]-pentanoic acid amide derivative useful for an intermediate for pharmaceutical products, particularly an inhibitor of a cholesteryl ester transfer protein (CETP) from easily available raw materials. In the present invention, (S)-N-[4-(trifluoromethyl)phenyl]-3-hydroxypentanoic acid amide prepared from easily available raw materials leads a production of (R)-4-ethyl-1-[4-(trifluoromethyl)phenyl]-2-azetidinone to give (R)-3-[4-(trifluoromethyl)phenylamino]-pentanoic acid amide. Furthermore, (R)-4-ethyl-1-[4-(trifluoromethyl)phenyl]-2-azetidinone is reacted with a carbamic acid ester to give an (R)-3-[4-(trifluoromethyl)phenylamino]-pentanoic acid amide derivative.
摘要翻译：本发明提供了一种容易地制备用于药物产品中间体（特别是胆固醇酯转移蛋白（CETP）抑制剂）的（R）-3- [4-（三氟甲基）苯基氨基] - 戊酸酰胺衍生物的方法，容易获得的原料。在本发明中，由容易获得的原料制备的（S）-N- [4-（三氟甲基）苯基] -3-羟基戊酸酰胺导致（R）-4-乙基-1- [4-（三氟甲基））苯基] -2-氮杂环丁酮，得到（R）-3- [4-（三氟甲基）苯基氨基] - 戊酸酰胺。此外，将（R）-4-乙基-1- [4-（三氟甲基）苯基] -2-氮杂环丁酮与氨基甲酸酯反应，得到（R）-3- [4-（三氟甲基）苯基氨基] - 戊酸酰胺衍生物。

83. 发明申请

US20070034902A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070034902A1
公开(公告)日：2007-02-15
申请号：US11373140
申请日：2006-03-13
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L31/00
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.
摘要翻译：可以尽可能地防止器件特性的劣化。半导体器件包括：半导体衬底; 栅极绝缘膜，设置在所述半导体衬底的上方并且含有金属，氧和添加元素; 设置在所述栅极绝缘膜上方的栅电极; 以及设置在栅电极两侧的半导体衬底中的源/漏区。添加元素是选自浓度为0.003原子％以上且3原子％以下的第5,6,15和16族元素中的至少一种元素。

84. 发明申请

US20070020956A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070020956A1
公开(公告)日：2007-01-25
申请号：US11486252
申请日：2006-07-14
申请人： Yoshiki Kamata , Akira Nishiyama
发明人： Yoshiki Kamata , Akira Nishiyama
IPC分类号： H01L21/31
CPC分类号： H01L21/02181 , H01L21/02189 , H01L21/31637 , H01L21/31645 , H01L21/764 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： It is made possible to reduce the influence upon adjacent elements. Voids are provided in a Ge substrate. An insulation film containing Ge is provided to cover top faces of the voids.
摘要翻译：可以减少对相邻元件的影响。在Ge衬底中提供空隙。提供含有Ge的绝缘膜以覆盖空隙的顶面。

85. 发明授权

US07122470B2 Semiconductor device with a CMOS transistor 失效
标题翻译：具有CMOS晶体管的半导体器件
公开(公告)号：US07122470B2
公开(公告)日：2006-10-17
申请号：US11340549
申请日：2006-01-27
申请人： Masato Koyama , Akira Nishiyama
发明人： Masato Koyama , Akira Nishiyama
IPC分类号： H01L21/44
CPC分类号： H01L21/28088 , H01L21/823835 , H01L21/823842 , H01L29/4966 , H01L29/665
摘要： A semiconductor device having a gate electrode free from increasing of resistance of the gate electrode, from decreasing of capacitance of the insulation film due to depletion, and from penetrating of impurity. The semiconductor device includes a silicon layer, a gate insulating film formed on the silicon layer, a metal boron compound layer formed on the gate insulating film, and a gate electrode formed on the metal boron compound layer and containing at least silicon.
摘要翻译：一种半导体器件，具有不增加栅极电阻的栅电极，由于耗尽而导致的绝缘膜电容的减小和杂质渗透。半导体器件包括硅层，形成在硅层上的栅极绝缘膜，形成在栅极绝缘膜上的金属硼化合物层，以及形成在金属硼化合物层上并至少含有硅的栅电极。

86. 发明申请

US20060197157A1 Semiconductor device and method for manufacturing the same 失效
公开(公告)号：US20060197157A1
公开(公告)日：2006-09-07
申请号：US11235246
申请日：2005-09-27
申请人： Masato Koyama , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato Koyama , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L27/12
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.

87. 发明申请

US20060186488A1 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060186488A1
公开(公告)日：2006-08-24
申请号：US11407066
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

88. 发明申请

US20060038239A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060038239A1
公开(公告)日：2006-02-23
申请号：US11114105
申请日：2005-04-26
申请人： Yoshinori Tsuchiya , Akira Nishiyama
发明人： Yoshinori Tsuchiya , Akira Nishiyama
IPC分类号： H01L23/62
CPC分类号： H01L21/823842 , H01L21/84 , H01L27/1203 , H01L29/785
摘要： Disclosed is a semiconductor device comprising a semiconductor substrate having isolation regions a p-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a first metal layer at least at the gate electrode/gate insulator interface, and an n-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a boride layer of the first metal at least at an interface thereof with the gate insulating film.
摘要翻译：公开了一种半导体器件，包括具有隔离区域的半导体衬底，p型MIS晶体管，包括形成在半导体衬底中的一对源极/漏极区，形成在半导体衬底上的栅极绝缘膜，以及形成在栅极上的栅电极绝缘膜，并且至少在栅电极/栅极绝缘体界面处具有第一金属层，以及包括形成在半导体衬底中的一对源极/漏极区的n型MIS晶体管，形成在半导体衬底上的栅极绝缘膜，以及形成在所述栅极绝缘膜上并且至少在与所述栅极绝缘膜的界面处具有所述第一金属的硼化物层的栅电极。

89. 发明申请

US20060027879A1 Semiconductor device and method of manufacturing the same 失效
公开(公告)号：US20060027879A1
公开(公告)日：2006-02-09
申请号：US11244295
申请日：2005-10-06
申请人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
发明人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
IPC分类号： H01L29/76
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.

90. 发明授权

US06982467B2 Semiconductor device and method of manufacturing the same 失效
公开(公告)号：US06982467B2
公开(公告)日：2006-01-03
申请号：US10863204
申请日：2004-06-09
申请人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
发明人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
IPC分类号： H01L29/76
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.

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