专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US09608568B2 Transconductance optimization using feedback-balun-transformer with inductance degeneration combinations 有权
公开(公告)号：US09608568B2
公开(公告)日：2017-03-28
申请号：US14638874
申请日：2015-03-04
申请人： Futurewei Technologies, Inc.
发明人： Yoonhyuk Ro , Xuya Qiu , Jamil Forrester
IPC分类号： H03F1/02 , H03F3/16 , H03F3/45
CPC分类号： H03F1/0205 , H03F1/3211 , H03F1/347 , H03F3/16 , H03F3/45188 , H03F2200/117 , H03F2200/489 , H03F2203/45386 , H03F2203/45662 , H03F2203/45731
摘要： Disclosed are apparatuses and methods to overcome technology limitations to achieve linearity and efficiency performance suitable for practical wireless communications systems. In an embodiment, an amplifier is provided that superimposes the transconductance from a common source amplifier with inductor degeneration with the transconductance from a common source amplifier without degeneration. In an embodiment, an amplifier is provided having a feedback-balun-transformer that provides electro-magnetic coupling between primary, secondary, and negative feedback degeneration inductors and a differential to single-ended conversion output.

72. 发明授权

US08912845B2 Multiple winding transformer coupled amplifier 有权
标题翻译：多绕组变压器耦合放大器
公开(公告)号：US08912845B2
公开(公告)日：2014-12-16
申请号：US13736028
申请日：2013-01-07
申请人： Edward Perry Jordan
发明人： Edward Perry Jordan
IPC分类号： H03F1/34 , H03F1/00
CPC分类号： H03F1/00 , H03F1/347 , H03F3/195 , H03F3/211 , H03F2200/411 , H03F2200/489 , H03F2200/537
摘要： An integrated circuit includes a radio frequency (RF) amplifier having a trifilar transformer coupled to a gain device in two negative feedback paths. The trifilar transformer includes a first winding, a second winding and a third winding, a first dielectric core is disposed between the first winding and the second winding, and a second dielectric core is disposed between the second winding and the third winding. A first winding ratio between the first winding and the second winding combined with a second winding ratio between the second winding and the third winding affects a total gain of the RF amplifier. In a specific embodiment, the gain device is a transistor, the first winding is coupled to a base of the transistor, the second winding is coupled to a collector of the transistor, and the third winding is coupled to an emitter of the transistor.
摘要翻译：集成电路包括具有耦合到两个负反馈路径中的增益器件的三相变压器的射频（RF）放大器。三相变压器包括第一绕组，第二绕组和第三绕组，第一介质芯设置在第一绕组和第二绕组之间，第二介质芯设置在第二绕组和第三绕组之间。第一绕组和第二绕组之间的第一绕组比与第二绕组和第三绕组之间的第二绕组比组合影响RF放大器的总增益。在具体实施例中，增益器件是晶体管，第一绕组耦合到晶体管的基极，第二绕组耦合到晶体管的集电极，第三绕组耦合到晶体管的发射极。

73. 发明申请

US20100315151A1 POWER CONTROL CIRCUIT 失效
标题翻译：电源控制电路
公开(公告)号：US20100315151A1
公开(公告)日：2010-12-16
申请号：US12861465
申请日：2010-08-23
申请人： Alison Burdett
发明人： Alison Burdett
IPC分类号： H03K17/00
CPC分类号： G06F1/3203 , G06F1/3287 , G11C5/144 , G11C5/147 , H03F3/189 , H03F3/45188 , H03F2200/294 , H03F2200/372 , H03F2200/489 , H03F2200/492 , H03K23/544 , Y02D10/171 , Y02D50/20
摘要： Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least part of the integrated circuit is in the powered-up state.
摘要翻译：用于控制集成电路的装置包括用于控制至少部分集成电路的电力的功率控制装置，功率控制装置连接到用于接收掉电信号的第一输入端和用于接收功率的第二输入端功率控制装置适于在集成电路的至少一部分处于供电状态时在第二输入处接收到上电信号时对集成电路的至少一部分供电，并且所述功率控制装置还适于将所述集成电路的至少一部分保持在上电状态，而不管在所述集成电路的至少一部分处于供电状态时是否在所述第二输入处接收的任何信号。该装置被布置成使得第二输入也连接到集成电路的部件，并且该装置包括用于经由第二输入信号将信号发送到集成电路的部件的装置当集成电路的至少一部分处于上电状态时放置。

74. 发明授权

US07852146B2 Integrated channel filter using multiple resonant filters and method of operation 有权
标题翻译：使用多个谐振滤波器的集成通道滤波器和操作方法
公开(公告)号：US07852146B2
公开(公告)日：2010-12-14
申请号：US11999504
申请日：2007-12-04
申请人： Philip T. Hisayasu , Michael D. Womac
发明人： Philip T. Hisayasu , Michael D. Womac
IPC分类号： H03K5/00
CPC分类号： H03H7/12 , H03F1/22 , H03F3/19 , H03F3/50 , H03F2200/108 , H03F2200/294 , H03F2200/411 , H03F2200/489 , H03F2200/501 , H03F2203/5031 , H03H7/06 , H03H7/1758 , H03H11/1213 , H03H11/1291 , H03J3/20 , H03J2200/10
摘要： A circuit includes a first filter comprising a first inductor coupled to a first variable capacitor, wherein the first filter is associated with a first resonant frequency. The circuit further comprises an amplifier coupled to the first filter and a second filter coupled to the amplifier. The second filter comprises a second inductor coupled to a second variable capacitor, wherein the second filter is associated with a second resonant frequency that is substantially the same as the first resonant frequency. At least a portion of the first filter and at least a portion of the second filter are formed on an integrated circuit.
摘要翻译：电路包括第一滤波器，其包括耦合到第一可变电容器的第一电感器，其中第一滤波器与第一谐振频率相关联。电路还包括耦合到第一滤波器的放大器和耦合到放大器的第二滤波器。第二滤波器包括耦合到第二可变电容器的第二电感器，其中第二滤波器与基本上与第一谐振频率相同的第二谐振频率相关联。第一滤波器的至少一部分和第二滤波器的至少一部分形成在集成电路上。

75. 发明授权

US07808287B2 Frequency divider circuits 失效
标题翻译：分频器电路
公开(公告)号：US07808287B2
公开(公告)日：2010-10-05
申请号：US12161945
申请日：2007-01-15
申请人： Robin James Miller
发明人： Robin James Miller
IPC分类号： H03K25/00
CPC分类号： H03K23/544 , G06F1/3203 , G06F1/3287 , H03F3/189 , H03F3/45188 , H03F2200/294 , H03F2200/372 , H03F2200/489 , H03F2200/492 , Y02D10/126 , Y02D10/171
摘要： A circuit for deriving an output clock signal from an input clock signal, the output clock signal having a frequency which is 1/Nth of the frequency of the input clock signal, where N is an odd number. The circuit comprises a plurality of latches configured as a latch ring, the latches being arranged in successive pairs, each pair of latches comprising a first latch that switches on one of the rising or falling edge of the input clock signal, and a second latch that switches on the other of the rising or falling edge of the input clock signal. An RS flip flop is coupled to receive at one of its set and reset inputs an output from the latch ring that is switched on a rising edge, and at the other of the set and reset inputs an output from the latch ring that is switched on a falling edge. Said output clock signal is provided at an output of the RS flip flop.
摘要翻译：一种用于从输入时钟信号导出输出时钟信号的电路，所述输出时钟信号的频率是所述输入时钟信号的频率的1 / N，其中N是奇数。电路包括被配置为锁存环的多个锁存器，锁存器被连续地对配置，每对锁存器包括第一锁存器，其中第一锁存器接通输入时钟信号的上升沿或下降沿之一，以及第二锁存器，打开输入时钟信号的上升沿或下降沿的另一个。 RS触发器被耦合以在其设置和复位输入中的一个处接收来自在上升沿上接通的锁存环的输出，并且在另一个设置和复位输入处，来自锁存环的输出被接通一个下降的边缘。所述输出时钟信号被提供在RS触发器的输出处。

76. 发明授权

US07634248B2 Configurable circuits using phase change switches 有权
标题翻译：使用相变开关的可配置电路
公开(公告)号：US07634248B2
公开(公告)日：2009-12-15
申请号：US11461564
申请日：2006-08-01
申请人： Yang Xu , Lawrence Pileggi , Mehdi Asheghi
发明人： Yang Xu , Lawrence Pileggi , Mehdi Asheghi
IPC分类号： H04B1/16
CPC分类号： H01L45/1226 , H01L45/06 , H01L45/1206 , H01L45/1286 , H01L45/144 , H03D7/145 , H03D7/1458 , H03D7/165 , H03F1/22 , H03F1/26 , H03F1/565 , H03F3/195 , H03F3/45278 , H03F3/72 , H03F2200/111 , H03F2200/243 , H03F2200/249 , H03F2200/294 , H03F2200/372 , H03F2200/378 , H03F2200/417 , H03F2200/451 , H03F2200/489 , H03F2203/45306 , H03F2203/45371 , H03F2203/7215
摘要： Configurable circuits using phase change switches are described. The switches use phase change or phase transition material to create configurable connections between devices and/or interconnecting layers of an integrated circuit in order to change the behavior of the circuit after manufacturing. In at least some embodiments, the phase of the material can be a crystalline phase or an amorphous phase. A phase change can be caused by heating the material, such as with an ohmic heater fabricated on the IC. As one example, germanium-antimony-tellurium (GeSbTe) can be used for the phase change material. The switches can be used to create configurable circuits such as low noise amplifiers and mixers, which can in turn be used to create configurable receivers or other analog circuits.
摘要翻译：描述使用相变开关的可配置电路。开关使用相变或相变材料来在器件之间创建可配置的连接和/或互连集成电路的层，以便改变制造后的电路的行为。在至少一些实施方案中，材料的相可以是结晶相或非晶相。可以通过加热材料，例如用在IC上制造的欧姆加热器来引起相变。作为一个示例，锗 - 锑 - 碲（GeSbTe）可用于相变材料。这些开关可用于创建可配置的电路，如低噪声放大器和混频器，这些电路又可用于创建可配置接收器或其他模拟电路。

77. 发明授权

US07304533B2 Integrated channel filter using multiple resonant filters and method of operation 有权
标题翻译：使用多个谐振滤波器的集成通道滤波器和操作方法
公开(公告)号：US07304533B2
公开(公告)日：2007-12-04
申请号：US11107167
申请日：2005-04-15
申请人： Philip T. Hisayasu , Michael D. Womac
发明人： Philip T. Hisayasu , Michael D. Womac
IPC分类号： H03K5/00
CPC分类号： H03H7/12 , H03F1/22 , H03F3/19 , H03F3/50 , H03F2200/108 , H03F2200/294 , H03F2200/411 , H03F2200/489 , H03F2200/501 , H03F2203/5031 , H03H7/06 , H03H7/1758 , H03H11/1213 , H03H11/1291 , H03J3/20 , H03J2200/10
摘要： A circuit includes a first filter comprising a first inductor coupled to a first variable capacitor, wherein the first filter is associated with a first resonant frequency. The circuit further comprises an amplifier coupled to the first filter and a second filter coupled to the amplifier. The second filter comprises a second inductor coupled to a second variable capacitor, wherein the second filter is associated with a second resonant frequency that is substantially the same as the first resonant frequency. At least a portion of the first filter and at least a portion of the second filter are formed on an integrated circuit.
摘要翻译：电路包括第一滤波器，其包括耦合到第一可变电容器的第一电感器，其中第一滤波器与第一谐振频率相关联。电路还包括耦合到第一滤波器的放大器和耦合到放大器的第二滤波器。第二滤波器包括耦合到第二可变电容器的第二电感器，其中第二滤波器与基本上与第一谐振频率相同的第二谐振频率相关联。第一滤波器的至少一部分和第二滤波器的至少一部分形成在集成电路上。

78. 发明申请

US20060232329A1 Integrated channel filter using multiple resonant filters and method of operation 有权
标题翻译：使用多个谐振滤波器的集成通道滤波器和操作方法
公开(公告)号：US20060232329A1
公开(公告)日：2006-10-19
申请号：US11107167
申请日：2005-04-15
申请人： Philip Hisayasu , Michael Womac
发明人： Philip Hisayasu , Michael Womac
IPC分类号： H03K5/00
CPC分类号： H03H7/12 , H03F1/22 , H03F3/19 , H03F3/50 , H03F2200/108 , H03F2200/294 , H03F2200/411 , H03F2200/489 , H03F2200/501 , H03F2203/5031 , H03H7/06 , H03H7/1758 , H03H11/1213 , H03H11/1291 , H03J3/20 , H03J2200/10
摘要： A circuit includes a first filter comprising a first inductor coupled to a first variable capacitor, wherein the first filter is associated with a first resonant frequency. The circuit further comprises an amplifier coupled to the first filter and a second filter coupled to the amplifier. The second filter comprises a second inductor coupled to a second variable capacitor, wherein the second filter is associated with a second resonant frequency that is substantially the same as the first resonant frequency. At least a portion of the first filter and at least a portion of the second filter are formed on an integrated circuit.
摘要翻译：电路包括第一滤波器，其包括耦合到第一可变电容器的第一电感器，其中第一滤波器与第一谐振频率相关联。电路还包括耦合到第一滤波器的放大器和耦合到放大器的第二滤波器。第二滤波器包括耦合到第二可变电容器的第二电感器，其中第二滤波器与基本上与第一谐振频率相同的第二谐振频率相关联。第一滤波器的至少一部分和第二滤波器的至少一部分形成在集成电路上。

79. 发明申请

WO2018052539A1 CASCODE AMPLIFIER BIAS CIRCUITS 审中-公开
标题翻译： CASCODE放大器偏置电路
公开(公告)号：WO2018052539A1
公开(公告)日：2018-03-22
申请号：PCT/US2017/044015
申请日：2017-07-26
申请人： PEREGRINE SEMICONDUCTOR CORPORATION
发明人： KLAREN, Jonathan , WAGH, Poojan , KOVAC, David , SHAPIRO, Eric S. , CALANCA, Neil , NOBBE, Dan William , MURPHY, Christopher , ENGLEKIRK, Robert Mark , AYRANCI, Emre , BARGROFF, Keith , RANTA, Tero Tapio
IPC分类号： H03F3/195 , H03F3/213 , H03F3/24 , H03F1/22 , H03F1/30
CPC分类号： H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
摘要翻译：用于基于硅的放大器架构的偏置电路和方法，其耐受电源和偏置电压变化，偏置电流变化和晶体管堆叠高度，并补偿较差的输出电阻特性。实施例包括利用共源共栅基准电路在闭环偏置控制电路的控制下偏置共源共栅放大器的最后级的功率放大器和低噪声放大器。闭环偏置控制电路通过调整共射 - 共基放大器的最后级的栅极偏置电压，确保共源共栅参考电路中的电流近似等于已知电流值的选定倍数。通过级联放大器的最终电流是级联基准电路中的电流的倍数，基于表示级联放大器和级联基准电路中的晶体管器件的相对尺寸的器件缩放因子。

80. 发明申请

WO2016182691A1 RADIO FREQUENCY LOW NOISE AMPLIFIER WITH ON-CHIP MATCHING AND BUILT-IN TUNABLE FILTER 审中-公开
标题翻译：无线电频率低噪声放大器，具有片内匹配和内置TUNABLE滤波器
公开(公告)号：WO2016182691A1
公开(公告)日：2016-11-17
申请号：PCT/US2016/027949
申请日：2016-04-15
申请人： QUALCOMM INCORPORATED
发明人： WANG, Cheng-Han , DONOVAN, Conor , RICHMOND, Jesse Aaron , KO, Jin-Su
IPC分类号： H03F1/22 , H03F1/56 , H03F1/34 , H03F3/193 , H03F3/24
CPC分类号： H04B1/1027 , H03F1/223 , H03F1/347 , H03F1/565 , H03F3/19 , H03F3/193 , H03F3/211 , H03F3/24 , H03F3/245 , H03F2200/111 , H03F2200/294 , H03F2200/451 , H03F2200/489 , H04B1/0458 , H04B1/3827 , H04B1/48 , H04B2001/0408 , H04B2001/1072 , H04B2001/485
摘要： An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.
摘要翻译：放大器包括增益晶体管，其包括用于接收输入信号的控制端子。退化电感器耦合在增益晶体管的第一端和地之间。并联电感器和电容器串联耦合在增益晶体管的控制端和接地之间，并形成滤波器以在频率范围内衰减输入信号的频率。变性电感器和并联电感器形成变压器以提供阻抗匹配。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式