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71. 发明授权

US06530034B1 Method and apparatus for error recovery in a storage device 失效
标题翻译：用于存储设备中的错误恢复的方法和装置
公开(公告)号：US06530034B1
公开(公告)日：2003-03-04
申请号：US09435085
申请日：1999-11-05
申请人： Kenji Okada , Hideo Asano , Kazushige Okutsu
发明人： Kenji Okada , Hideo Asano , Kazushige Okutsu
IPC分类号： H02H305
CPC分类号： G11B5/59683 , G11B5/012 , G11B19/04 , G11B20/1816 , G11B27/36 , G11B33/14 , G11B2005/0016 , G11B2020/183 , G11B2220/20
摘要： Method and apparatus are described for recovery from temporary errors in a disk drive resulting from excessive temperature or the like. After a first error recovery procedure has been executed and failed, a waiting time is selected after which a second error recovery procedure will be performed. The length of the waiting time can be determined by the measured temperature if a sensor is included in the drive. If the error still cannot be recovered after the waiting period, the location where the error had occurred is temporarily registered as defective. Subsequently the drive will retest the failing location and remove the temporary defect registration if the error has been removed by, for example, the temperature having gone down.
摘要翻译：描述了用于从过度温度等导致的磁盘驱动器中的临时错误的恢复的方法和装置。在执行第一个错误恢复过程并失败之后，选择等待时间，之后执行第二个错误恢复过程。如果驱动器中包含传感器，则可以通过测量的温度来确定等待时间的长度。如果在等待期后错误仍然无法恢复，则发生错误的位置暂时被注册为有缺陷。随后，如果错误已经通过例如温度下降而被去除，则驱动器将重新测试故障位置并移除临时缺陷注册。

72. 发明授权

US06219750B1 Disk drive having control mechanism to reduce or eliminate redundant write operations and the method thereof 失效
标题翻译：具有减少或消除冗余写入操作的控制机制的磁盘驱动器及其方法
公开(公告)号：US06219750B1
公开(公告)日：2001-04-17
申请号：US09049682
申请日：1998-03-27
申请人： Atshushi Kanamaru , Toshio Kakihara , Hideo Asano , Atsushi Tobari
发明人： Atshushi Kanamaru , Toshio Kakihara , Hideo Asano , Atsushi Tobari
IPC分类号： G06F1208
CPC分类号： G06F3/0616 , G06F3/0659 , G06F3/0677 , G06F12/0866 , G06F2212/312
摘要： A disk drive and a control method thereof to reduce the number of write operations to a medium while minimizing command overhead time. A disk drive 10 comprises a hard disk controller (HDC) 13, a cache memory 14, and a host interface controller (HIC) 15 with a command queue for retaining a plurality of commands which are cached in cache memory 14. The HIC 15 performs the periphery interface processing by hardware. The disk drive 10 further comprises a local microprocessor unit (MPU) 16 for controlling the overall operation of HDD 10, including operations of HDC 13 and HIC 15. The local MPU 16 instructs the HIC 15 to write data to a medium by write commands cached in the cache memory 14. When local MPU 16 retrieves a command from a plurality of write commands cached in cache memory 14 which is completely overwritten by a command more recently issued, a write operation to the medium is not performed by the retrieved command.
摘要翻译：一种磁盘驱动器及其控制方法，用于在将命令开销时间最小化的同时减少对介质的写入操作的数量。磁盘驱动器10包括硬盘控制器（HDC）13，高速缓存存储器14和主机接口控制器（HIC）15，其具有用于保存缓存在高速缓存存储器14中的多个命令的命令队列.HIC 15执行外围接口由硬件处理。磁盘驱动器10还包括用于控制HDD10的整体操作的本地微处理器单元（MPU）16，包括HDC 13和HIC 15的操作。本地MPU 16指令HIC 15通过缓存的写命令将数据写入介质在本地MPU16从缓存在高速缓冲存储器14中的多个写入命令中检索出被最近发出的命令完全覆盖的写入命令的命令时，不会通过检索到的命令来执行对介质的写入操作。

73. 发明授权

US6061805A Method for executing an error recovery procedure 失效
标题翻译：执行错误恢复过程的方法
公开(公告)号：US6061805A
公开(公告)日：2000-05-09
申请号：US969204
申请日：1997-11-12
申请人： Hiroaki Suzuki , Hideo Asano , Atsushi Tobari , Satoshi Nishino , Shuji Yamada , Haruo Andoh , Tsuguaki Kowa
发明人： Hiroaki Suzuki , Hideo Asano , Atsushi Tobari , Satoshi Nishino , Shuji Yamada , Haruo Andoh , Tsuguaki Kowa
IPC分类号： G06F3/06 , G06F11/00 , G11B19/00 , G11B19/04 , G11B20/00 , G11B20/10 , G11B20/18
CPC分类号： G11B19/041
摘要： An error recovery procedure (ERP) in a storage device such as a rotating magnetic hard disk drive is executed to the last step regardless of the established time-out period for an instruction, thereby more reliably recovering from errors. In accordance with one embodiment of the invention, when a disk drive receives a reset instruction from a host during the execution of an ERP, it executes the ERP until the error is recovered, or to the last step without interrupting the ERP. Further, in accordance with another embodiment of the invention, when a disk drive receives a reset instruction during the execution of an ERP, it stops execution of the ERP and holds the number K of the step which was completed immediately before stopping, and when receiving a retry instruction after that, sequentially executes the ERP from the K+1-th error recovery step.
摘要翻译：执行诸如旋转磁盘驱动器的存储装置中的错误恢复过程（ERP）到最后步骤，而不管建立的指令的超时周期，从而更可靠地从错误中恢复。根据本发明的一个实施例，当磁盘驱动器在执行ERP期间从主机接收到重置指令时，它执行ERP直到错误被恢复，或者直到最后一步而不中断ERP。此外，根据本发明的另一实施例，当磁盘驱动器在执行ERP期间接收到重置指令时，它停止执行ERP并保持在停止之前立即完成的步骤的数量K，并且当接收到之后的重试指令，从第K + 1错误恢复步骤顺序地执行ERP。

74. 发明授权

US5896540A Method and apparatus for controlling data transfer between a host and a peripheral in a pre-reading mode, post-reading mode and both-reading mode 失效
标题翻译：用于在预读取模式，后读取模式和双读模式下控制主机和外围设备之间的数据传输的方法和装置
公开(公告)号：US5896540A
公开(公告)日：1999-04-20
申请号：US496284
申请日：1995-06-28
申请人： Hideo Asano , Masayuki Murakaami
发明人： Hideo Asano , Masayuki Murakaami
IPC分类号： G06F13/10 , G06F3/06 , G06F13/00
CPC分类号： G06F3/0607 , G06F3/0658 , G06F3/0674
摘要： The object is to control an interrupt request to be asserted to a host in all of a prereading mode, a postreading mode, and a both-reading mode. Until the count value of a counter becomes equal to the content of a delay register, the reset state of a flip-flop is held and an IRQ is not asserted to the host. When the read signal of a status register is input through an OR gate to a flip-flop for a period in which the count value of the counter becomes equal to the content of the delay register, the flip-flop is set and the Q output remains held in a logic high state, as the postreading mode or the both-reading mode. When the counter value of the counter becomes equal to the content of the delay register, the output of a comparator will go low and the flip-flop will be reset, so that the IRQ is asserted to the host by a CDR.
摘要翻译：目的是在所有的预读模式，后处理模式和双读模式下控制要向主机发出的中断请求。在计数器的计数值等于延迟寄存器的内容之前，保持触发器的复位状态，并且不向主机发出IRQ。当状态寄存器的读取信号通过或门通过触发器输入到计数器的计数值等于延迟寄存器的内容的时段时，触发器被置位且Q输出保持在逻辑高状态，作为后置模式或双读模式。当计数器的计数器值等于延迟寄存器的内容时，比较器的输出将变为低电平，并且触发器将被复位，以使IRQ由CDR断言到主机。

75. 发明授权

US5519882A System for configuring a disk drive as a master or slave by either cable or local selection with only one jumper block or one switching device 失效
标题翻译：用于通过电缆或本地选择将磁盘驱动器配置为主机或从机的系统，只能使用一个跳线块或一个交换设备
公开(公告)号：US5519882A
公开(公告)日：1996-05-21
申请号：US205971
申请日：1994-03-03
申请人： Hideo Asano , Masayuki Murakami , Keisuke Shimomura
发明人： Hideo Asano , Masayuki Murakami , Keisuke Shimomura
IPC分类号： G06F3/06 , G06F13/14 , G06F13/40 , G11B33/06 , G06F9/00 , G06F13/00
CPC分类号： G06F13/4072
摘要： An object of the present invention is to specify two disk drive apparatuses which are connected to an AT interface as a master or slave HDD for local or cable selection by only one jumper block. A disk drive apparatus connected to data processing means through a plurality of interface lines including one interface line connected to a first voltage level of said data processing means, including:a plurality of connection points connected respectively to said plurality of interface lines,a first connection point capable of being selectively connected to said one interface line,a second connection point kept at a floating voltage,a third connection point tied to the first voltage level,a fourth connection point tied to a second voltage level and selectively connected to one of said first, second, and third connection points, andcontrol means connected to said fourth connection point and recognizes itself as a first or second disk drive apparatus by detecting a voltage level of the fourth connection point.
摘要翻译：本发明的目的是指定两个磁盘驱动装置，它们连接到AT接口作为主硬盘或从硬盘，用于仅由一个跳线块进行本地或电缆选择。一种磁盘驱动装置，通过包括与所述数据处理装置的第一电压电平连接的一个接口线的多个接口线连接到数据处理装置，包括：分别连接到所述多个接口线的多个连接点，第一连接能够选择性地连接到所述一个接口线，保持在浮动电压的第二连接点，与第一电压电平相关的第三连接点，连接到第二电压电平的第四连接点，并且选择性地连接到所述第一，第二和第三连接点，以及连接到所述第四连接点的控制装置，并且通过检测第四连接点的电压电平将其自身识别为第一或第二盘驱动装置。

76. 发明授权

US5511939A Multi-blades fan device 失效
标题翻译：多叶片风扇设备
公开(公告)号：US5511939A
公开(公告)日：1996-04-30
申请号：US280998
申请日：1994-07-27
申请人： Takahiro Tokunaga , Yukio Uemura , Hideo Asano , Hikaru Sugi , Teruhiko Kameoka , Yasushi Kondo
发明人： Takahiro Tokunaga , Yukio Uemura , Hideo Asano , Hikaru Sugi , Teruhiko Kameoka , Yasushi Kondo
IPC分类号： F04D17/08 , F04D29/16 , F04D29/42
CPC分类号： B60H1/00471 , F04D17/08 , F04D29/162 , F04D29/4206
摘要： A multi-blade fan having a fan assembly including a bottom plate and a plurality of circumferentially spaced blades and a casing for the fan assembly therein having an outlet duct extending therefrom for discharge of the air flows. The fan assembly includes an annular shroud connected to the axial ends of the blades remote from the bottom plate. The casing includes a bottom wall for rotatably connecting the fan assembly, a top wall for defining an air inlet for axially introducing the air into the casing, and a tubular wall connecting the bottom and top walls. The top wall of the casing adjacent to the inlet opening forms an annular projection having a bell cross sectional shape opened inwardly so that an axial end of the shroud extends thereto. The bell cross section portion radially extends to a portion that is inclined downwardly in the outward direction, which faces the shroud so that a small gap extending radially is created. The top wall or bottom wall of the casing at its radially outer portion can be downwardly inclined. The tubular wall of the casing can also be inclined so that the bottom end of the tubular wall is flared radially outward from its center.
摘要翻译：具有风扇组件的多叶片风扇包括底板和多个周向间隔开的叶片和用于其中的风扇组件的壳体，其具有从其延伸的出口管道用于排出空气流。风扇组件包括连接到远离底板的叶片的轴向端部的环形罩。壳体包括用于可旋转地连接风扇组件的底壁，用于限定用于将空气轴向地引入壳体的空气入口的顶壁和连接底壁和顶壁的管状壁。与入口开口相邻的壳体的顶壁形成具有向内敞开的钟形横截面形状的环形突起，使得护罩的轴向端部延伸到其上。钟形截面部分径向地延伸到面向罩的向外方向向下倾斜的部分，从而产生径向延伸的小间隙。壳体的径向外部的顶壁或底壁可以向下倾斜。壳体的管状壁也可以倾斜，使得管状壁的底端从其中心径向向外张开。

77. 发明授权

US5457787A Interface circuit for controlling data transfers 失效
标题翻译：用于控制数据传输的接口电路
公开(公告)号：US5457787A
公开(公告)日：1995-10-10
申请号：US130951
申请日：1993-10-04
申请人： Hideo Asano , Masayuki Murakami
发明人： Hideo Asano , Masayuki Murakami
IPC分类号： G06F3/06 , G06F13/10 , G06F13/12 , G06F13/38 , G06F13/14
CPC分类号： G06F13/122 , G06F13/385
摘要： An interface circuit for a peripheral device is disclosed that can accurately cope with any host with the same hardware whether the host is in the pre-read mode or the post-read mode and can send an interrupt request to the host practically without a waiting time if the host is in the post-read mode. The interface circuit generates an interrupt request (IRQ) to a host in response to a data request (DRQ) from a peripheral device (HDD) and drops the interrupt request if the status of the peripheral device is read by the host; it detects that the host operates in a post-read mode, and responds to the post-read mode detect signal and the status reading by the host in order to enable the regeneration of the interrupt request to the host.
摘要翻译：公开了一种用于外围设备的接口电路，其可以准确地处理具有相同硬件的任何主机，无论主机是处于预读模式还是后读模式，并且可以在几乎没有等待时间的情况下向主机发送中断请求如果主机处于后读模式。接口电路响应于来自外围设备（HDD）的数据请求（DRQ）向主机产生中断请求（IRQ），并且如果主机读取外围设备的状态，则中断请求将被丢弃; 它检测到主机在后置读取模式下操作，并且响应于后置读取模式检测信号和主机的状态读取，以便能够向主机再生中断请求。

78. 发明授权

US5457658A Nonvolatile memory with cluster-erase flash capability and solid state file apparatus using the same 失效
标题翻译：具有簇擦除闪存能力的非易失性存储器和使用其的固态文件设备
公开(公告)号：US5457658A
公开(公告)日：1995-10-10
申请号：US200343
申请日：1994-02-23
申请人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
发明人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
IPC分类号： G06F3/08 , G06F3/06 , G06F12/00 , G06F12/02 , G11C16/02 , G11C16/10 , G11C17/00 , G11C13/00
CPC分类号： G06F3/0601 , G06F12/023 , G06F12/0246 , G11C16/102 , G06F2003/0694 , G06F2212/7209
摘要： A nonvolatile memory with cluster-erase flash capability. A cluster information sector is included in each of N clusters, the cluster information sector of each cluster being written with the sequence number assigned to the cluster so that no two clusters have the same sequence number. When erasing a given sector, a controller saves its sequence number prior to erasure. Then, when initializing a given erased sector, the controller sets its sequence number to a value greater than the current maximum sequence number. The controller writes user data to sectors other than the cluster information sector for the cluster thus initialized according to their address sequence. Accordingly, an invalid sector can be distinguished from a valid sector without using an overwrite approach.
摘要翻译：具有集群擦除闪存功能的非易失性存储器。集群信息扇区被包括在N个簇中的每一个中，每个簇的簇信息扇区被分配给簇的序列号写入，使得没有两个簇具有相同的序列号。擦除给定扇区时，控制器在擦除之前保存序列号。然后，当初始化给定的擦除扇区时，控制器将其序列号设置为大于当前最大序列号的值。控制器将用户数据写入群集信息扇区以外的扇区，根据其地址序列进行初始化。因此，可以将无效扇区与有效扇区区分开而不使用覆盖方法。

79. 发明授权

US5406529A Flash non-volatile memory 失效
标题翻译：闪存非易失性存储器
公开(公告)号：US5406529A
公开(公告)日：1995-04-11
申请号：US125058
申请日：1993-09-21
申请人： Hideo Asano
发明人： Hideo Asano
IPC分类号： G11C17/00 , G06F3/06 , G11C16/02 , G11C16/34
CPC分类号： G11C16/3495 , G06F3/0601 , G11C16/349 , G06F2003/0694
摘要： A flash-erase memory includes a plurality of blocks accessible by a processor and, in association with each block, a block ID representing an address (RBA) specified by the processor upon writing, a revision code (RC) indicating how many times the processor performed writing using the same RBA, and an erase count (EC) indicating the number of times of erasing of this block are stored. Writing is performed to a writable block having the minimum erase count, and if there is a different block having the same block ID as the address specified by the processor, its revision code is updated and used as a revision code of the written block, and the different block is erased and its erase count is updated.
摘要翻译：闪存擦除存储器包括可由处理器访问的多个块，并且与每个块相关联地表示表示处理器在写入时指定的地址（RBA）的块ID，指示处理器多少次的修订代码（RC）使用相同的RBA执行写入，并且存储指示该块的擦除次数的擦除计数（EC）。对具有最小擦除次数的可写入块执行写入，并且如果存在与由处理器指定的地址具有相同块ID的不同块，则其修订代码被更新并用作所写入的块的修订代码，并且擦除不同的块并擦除擦除次数。

80. 发明授权

US4686578A GII/GIII transmission system 失效
标题翻译： GII / GIII传输系统
公开(公告)号：US4686578A
公开(公告)日：1987-08-11
申请号：US672011
申请日：1984-11-16
申请人： Hideo Asano
发明人： Hideo Asano
IPC分类号： H04N1/41 , H04N1/413 , H04N1/415 , H04N1/40
CPC分类号： H04N1/4135 , H04N1/415
摘要： A document is moved across a scanner unit and successive PEL lines are scanned. Reflected light from the document with the high PEL density produces binary signal 1 or 0 in accordance with the amount of the reflected light received by the scanner. The PEL data of binary 1 or 0 of one PEL line are serially supplied to a serial parallel conversion circuit, which converts the input serial data to a parallel data and supplies the parallel data to a two PEL line buffer. The two PEL line buffer stores PEL data of the succeeding two PEL lines. Sample windows are set up and the size of the sample windows is selected as equal to the PEL size. The sample windows enclose four bits which are used to access a conversion table. The four bits in the sample window produce sixteen combinations of the white or black PELs. The conversion table stores sixteen data or entries which represent degree of amplitude modulation for the carrier signal of the transmission mode. A modulator within the system modulates the amplitude of the carrier signal of the transmission mode using AM-PM-VSB, in accordance with the bit combination sampled by the sample window, such as by the distribution status or the position of black or white high density PELs enclosed by the sample window.
摘要翻译：文档移动扫描仪单元并扫描连续的PEL线。具有高PEL密度的文件的反射光根据扫描仪接收到的反射光量产生二进制信号1或0。一个PEL线的二进制1或0的PEL数据串行提供给串行并行转换电路，其将输入的串行数据转换为并行数据，并将并行数据提供给两个PEL线路缓冲器。两个PEL线缓冲器存储后续两个PEL线的PEL数据。设置样品窗口，并选择样品窗口的大小等于PEL尺寸。示例窗口包含用于访问转换表的四位。样本窗口中的四位产生白色或黑色PEL的十六种组合。转换表存储表示传输模式的载波信号的幅度调制度的十六个数据或条目。系统内的调制器根据采样窗采样的位组合，例如通过分布状态或黑白高密度位置调制AM-PM-VSB传输模式的载波信号的幅度 PEL由样品窗口包围。

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