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71. 发明申请

US20110012190A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110012190A1
公开(公告)日：2011-01-20
申请号：US12888140
申请日：2010-09-22
申请人： Masayuki Tanaka , Daisuke Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
发明人： Masayuki Tanaka , Daisuke Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
IPC分类号： H01L29/68
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521 , H01L29/7883
摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

72. 发明申请

US20100288995A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100288995A1
公开(公告)日：2010-11-18
申请号：US12728028
申请日：2010-03-19
申请人： Yoshio Ozawa , Katsuyuki Sekine , Kazuaki Nakajima
发明人： Yoshio Ozawa , Katsuyuki Sekine , Kazuaki Nakajima
IPC分类号： H01L45/00 , H01L21/20
CPC分类号： H01L45/1273 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1641
摘要： A semiconductor memory device includes: a lower electrode including a plurality of projections formed on a top surface thereof; an oxide film covering the top surface and made of an oxide of a same metal as a metal contained in the lower electrode; and a resistance variable film provided on the oxide film and being in contact with the oxide film, the projections being buried in the oxide film, and a lower layer portion of the resistance variable film having an oxygen concentration lower than an oxygen concentration of a portion other than the lower layer portion of the resistance variable film.
摘要翻译：半导体存储器件包括：下电极，其包括形成在其顶表面上的多个突起; 覆盖上表面并由与下部电极中所含的金属相同的金属的氧化物构成的氧化膜; 以及设置在氧化膜上并与氧化膜接触的电阻变化膜，所述突起被埋在氧化物膜中，并且电阻变化膜的下层部分的氧浓度低于部分的氧浓度除了电阻可变膜的下层部分之外。

73. 发明申请

US20100219460A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20100219460A1
公开(公告)日：2010-09-02
申请号：US12662881
申请日：2010-05-10
申请人： Yoshio Ozawa
发明人： Yoshio Ozawa
IPC分类号： H01L29/792
CPC分类号： H01L29/42332 , H01L27/115 , H01L27/11568 , H01L29/7883
摘要： A semiconductor device including a semiconductor substrate, a tunnel insulation film provided on the surface of the semiconductor substrate, charge trap states at which an electron potential energy is higher than a Fermi level of the semiconductor substrate being provided at part of the tunnel insulation film at least in the vicinity of an interface with the semiconductor substrate, and at least one charge storage layer being provided on the tunnel insulation film, charges supplied from the semiconductor substrate via the tunnel insulation film being accumulated in the charge storage layer.
摘要翻译：一种半导体器件，包括半导体衬底，设置在半导体衬底的表面上的隧道绝缘膜，其中电子势能高于在隧道绝缘膜的部分处设置的半导体衬底的费米能级的电荷陷阱状态至少在与半导体衬底的界面附近，并且至少一个电荷存储层设置在隧道绝缘膜上，通过隧道绝缘膜积聚在电荷存储层中从半导体衬底提供的电荷。

74. 发明申请

US20100184266A1 METHOD OF MANUFACTURING A NON-VOLATILE NAND MEMORY SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：制造非易失性NAND存储器半导体集成电路的方法
公开(公告)号：US20100184266A1
公开(公告)日：2010-07-22
申请号：US12715455
申请日：2010-03-02
申请人： Toshitake YAEGASHI , Yoshio Ozawa
发明人： Toshitake YAEGASHI , Yoshio Ozawa
IPC分类号： H01L21/8234
CPC分类号： H01L27/115 , H01L27/11521
摘要： A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.
摘要翻译：半导体集成电路器件包括：第一，第二栅电极，第一，第二扩散层，电连接到第一扩散层的接触电极;第一绝缘膜，其在第一和第二栅电极之间具有凹入部分，并且不含氮作为主要成分，形成在第一绝缘膜上并且不含氮作为主要成分的第二绝缘膜和形成在第一扩散层上的第三绝缘膜，第一栅电极，第二扩散层和第二栅电极，第二绝缘膜设置在部分区域之间。形成第二绝缘膜以填充凹部，并且第一和第二栅电极之间的部分具有至少包含第一绝缘膜和第二绝缘膜的多层结构。

75. 发明申请

US20100157680A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100157680A1
公开(公告)日：2010-06-24
申请号：US12638836
申请日：2009-12-15
申请人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
发明人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
IPC分类号： G11C16/04 , H01L29/792 , H01L21/28 , G11C11/34
CPC分类号： H01L21/28282
摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
摘要翻译：半导体器件包括半导体区域，形成在半导体区域上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，形成在电荷存储绝缘膜上的块绝缘膜和形成的控制栅电极在所述块绝缘膜上，其中所述隧道绝缘膜包括形成在所述半导体区域的表面上并且包含硅和氧的第一区域，包含硅和氮的第二区域，形成在所述第二区域的背面的电荷存储绝缘膜并且包含硅和氧，以及至少形成在第一区域和第二区域之间或者在第二区域和第三区域之间形成的绝缘区域，并且包含硅和氮和氧，并且第二区域形成在第一区域和第三区域之间。

76. 发明授权

US07705391B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07705391B2
公开(公告)日：2010-04-27
申请号：US11226287
申请日：2005-09-15
申请人： Yoshio Ozawa
发明人： Yoshio Ozawa
IPC分类号： H01L21/336
CPC分类号： H01L29/42324 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/7881
摘要： According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an upper portion which is narrower in a channel width direction than a lower portion, an interelectrode insulating film formed on the floating gate electrodes, and a control gate electrode which is formed on the interelectrode insulating film formed on the floating gate electrodes and partially buried between the floating gate electrodes opposing each other.
摘要翻译：根据本发明的一个方面，提供了一种包括多个存储单元的半导体器件，包括多个浮置栅电极，形成在形成在半导体衬底上的隧道绝缘膜上，并且具有较窄的上部沟道宽度方向比下部，形成在浮栅上的电极间绝缘膜，以及控制栅电极，形成在形成在浮置栅电极上且部分地埋在浮置栅电极之间的电极间绝缘膜上，。

77. 发明授权

US07687346B2 Method of manufacturing a non-volatile NAND memory semiconductor integrated circuit 有权
标题翻译：制造非易失性NAND存储器半导体集成电路的方法
公开(公告)号：US07687346B2
公开(公告)日：2010-03-30
申请号：US11943325
申请日：2007-11-20
申请人： Toshitake Yaegashi , Yoshio Ozawa
发明人： Toshitake Yaegashi , Yoshio Ozawa
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521
摘要： A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.
摘要翻译：半导体集成电路器件包括：第一，第二栅电极，第一，第二扩散层，电连接到第一扩散层的接触电极;第一绝缘膜，其在第一和第二栅电极之间具有凹入部分，并且不含氮作为主要成分，形成在第一绝缘膜上并且不含氮作为主要成分的第二绝缘膜，以及形成在第一扩散层上的第三绝缘膜，第一栅电极，第二扩散层和第二栅电极，第二绝缘膜设置在部分区域之间。形成第二绝缘膜以填充凹部，并且第一和第二栅电极之间的部分具有至少包含第一绝缘膜和第二绝缘膜的多层结构。

78. 发明申请

US20100019312A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100019312A1
公开(公告)日：2010-01-28
申请号：US12510577
申请日：2009-07-28
申请人： Katsuyuki SEKINE , Akiko Sekihara , Kensuke Takano , Yoshio Ozawa
发明人： Katsuyuki SEKINE , Akiko Sekihara , Kensuke Takano , Yoshio Ozawa
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/792 , H01L27/11565 , H01L27/11578 , H01L27/11582 , H01L29/513 , H01L29/66833 , H01L29/7926
摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on a surface of the semiconductor region, a charge-storage insulating film formed on a surface of the tunnel insulating film and containing silicon and nitrogen, a block insulating film formed on a surface of the charge-storage insulating film, and a control gate electrode formed on a surface of the block insulating film, wherein the tunnel insulating film has a first insulating film formed on the surface of the semiconductor region and containing silicon and oxygen, a second insulating film formed on a surface of the first insulating film, and a third insulating film formed on a surface of the second insulating film and containing silicon and oxygen, and a charge trap state in the second insulating film has a lower density than that in the charge-storage insulating film.
摘要翻译：半导体器件包括半导体区域，形成在半导体区域的表面上的隧道绝缘膜，形成在隧道绝缘膜的表面上并含有硅和氮的电荷存储绝缘膜，形成在表面上的块状绝缘膜以及形成在所述块绝缘膜的表面上的控制栅电极，其中所述隧道绝缘膜具有形成在所述半导体区域的表面上并且包含硅和氧的第一绝缘膜，第二绝缘膜形成在第一绝缘膜的表面上的膜，以及形成在第二绝缘膜的表面上并且含有硅和氧的第三绝缘膜，并且第二绝缘膜中的电荷陷阱状态具有比电荷密度低的密度 - 绝缘膜。

79. 发明授权

US07651914B2 Manufacturing method of a nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件的制造方法
公开(公告)号：US07651914B2
公开(公告)日：2010-01-26
申请号：US12176559
申请日：2008-07-21
申请人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
发明人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
IPC分类号： H01L21/336 , H01L21/3205 , H01L21/28
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/513
摘要： A manufacturing method of a nonvolatile semiconductor memory device including: providing a first insulating film and a silicon film on a semiconductor substrate; providing a fifth insulating film containing silicon and oxygen on the silicon film; providing a second insulating film containing silicon and nitrogen on the fifth insulating film; providing a third insulating film on the second insulating film, the third insulating film is composed of a single-layer insulating film containing oxygen or multiple-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, and relative dielectric constant of the single-layer insulating film and the stacked insulating film being larger than relative dielectric constant of a silicon oxide film; providing a fourth insulating film containing silicon and nitrogen on the third insulating film; and providing a control gate above the fourth insulating film.
摘要翻译：一种非易失性半导体存储器件的制造方法，包括：在半导体衬底上提供第一绝缘膜和硅膜; 在硅膜上提供含有硅和氧的第五绝缘膜; 在第五绝缘膜上提供含有硅和氮的第二绝缘膜; 在所述第二绝缘膜上提供第三绝缘膜，所述第三绝缘膜由包含氧或多层堆叠绝缘膜的单层绝缘膜组成，所述单层绝缘膜至少其顶层和底层上的膜含有氧，并且相对单层绝缘膜和叠层绝缘膜的介电常数大于氧化硅膜的相对介电常数; 在所述第三绝缘膜上提供含有硅和氮的第四绝缘膜; 以及在所述第四绝缘膜上方设置控制栅极。

80. 发明申请

US20090269894A1 Semiconductor device and method of fabricating the same cross-reference to related applications 失效
标题翻译：制造与相关应用相同交叉参考的半导体器件和方法
公开(公告)号：US20090269894A1
公开(公告)日：2009-10-29
申请号：US12457892
申请日：2009-06-24
申请人： Yoshio Ozawa , Isao Kamioka
发明人： Yoshio Ozawa , Isao Kamioka
IPC分类号： H01L21/336
CPC分类号： H01L29/6656 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/665 , H01L29/6653 , H01L29/66575 , H01L29/66825 , H01L29/78
摘要： A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，形成在栅电极两侧的半导体衬底中的源极/漏极扩散层，以及沟道在所述源极/漏极扩散层的源极和漏极之间形成并布置在所述栅极绝缘膜的下方的所述半导体衬底中的所述源极/漏极扩散层的上表面位于所述栅电极的底表面的下方，以及沟道区的上表面位于源/漏扩散层的上表面的下方。

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