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    • 73. 发明授权
    • Systems and methods for hard decision assisted decoding
    • 硬判决辅助解码的系统和方法
    • US08443267B2
    • 2013-05-14
    • US12430927
    • 2009-04-28
    • Hao ZhongShaohua YangWeijun TanChangyou XuYuan Xing Lee
    • Hao ZhongShaohua YangWeijun TanChangyou XuYuan Xing Lee
    • G06F11/00
    • H03M13/1111H03M13/1108H03M13/1128H03M13/3715H03M13/6331
    • Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a processing loop circuit having a data detector and a soft decision decoder. The data detector provides a detected output, and the soft decision decoder applies a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output. The systems further include a queuing buffer and a hard decision decoder. The queuing buffer is operable to store the soft decision output, and the hard decision decoder accesses the soft decision output and applies a hard decoding algorithm to yield a second hard decision output. The data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了一种包括具有数据检测器和软判决解码器的处理环路电路的数据处理系统。 数据检测器提供检测输出,软判决解码器将软解码算法应用于检测输出的导数,以产生软决策输出和第一硬决策输出。 该系统还包括排队缓冲器和硬判决解码器。 排队缓冲器可操作以存储软判决输出,并且硬判决解码器访问软决策输出并应用硬解码算法以产生第二硬决策输出。 如果软判决解码器和硬判决解码器不能收敛,则数据检测器可操作以对软决策输出的导数执行数据检测。
    • 75. 发明申请
    • Systems and Methods for Data Detection Using Distance Based Tuning
    • 使用基于距离的调整进行数据检测的系统和方法
    • US20120207201A1
    • 2012-08-16
    • US13310028
    • 2011-12-02
    • Haitao XiaWeijun TanNenad MiladinovicShaohua Yang
    • Haitao XiaWeijun TanNenad MiladinovicShaohua Yang
    • H04L27/01
    • H04L25/03254H04L25/0305
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括均衡器电路和数据检测电路的数据处理电路。 均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波,并提供相应的一系列滤波样本。 数据检测电路包括:核心数据检测器电路和系数确定电路。 核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理,并提供最可能的路径和下一个最可能的路径。 系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。
    • 76. 发明授权
    • Systems and methods for enhanced media defect detection
    • 增强介质缺陷检测的系统和方法
    • US08219892B2
    • 2012-07-10
    • US12399713
    • 2009-03-06
    • Weijun TanHongwei SongShaohua Yang
    • Weijun TanHongwei SongShaohua Yang
    • G06F11/00
    • G11B5/09G11B20/10009G11B20/10046G11B20/10055H03M13/3905
    • Various embodiments of the present invention provide systems and methods for detecting storage medium defects. As one example, a media defect detection system is disclosed that includes a data detector circuit that applies a detection algorithm to the data input and provides a hard output and a soft output. A first circuit combines a first derivative of the hard output with a derivative of the data input to yield a first combined signal. A second circuit combines a second derivative of the hard output with a derivative of the first combined signal to yield a second combined signal. A third circuit combines a derivative of the soft output with the second combined signal and a threshold value to yield a defect signal.
    • 本发明的各种实施例提供了用于检测存储介质缺陷的系统和方法。 作为一个示例,公开了一种媒体缺陷检测系统,其包括将检测算法应用于数据输入并提供硬输出和软输出的数据检测器电路。 第一电路将硬输出的一阶导数与数据输入的导数组合以产生第一组合信号。 第二电路将硬输出的二阶导数与第一组合信号的导数组合以产生第二组合信号。 第三电路将软输出的导数与第二组合信号和阈值组合以产生缺陷信号。
    • 77. 发明授权
    • Method for detecting short burst errors in LDPC system
    • 用于检测LDPC系统中短脉冲串错误的方法
    • US08201051B2
    • 2012-06-12
    • US12287959
    • 2008-10-15
    • Weijun TanShaohua YangHongwei Song
    • Weijun TanShaohua YangHongwei Song
    • H03M13/00
    • H03M13/1128H03M13/17
    • The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.
    • 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入,其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入,其中第二信号输入被配置为接收第二信号。 该装置包括逻辑门,其中逻辑门可操作用于接收第一信号输入端,第一信号输入端,经由第二信号输入端接收第二信号,并根据接收到的第一信号和第二信号产生逻辑输出门信号 信号。 此外,该器件包括滤波器,其中滤波器被配置为从逻辑门接收逻辑输出门信号,并且基于接收的逻辑输出门信号产生滤波器输出信号,其中滤波器输出信号可用于标记误差。