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71. 发明授权

US08735263B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08735263B2
公开(公告)日：2014-05-27
申请号：US13346754
申请日：2012-01-10
申请人： Shunpei Yamazaki , Junichi Koezuka , Kazuya Hanaoka
发明人： Shunpei Yamazaki , Junichi Koezuka , Kazuya Hanaoka
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254
摘要： An SOI substrate is manufactured by the following steps: a semiconductor substrate is irradiated with an ion beam in which the proportion of H2O+ to hydrogen ions (H3+) is lower than or equal to 3%, preferably lower than or equal to 0.3%, whereby an embrittled region is formed in the semiconductor substrate; a surface of the semiconductor substrate and a surface of a base substrate are disposed so as to be in contact with each other, whereby the semiconductor substrate and the base substrate are bonded; and a semiconductor layer is separated along the embrittled region from the semiconductor substrate which is bonded to the base substrate by heating the semiconductor substrate and the base substrate, so that the semiconductor layer is formed over the base substrate.
摘要翻译：通过以下步骤制造SOI衬底：用H 2 O +与氢离子（H3 +）的比例低于或等于3％，优选低于或等于0.3％的离子束照射半导体衬底，由此在半导体衬底中形成脆化区域; 将半导体基板的表面和基板的表面配置成彼此接触，由此结合半导体基板和基板; 并且通过加热半导体衬底和基底衬底而将半导体层沿着与半导体衬底分离的结合到基底衬底上，使得半导体层形成在基底衬底上。

72. 发明授权

US08324084B2 Manufacturing method of semiconductor substrate and manufacturing method of semiconductor device 有权
标题翻译：半导体衬底的制造方法和半导体器件的制造方法
公开(公告)号：US08324084B2
公开(公告)日：2012-12-04
申请号：US13072150
申请日：2011-03-25
申请人： Junichi Koezuka
发明人： Junichi Koezuka
IPC分类号： H01L21/322
CPC分类号： H01L21/26506 , H01L21/268 , H01L21/76254 , H01L21/84 , H01L27/1203
摘要： An object is to provide a manufacturing method of a semiconductor substrate provided with a single crystal semiconductor layer with a surface having a high degree of flatness. Another object is to manufacture a semiconductor device with high reliability by using the semiconductor substrate provided with a single crystal semiconductor layer with a high degree of flatness. In a manufacturing process of a semiconductor substrate, a thin embrittled region containing a large crystal defect is formed in a single crystal semiconductor substrate at a predetermined depth by subjecting the single crystal semiconductor substrate to a rare gas ion irradiation step, a laser irradiation step, and a hydrogen ion irradiation step. Then, by performing a separation heating step, a single crystal semiconductor layer that is flatter on a surface side than the embrittled region is transferred to a base substrate.
摘要翻译：本发明的目的是提供具有平坦度高的表面的具有单晶半导体层的半导体衬底的制造方法。另一个目的是通过使用具有高度平坦度的单晶半导体层的半导体衬底来制造具有高可靠性的半导体器件。在半导体衬底的制造工艺中，通过对单晶半导体衬底进行稀有气体离子照射步骤，激光照射步骤，在单晶半导体衬底中以预定深度形成含有大晶体缺陷的薄脆化区域，和氢离子照射步骤。然后，通过进行分离加热工序，在比脆化区域更平坦的表面侧的单晶半导体层被转印到基底基板上。

73. 发明授权

US07879701B2 Manufacturing method of semiconductor device 有权
公开(公告)号：US07879701B2
公开(公告)日：2011-02-01
申请号：US11474499
申请日：2006-06-26
申请人： Junichi Koezuka , Hiroshi Ohki , Taku Hasegawa , Mami Goto
发明人： Junichi Koezuka , Hiroshi Ohki , Taku Hasegawa , Mami Goto
IPC分类号： H01L21/425
CPC分类号： H01J37/3171 , H01J27/024 , H01J37/302 , H01J37/32357 , H01J37/32412 , H01J37/3266 , H01J2237/006 , H01J2237/08 , H01L21/2236 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/78621
摘要： Doping with suppressed filament deterioration can be performed even in the case of doping in various conditions with an ion doping apparatus having a filament. After ion doping is completed, supply of a material gas is stopped and hydrogen or a rare gas is kept to be supplied. After that, current of the filament is decreased and correspondingly, filament temperature is decreased. Accordingly, in decreasing the filament temperature, the material gas around the filament has been replaced with hydrogen or a rare gas.

74. 发明授权

US07442631B2 Doping method and method of manufacturing field effect transistor 有权
标题翻译：掺杂方法和制造场效应晶体管的方法
公开(公告)号：US07442631B2
公开(公告)日：2008-10-28
申请号：US11346378
申请日：2006-02-03
申请人： Junichi Koezuka , Naoki Suzuki
发明人： Junichi Koezuka , Naoki Suzuki
IPC分类号： H01L21/425
CPC分类号： H01L29/78621 , H01L21/26513 , H01L29/66757
摘要： A doping method comprising the steps of; obtaining a proportion X of ions of a compound including a donor or an acceptor impurity in total ions from mass spectrum by using a first source gas of a first concentration; analyzing a peak concentration Y of the compound in a first processing object which is doped by using a second source gas of a second concentration equal to or lower than the first concentration, referring to a dose amount of total ions as D0 and setting an acceleration voltage at a value, obtaining a dose amount D1 of total ions from a expression, Y=(D1/D0)(aX+b), and doping a second processing object with the donor or the acceptor impurity by a ion doping apparatus using a third source gas, wherein a dose amount of total ions is set at D1, and an acceleration voltage is set at the value.
摘要翻译：一种掺杂方法，包括以下步骤：通过使用第一浓度的第一源气体从质谱获得包含供体或受体杂质的化合物的离子的比例X; 通过使用第二浓度等于或低于第一浓度的第二源气体掺杂的第一处理对象中的化合物的峰浓度Y，参考总离子的剂量D为0， / SUB>，并将加速电压设定为一个值，从表达式获得总离子的剂量D D 1，Y =（D 1 / D 0 （aX + b），并且通过使用第三源气体的离子掺杂装置与供体或受体杂质掺杂第二处理对象，其中总离子的剂量设定为D 1 ，将加速电压设定为该值。

75. 发明授权

US07417241B2 Ion implantation method and method for manufacturing semiconductor device 有权
标题翻译：离子注入法及制造半导体器件的方法
公开(公告)号：US07417241B2
公开(公告)日：2008-08-26
申请号：US11319207
申请日：2005-12-28
申请人： Junichi Koezuka , Hiroto Shinoda
发明人： Junichi Koezuka , Hiroto Shinoda
IPC分类号： G21K5/10 , G21G5/00 , A61N5/00
CPC分类号： H01J37/08 , C23C8/36 , H01J37/3171 , H01J2237/31705 , H01L21/265 , H01L27/1214 , H01L27/127
摘要： An object of the present invention is to provide an ion implantation method for shortening a down time of an ion implantation apparatus after exposure of a chamber and for improving throughput and a method for manufacturing a semiconductor device. Specifically, the object of the invention is to provide an ion implantation method that can improve throughput during an ion implantation step of B and a method for manufacturing a semiconductor device. The ion implantation method comprises the steps of: introducing an impurity imparting p-type conductivity and H2O in an ion source; ionizing the impurity imparting p-type conductivity; and implanting into a semiconductor film.
摘要翻译：本发明的目的是提供一种离子注入方法，用于缩短室内暴露后的离子注入装置的停机时间并提高生产量，以及制造半导体装置的方法。具体地说，本发明的目的在于提供一种能够提高B的离子注入工序时的生产率的离子注入方法以及半导体装置的制造方法。离子注入方法包括以下步骤：在离子源中引入赋予p型导电性的杂质和H 2 O 2; 电离杂质赋予p型导电性; 并植入半导体膜。

76. 发明授权

US07316947B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07316947B2
公开(公告)日：2008-01-08
申请号：US10072931
申请日：2002-02-12
申请人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
发明人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
IPC分类号： H01L21/00
CPC分类号： H01L29/66757 , G02F1/13454 , H01L27/12 , H01L27/1277 , H01L29/78621 , H01L29/78624 , H01L29/78675 , H01L29/78678
摘要： An object is to reduce the number of high temperature (equal to or greater than 600° C.) heat treatment process steps and achieve lower temperature (equal to or less than 600° C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing a noble (rare) gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.
摘要翻译：目的是减少高温（等于或高于600℃）的热处理工艺步骤，达到较低的温度（等于或小于600℃）的工艺，并简化工艺步骤并增加在制造半导体器件的方法中的吞吐量。通过本发明，在具有结晶结构的第一半导体膜上形成有阻挡层，第二半导体膜和含有贵重（稀有）气体元素的第三半导体膜。进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层。

77. 发明授权

US07141822B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07141822B2
公开(公告)日：2006-11-28
申请号：US10066542
申请日：2002-02-05
申请人： Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Shunpei Yamazaki , Hideaki Kuwabara
发明人： Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Shunpei Yamazaki , Hideaki Kuwabara
IPC分类号： H01L29/786
CPC分类号： H01L29/78696 , H01L21/02532 , H01L21/02672 , H01L21/02675 , H01L27/1277 , H01L27/1296 , H01L29/66757 , H01L29/78621 , Y10S257/913
摘要： The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.
摘要翻译： TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。本发明提供了减少电特性偏差的TFT及其制造方法。本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。如图所示。如图1所示，后气体元件至少包含在通道区域的上层中。

78. 发明授权

US07033871B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07033871B2
公开(公告)日：2006-04-25
申请号：US11061780
申请日：2005-02-22
申请人： Osamu Nakamura , Shunpei Yamazaki , Koji Dairiki , Masayuki Kajiwara , Junichi Koezuka , Satoshi Murakami
发明人： Osamu Nakamura , Shunpei Yamazaki , Koji Dairiki , Masayuki Kajiwara , Junichi Koezuka , Satoshi Murakami
IPC分类号： H01L21/00
CPC分类号： H01L27/12 , H01L21/02532 , H01L21/02672 , H01L21/02675 , H01L21/3226 , H01L27/1277 , H01L29/66757 , H01L29/78621 , H01L29/78624 , H01L29/78633 , H01L29/78645 , H01L29/78675
摘要： According to the present invention, an impurity region, to which a rare gas element (also called a rare gas) and one kind or a plurality of kinds of elements selected from the group consisting of H, H2, O, O2, and P are added, are formed in a semiconductor film having a crystalline structure, using a mask, and gettering for segregating a metal element contained in the semiconductor film to the impurity region by heat treatment. Thereafter, pattering is conducted using the mask, whereby a semiconductor layer made of the semiconductor film having a crystalline structure is formed.
摘要翻译：根据本发明，将稀有气体元素（也称为稀有气体）和选自H，H 2 O 2的一种或多种元素的杂质区域，，O，O 2 +和P添加时，使用掩模形成在具有晶体结构的半导体膜中，并且通过使用掩模将包含在半导体膜中的金属元素分离到杂质区域的吸杂热处理。此后，使用掩模进行图案化，由此形成由具有晶体结构的半导体膜制成的半导体层。

79. 发明授权

US06913956B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06913956B2
公开(公告)日：2005-07-05
申请号：US10051064
申请日：2002-01-18
申请人： Takashi Hamada , Satoshi Murakami , Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Toru Takayama
发明人： Takashi Hamada , Satoshi Murakami , Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Toru Takayama
IPC分类号： G02F1/133 , G02F1/1362 , H01L21/00 , H01L21/02 , H01L21/20 , H01L21/3065 , H01L21/322 , H01L21/336 , H01L21/77 , H01L21/8234 , H01L21/84 , H01L27/04 , H01L27/12 , H01L29/04 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786
CPC分类号： H01L21/02672 , G02F1/13454 , H01L21/2022 , H01L21/3226 , H01L27/12 , H01L27/1248 , H01L27/1277 , H01L27/1288 , H01L27/3246 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/66765 , H01L29/78621 , H01L51/5253 , H01L51/56
摘要： The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semiconductor film to the semiconductor film containing a rare gas element by a heat treatment. Furthermore, a first impurity region and a second impurity region formed in a semiconductor layer of a first n-channel TFT are provided outside a gate electrode. A third impurity region formed in a semiconductor layer of a second n-channel TFT is provided so as to be partially overlapped with a gate electrode. A third impurity region is provided outside a gate electrode. A fourth impurity region formed in a semiconductor layer of a p-channel TFT is provided so as to be partially overlapped with a gate electrode. A fifth impurity region is provided outside a gate electrode.
摘要翻译：本发明的特征在于，在通过阻挡层使用催化元件而获得的结晶半导体膜上形成含有稀有气体元素的半导体膜，催化元素从结晶半导体膜移动到含有稀有气体元素通过热处理。此外，形成在第一n沟道TFT的半导体层中的第一杂质区域和第二杂质区域设置在栅电极的外侧。形成在第二n沟道TFT的半导体层中的第三杂质区域设置成与栅电极部分重叠。第三杂质区域设置在栅极外部。形成在p沟道TFT的半导体层中的第四杂质区域设置成与栅电极部分重叠。第五杂质区域设置在栅极外部。

80. 发明申请

US20050142818A1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20050142818A1
公开(公告)日：2005-06-30
申请号：US11061780
申请日：2005-02-22
申请人： Osamu Nakamura , Shunpei Yamazaki , Koji Dairiki , Masayuki Kajiwara , Junichi Koezuka , Satoshi Murakami
发明人： Osamu Nakamura , Shunpei Yamazaki , Koji Dairiki , Masayuki Kajiwara , Junichi Koezuka , Satoshi Murakami
IPC分类号： H01L21/20 , H01L21/322 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786 , H01L21/00 , C30B1/00 , H01L21/36
CPC分类号： H01L27/12 , H01L21/02532 , H01L21/02672 , H01L21/02675 , H01L21/3226 , H01L27/1277 , H01L29/66757 , H01L29/78621 , H01L29/78624 , H01L29/78633 , H01L29/78645 , H01L29/78675
摘要： According to the present invention, an impurity region, to which a rare gas element (also called a rare gas) and one kind or a plurality of kinds of elements selected from the group consisting of H, H2, O, O2, and P are added, are formed in a semiconductor film having a crystalline structure, using a mask, and gettering for segregating a metal element contained in the semiconductor film to the impurity region by heat treatment. Thereafter, pattering is conducted using the mask, whereby a semiconductor layer made of the semiconductor film having a crystalline structure is formed.
摘要翻译：根据本发明，将稀有气体元素（也称为稀有气体）和选自H，H 2 O 2的一种或多种元素的杂质区域，，O，O 2 +和P添加时，使用掩模形成在具有晶体结构的半导体膜中，并且通过使用掩模将包含在半导体膜中的金属元素分离到杂质区域的吸杂热处理。此后，使用掩模进行图案化，由此形成由具有晶体结构的半导体膜制成的半导体层。

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