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    • 73. 发明申请
    • Acupuncture Meridian Measurement System
    • 针灸子午线测量系统
    • US20120316457A1
    • 2012-12-13
    • US13279742
    • 2011-10-24
    • Hao MengCharles Lee
    • Hao MengCharles Lee
    • A61B5/053
    • A61H39/02A61B5/0532A61B5/4854A61H2230/65
    • The present disclosure relates to an acupuncture meridian measurement system. The acupuncture meridian measurement system comprises: a signal generator configured to generate an alternating current excitation signal; an impedance measurer coupled to the signal generator and configured to measure a biological impedance between a fixed point to be measured and at least one selected point of an object; an acupuncture point determiner coupled to the impedance measurer and configured to locate an acupuncture point based on the measured biological impedance, wherein, the determined acupuncture point is a selected point, the biological impedance between which and the fixed point is less than a threshold. A technical problem solved by an embodiment of the present disclosure is to realize an accurate location of the acupuncture meridian. A use of an embodiment of the present disclosure is to locate acupuncture meridian and Yuan acupuncture points.
    • 本公开涉及针灸子午线测量系统。 针灸子午线测量系统包括:信号发生器,被配置为产生交流激励信号; 阻抗测量器,其耦合到所述信号发生器并且被配置为测量待测量的固定点与对象的至少一个选定点之间的生物阻抗; 一个针刺点确定器,耦合到阻抗测量器并被配置为基于所测量的生物阻抗来定位针刺点,其中,所确定的针刺点是所选点,其与固定点之间的生物阻抗小于阈值。 通过本公开的实施例解决的技术问题是实现针灸子午线的准确位置。 使用本公开的实施例是定位针灸子宫和元针灸穴位。
    • 80. 发明申请
    • SRAM Cache & Flash Micro-Controller with Differential Packet Interface
    • 具有差分数据包接口的SRAM缓存和闪存微控制器
    • US20080098164A1
    • 2008-04-24
    • US11876251
    • 2007-10-22
    • Charles LeeDavid ChowAbraham MaFrank YuMing-Shiang Shen
    • Charles LeeDavid ChowAbraham MaFrank YuMing-Shiang Shen
    • G06F12/00
    • G06F12/0866G06F2212/2022G06F2212/2515
    • A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The SRAM buffer also operates as a cache of flash data after booting is complete. Cache read and write hits use the SRAM cache rather than flash memory, while old cache lines and read misses access the flash memory. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory. The flash microcontroller uses a differential interface to the external host, with a differential transceiver and a differential serial interface. Frame, packet, and encoded clock processing is also performed by the serial interface.
    • 闪存微控制器具有静态随机存取存储器(SRAM)缓冲器,其存储从闪存读取的几个引导代码块。 引导完成后,SRAM缓冲区还可以作为闪存数据缓存。 缓存读取和写入命中使用SRAM缓存而不是闪存,而旧的缓存行和读取未命中访问闪存。 外部主机和微控制器均由缓冲在SRAM缓冲区中的引导代码引导。 引导加载器状态机读取闪存ID,并使用Flash存储器的时序参数对闪存参数寄存器进行编程。 闪存单片机使用与外部主机的差分接口,具有差分收发器和差分串行接口。 帧,分组和编码时钟处理也由串行接口执行。