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71. 发明申请

US20070054444A1 Manufacturing method of a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20070054444A1
公开(公告)日：2007-03-08
申请号：US10557746
申请日：2005-03-29
申请人： Satoshi Shibata
发明人： Satoshi Shibata
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/324
摘要： An amorphous layer 101 is formed in a region from a surface of a silicon substrate 100 to a first depth A. At this time, defects 103 are generated near an amorphous-crystal interface 102. By heat treatment, the crystal structure of the amorphous layer 101 is restored in a region from the first depth A to a second depth B that is shallower than the first depth A. The resultant amorphous layer 101 extends from the surface of the silicon substrate 100 to the second depth B. The defects 103 remain at the first depth A. By ion implantation, a pn junction 104 is formed at a third depth C that is shallower than the second depth B.
摘要翻译：在从硅衬底100的表面到第一深度A的区域中形成非晶层101.此时，在非晶 - 晶界面102附近产生缺陷103。通过热处理，非晶层的晶体结构 101在从第一深度A到浅于第一深度A的第二深度B的区域中恢复。所得到的非晶层101从硅衬底100的表面延伸到第二深度B.缺陷103保持在第一深度A.通过离子注入，在比第二深度B浅的第三深度C处形成pn结104。

72. 发明申请

US20060079044A1 Method for fabricating electronic device 有权
标题翻译：电子设备制造方法
公开(公告)号：US20060079044A1
公开(公告)日：2006-04-13
申请号：US11241950
申请日：2005-10-04
申请人： Satoshi Shibata , Fumitoshi Kawase , Hisako Kamiyanagi , Emi Kanazaki
发明人： Satoshi Shibata , Fumitoshi Kawase , Hisako Kamiyanagi , Emi Kanazaki
IPC分类号： H01L21/8234
CPC分类号： H01L21/26586 , H01L29/6659 , H01L29/7833
摘要： In a method for fabricating an electronic device including a transistor with a drain extension structure, a correspondence between a size of a gate electrode of the transistor and ion implantation conditions or heat treatment conditions for forming the drain extension structure is previously obtained. This correspondence satisfies that the transistor has a given threshold voltage. After formation of the gate electrode and measurement of the size of the gate electrode, ion implantation conditions or heat treatment conditions for forming the drain extension structure are set based on the previously-obtained correspondence and the measured size of the gate electrode. Ion implantation or heat treatment for forming the drain extension structure is performed under the ion implantation conditions or heat treatment conditions that have been set.
摘要翻译：在制造包括具有漏极延伸结构的晶体管的电子器件的方法中，预先获得晶体管的栅电极的尺寸和离子注入条件或用于形成漏极延伸结构的热处理条件之间的对应关系。该对应性满足晶体管具有给定的阈值电压。在形成栅电极并测量栅电极的尺寸之后，基于先前获得的对应关系和所测量的栅电极的尺寸来设定用于形成漏极延伸结构的离子注入条件或热处理条件。用于形成漏极延伸结构的离子注入或热处理在已设定的离子注入条件或热处理条件下进行。

73. 发明申请

US20050140036A1 Biaxial oriented polyester container and method of manufacturing the container 有权
标题翻译：双轴取向聚酯容器及其制造方法
公开(公告)号：US20050140036A1
公开(公告)日：2005-06-30
申请号：US10500192
申请日：2003-08-19
申请人： Norihisa Hirota , Satoshi Shibata
发明人： Norihisa Hirota , Satoshi Shibata
IPC分类号： B29C49/06 , B29C49/12 , B29C49/18 , B29C49/64 , B29C49/78 , B65D1/00 , B65D1/02 , G01B1/00 , B29C31/00
CPC分类号： B65D1/0223 , B29B2911/1402 , B29B2911/14026 , B29B2911/14033 , B29B2911/1404 , B29B2911/14053 , B29B2911/14066 , B29B2911/1408 , B29B2911/14093 , B29B2911/14106 , B29B2911/1412 , B29B2911/14126 , B29B2911/14133 , B29B2911/14146 , B29B2911/14153 , B29B2911/14213 , B29B2911/14226 , B29C49/06 , B29C49/12 , B29C49/18 , B29C49/649 , B29C49/78 , B29C2049/1219 , B29K2067/00 , B29L2031/7158 , B29L2031/716
摘要： A biaxially oriented polyester container with a uniformly and sufficiently elongated and thin-walled bottom part having excellent drop strength, improved ESC resistance and reduced weight, and a method of manufacturing the container. The biaxially oriented polyester container of the present invention is characterized in that, when an X-ray diffraction measurement is performed in and near a bottom center area of the biaxially oriented polyester container formed by a double-stage orientation blow molding method, a peak indicative of molecular orientation is observed near a diffraction angle of 2θ=15 to 30° and an orientation parameter (BO) expressed by the following formula (1) is in the range of 0.5≦BO≦2 in and near the bottom center area: orientation parameter (BO)=Ix/Iy (1) (where Ix indicates a diffraction intensity near the diffraction angle of 2θ=15 to 30° when the X-ray diffraction measurement is performed in the X-direction, and ly indicates a diffraction intensity near the diffraction angle of 2θ=15 to 30° when the X-ray diffraction measurement is performed in a direction orthogonal to that for Ix)
摘要翻译：具有均匀且充分伸长的薄壁底部的双轴取向聚酯容器，具有优异的滴落强度，改进的耐ESC性和减轻的重量，以及制造该容器的方法。本发明的双轴取向聚酯容器的特征在于，在通过双级取向吹塑成型法形成的双轴取向聚酯容器的底部中心区域附近进行X射线衍射测定时，在2θ= 15〜30°的衍射角附近观察到分子取向，并且由下式（1）表示的取向参数（BO）在底部中心区域附近的0.5 <= BO <= 2的范围内：<？in-line-formula description =“在线公式”end =“lead”？> orientation parameter（BO）= Ix / Iy（1）<？in-line-formula description =“In-line Formulas” end =“tail”？>（其中，Xx表示在X方向进行X射线衍射测定时的衍射角接近2θ= 15〜30°的衍射强度，并且ly表示衍射角附近的衍射强度当X射线衍射测量直接进行时，为2θ= 15〜30° 离子与Ix正交）

74. 发明申请

US20050128635A1 Apparatus and method for calculating disk shift amount in disk drive 失效
标题翻译：用于计算磁盘驱动器中磁盘移位量的装置和方法
公开(公告)号：US20050128635A1
公开(公告)日：2005-06-16
申请号：US11000925
申请日：2004-12-02
申请人： Satoshi Shibata
发明人： Satoshi Shibata
IPC分类号： G11B21/10 , G11B5/596
CPC分类号： G11B5/59627
摘要： A main controller, such as a CPU, causes a runout detector to relearn a runout component using as an initial value a learned value for a runout component of a disk runout that may occur as a disk rotates, the learned value being acquired during manufacture of a disk drive. The learned value for the runout component used as the initial value is saved to a nonvolatile storage device. The main controller calculates a disk shift amount on the basis of a runout component obtained through relearning (that is, a relearned value) and the learned value acquired during the manufacture of the disk drive and used as the initial value.
摘要翻译：诸如CPU的主控制器使得跳动检测器使用作为初始值来重新学习跳动组件，该学习值可以在磁盘旋转时发生的磁盘跳动的跳动组件的学习值，所学习的值在制造期间获取磁盘驱动器用作初始值的跳动组件的学习值将保存到非易失性存储设备。主控制器基于通过再学习获得的跳动分量（即重新学习的值）和在盘驱动器的制造期间获取的学习值用作初始值来计算磁盘移位量。

75. 发明授权

US06891693B2 Apparatus and method for head positioning control in disk drive 失效
标题翻译：磁盘驱动器中磁头定位控制的装置和方法
公开(公告)号：US06891693B2
公开(公告)日：2005-05-10
申请号：US10059156
申请日：2002-01-31
申请人： Satoshi Shibata
发明人： Satoshi Shibata
IPC分类号： G11B21/10 , G11B5/596
CPC分类号： G11B5/59627
摘要： A memory section stores values of the runout component, which are obtained in respective predetermined radial positions on the disk. A determining section selects, from the memory section, a value of the runout component corresponding to a target position. A runout detector uses, as an initial value for adaptive learning, the value of the runout component selected by the determining section, and calculates, by the adaptive learning, a value of the runout component contained in a position error between a head position and the target position. A feedforward controller calculates a feedforward value used to suppress the runout component calculated by the runout detector. A feedback controller calculates a feedback value from the position error. An adder generates, from the feedback value and the feedforward value, a control amount used to position the head in the target position.
摘要翻译：存储部存储在盘上的各个预定径向位置获得的跳动分量的值。确定部分从存储器部分中选择与目标位置对应的跳动分量的值。作为自适应学习的初始值，跳动检测器使用由判定部选择的跳动分量的值，并且通过自适应学习来计算包含在头部位置与头部位置之间的位置误差的跳动分量的值目标位置。前馈控制器计算用于抑制由跳动检测器计算的跳动分量的前馈值。反馈控制器根据位置误差计算反馈值。加法器从反馈值和前馈值产生用于将头部定位在目标位置的控制量。

76. 发明授权

US06799888B2 Method for predicting temperature, test wafer for use in temperature prediction, and method for evaluating lamp heating system 有权
标题翻译：用于预测温度的方法，用于温度预测的测试晶片，以及用于评估灯加热系统的方法
公开(公告)号：US06799888B2
公开(公告)日：2004-10-05
申请号：US10600596
申请日：2003-06-23
申请人： Satoshi Shibata , Yuko Nambu
发明人： Satoshi Shibata , Yuko Nambu
IPC分类号： G01K102
CPC分类号： G01K11/00
摘要： A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
摘要翻译：制备用于晶片温度预测的测试晶片。测试晶片包括：以晶态形成的第一半导体层; 在所述第一半导体层上形成为非晶态的第二半导体层; 以及在第二半导体层上形成的光吸收膜。接下来，将测试晶片装载到灯加热系统中，然后用从灯发出的光照射测试晶片，从而通过光吸收膜加热第二半导体层。此后，计算第二半导体层的一部分在与第一半导体层的界面处从无定形状态恢复到结晶状态的回收率。然后，根据恢复率与对应于回收率的温度之间的关系来测量已经照射光的测试晶片的温度。

77. 发明授权

US06798434B2 Printing device 有权
标题翻译：印刷装置
公开(公告)号：US06798434B2
公开(公告)日：2004-09-28
申请号：US10395138
申请日：2003-03-25
申请人： Satoshi Shibata , Mutsuo Fukuoka
发明人： Satoshi Shibata , Mutsuo Fukuoka
IPC分类号： B41J3536
CPC分类号： B41J35/36 , B41J17/36
摘要： A facsimile machine includes a detachable ribbon cassette accommodating an ink ribbon and having an EEPROM that stores the amount of the ink ribbon consumed. In the facsimile machine, printing is performed while the ink ribbon is taken up by a take-up motor and the memory contents in the EEPROM are renewed according to the progress of printing. The facsimile machine further includes a ribbon-empty detector that detects that the facsimile machine runs out of the ink ribbon, and a CPU that resets the memory contents in the EEPROM of the ribbon cassette.
摘要翻译：传真机包括容纳色带的可拆卸色带盒，并具有存储所消耗的色带量的EEPROM。在传真机中，当墨带被卷取电机吸收时，执行打印，并且根据打印进度更新EEPROM中的存储器内容。传真机还包括检测传真机用完色带的色带检测器和复位色带盒的EEPROM中的存储器内容的CPU。

78. 发明授权

US06760178B2 Disk memory apparatus compensating for temperature in a circuit for monitoring the back electromotive force of a voice coil motor, and method for controlling of a disk memory apparatus 有权
标题翻译：用于补偿用于监测音圈电机的反电动势的电路中的温度的磁盘存储装置，以及用于控制磁盘存储装置的方法
公开(公告)号：US06760178B2
公开(公告)日：2004-07-06
申请号：US09797978
申请日：2001-03-05
申请人： Satoshi Shibata
发明人： Satoshi Shibata
IPC分类号： G11B2102
CPC分类号： G11B5/5521 , G11B21/025
摘要： At the time of the loading of head, the CPU flows a plurality of different currents to VCM, and by reading the back electromotive force monitor value of the back electromotive force monitor circuit each time, the calibration value of the circuit is obtained, and by using this calibration value, head-loading control is executed. The calibration value obtained previously is compensated on the basis of temperature changes, temperature compensation coefficient that shows the relation between the variation of the calibration value of the back electromotive force monitor circuit, and the difference between the above-mentioned two measured temperatures.
摘要翻译：在装载磁头时，CPU将多个不同的电流流向VCM，并且每次通过读取反电动势监视电路的反电动势监视值，获得电路的校准值，并且通过使用该校准值，执行头装载控制。基于温度变化，表示反电动势监视电路的校准值的变化与上述两个测定温度之间的关系之间的关系的温度补偿系数来补偿先前获得的校准值。

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