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71. 发明授权

US08806177B2 Prefetch engine based translation prefetching 有权
标题翻译：预取引擎基于翻译预取
公开(公告)号：US08806177B2
公开(公告)日：2014-08-12
申请号：US11482222
申请日：2006-07-07
申请人： Orran Y. Krieger , Balaram Sinharoy , Robert B. Tremaine , Robert W. Wisniewski
发明人： Orran Y. Krieger , Balaram Sinharoy , Robert B. Tremaine , Robert W. Wisniewski
IPC分类号： G06F12/00
CPC分类号： G06F12/1027 , G06F12/0862 , G06F2212/6028 , G06F2212/651 , G06F2212/654
摘要： A method and system for prefetching in computer system are provided. The method in one aspect includes using a prefetch engine to perform prefetch instructions and to translate unmapped data. Misses to address translations during the prefetch are handled and resolved. The method also includes storing the resolved translations in a respective cache translation table. A system for prefetching in one aspect includes a prefetch engine operable to receive instructions to prefetch data from the main memory. The prefetch engine is also operable to search cache address translation for prefetch data and perform address mapping translation, if the prefetch data is unmapped. The prefetch engine is further operable to prefetch the data and store the address mapping in one or more cache memory, if the data is unmapped.
摘要翻译：提供了一种在计算机系统中预取的方法和系统。该方法在一个方面包括使用预取引擎来执行预取指令并转换未映射的数据。在预取期间解决翻译错误的处理和解决。该方法还包括将分辨的翻译存储在相应的缓存转换表中。用于在一个方面预取的系统包括预取引擎，其可操作以接收从主存储器预取数据的指令。如果预取数据未被映射，则预取引擎还可用于搜索缓存地址转换以获取预取数据并执行地址映射转换。如果数据未被映射，则预取引擎还可操作以预取数据并将地址映射存储在一个或多个高速缓冲存储器中。

72. 发明授权

US08671248B2 Architecture support of memory access coloring 有权
标题翻译：内存访问着色的架构支持
公开(公告)号：US08671248B2
公开(公告)日：2014-03-11
申请号：US11620293
申请日：2007-01-05
申请人： Xiaowei Shen , Robert W. Wisniewski , Orran Krieger
发明人： Xiaowei Shen , Robert W. Wisniewski , Orran Krieger
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0842 , G06F12/0862 , G06F12/10 , G06F12/1027
摘要： Memory Access Coloring provides architecture support that allows software to classify memory accesses into different congruence classes by specifying a color for each memory access operation. The color information is received and recorded by the underlying system with appropriate granularity. This allows hardware to monitor color-based cache monitoring information and provide such feedback to the software to enable various runtime optimizations. It also enables enforcement of different memory consistency models for memory regions with different colors at the same time.
摘要翻译：内存访问着色提供架构支持，允许软件通过为每个内存访问操作指定颜色来将内存访问分类为不同的同余类。颜色信息由底层系统以适当的粒度接收和记录。这允许硬件监视基于颜色的缓存监视信息，并向软件提供这样的反馈以启用各种运行时优化。它还可以同时实现具有不同颜色的存储器区域的不同存储器一致性模型。

73. 发明申请

US20130317874A1 MEETING ATTENDANCE PLANNER 审中-公开
标题翻译：会议出席者计划
公开(公告)号：US20130317874A1
公开(公告)日：2013-11-28
申请号：US13549508
申请日：2012-07-15
申请人： James R. Kozloski , Clifford A. Pickover , Robert W. Wisniewski
发明人： James R. Kozloski , Clifford A. Pickover , Robert W. Wisniewski
IPC分类号： G06Q10/10
CPC分类号： G06Q10/109
摘要： A system for planning meeting attendance. The system includes a computer processor configured to receive from a meeting requestor a request to schedule a proposed meeting at a time interval. The computer processor is further configured to calculate an attendance probability value for a potential attendee based, at least in part, on the potential attendee's location over time. Additionally, the computer processor is configured to mark an electronic calendar of the meeting requestor with an indicia of the attendance probability value for the potential attendee. The computer processor may also be configured to automatically schedule the proposed meeting if the attendance probability value is beyond an attendance probability threshold.
摘要翻译：规划会议出勤的制度。该系统包括计算机处理器，该计算机处理器被配置为从会议请求者接收以时间间隔安排建议的会议的请求。计算机处理器还被配置为至少部分地基于潜在参加者的位置随时间地计算潜在参加者的考勤概率值。此外，计算机处理器被配置为用潜在参加者的考勤概率值的标记来标记会议请求者的电子日历。计算机处理器还可以被配置为如果考勤概率值超过考勤概率阈值，则自动安排所提出的会议。

74. 发明申请

US20120023300A1 MEMORY PAGE MANAGEMENT IN A TIERED MEMORY SYSTEM 有权
标题翻译：一个层次化的记忆系统中的存储页面管理
公开(公告)号：US20120023300A1
公开(公告)日：2012-01-26
申请号：US12843718
申请日：2010-07-26
申请人： Robert B. Tremaine , Robert W. Wisniewski
发明人： Robert B. Tremaine , Robert W. Wisniewski
IPC分类号： G06F12/16 , G06F12/14
CPC分类号： G06F12/1009 , G06F11/3471 , G06F12/1475 , G06F2201/88
摘要： Memory page management in a tiered memory system including a system that includes at least one page table for storing a plurality of entries, each entry associated with a page of memory and each entry including an address of the page and a memory tier of the page. The system also includes a control program configured for allocating pages associated with the entries to a software module, the allocated pages from at least two different memory tiers. The system further includes an agent of the control program capable of operating independently of the control program, the agent configured for receiving an authorization key to the allocated pages, and for migrating the allocated pages between the different memory tiers responsive to the authorization key.
摘要翻译：包括包括至少一个用于存储多个条目的页表的系统的系统中的存储器页面管理，每个条目与存储器页面相关联，每个条目包括页面的地址和页面的存储器层。该系统还包括配置用于将与条目相关联的页面分配给软件模块的控制程序，来自至少两个不同存储器层的所分配的页面。该系统还包括能够独立于控制程序操作的控制程序的代理，被配置为接收对所分配的页面的授权密钥的代理，以及响应于授权密钥在不同存储器层之间迁移分配的页面。

75. 发明申请

US20110161597A1 Combined Memory Including a Logical Partition in a Storage Memory Accessed Through an IO Controller 审中-公开
标题翻译：组合内存包括通过IO控制器访问的存储内存中的逻辑分区
公开(公告)号：US20110161597A1
公开(公告)日：2011-06-30
申请号：US12649856
申请日：2009-12-30
申请人： Robert B. Tremaine , Robert W. Wisniewski
发明人： Robert B. Tremaine , Robert W. Wisniewski
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0895
摘要： A computer system having a combined memory. A first logical partition of the combined memory is a main memory region in a storage memory. A second logical partition of the combined memory is a direct memory region in a main memory. A memory controller comprising a storage controller is configured to receive a memory access request including a real address from a processor, determine whether the real address is for the first logical partition or for the second logical partition. If the address is for the first logical partition the storage controller communicates with an IO controller in the storage memory to service the memory access request. If the address is for the direct memory region, the memory controller services the memory access request in a conventional manner.
摘要翻译：具有组合存储器的计算机系统。组合存储器的第一逻辑分区是存储存储器中的主存储器区域。组合存储器的第二逻辑分区是主存储器中的直接存储器区域。包括存储控制器的存储器控制器被配置为从处理器接收包括实际地址的存储器访问请求，确定实际地址是为第一逻辑分区还是用于第二逻辑分区。如果地址是用于第一逻辑分区，则存储控制器与存储器中的IO控制器通信以服务存储器访问请求。如果地址用于直接存储区域，则存储器控制器以常规方式服务存储器访问请求。

76. 发明授权

US07844778B2 Intelligent cache replacement mechanism with varying and adaptive temporal residency requirements 有权
标题翻译：智能高速缓存替换机制，具有不同的自适应临时驻留要求
公开(公告)号：US07844778B2
公开(公告)日：2010-11-30
申请号：US11484824
申请日：2006-07-11
申请人： Xiaowei Shen , Balaram Sinharoy , Robert W. Wisniewski
发明人： Xiaowei Shen , Balaram Sinharoy , Robert W. Wisniewski
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/127
摘要： A method for replacing cached data is disclosed. The method in one aspect associates an importance value to each block of data in the cache. When a new entry needs to be stored in the cache, a cache block for replacing is selected based on the importance values associated with cache blocks. In another aspect, the importance values are set according to the hardware and/or software's knowledge of the memory access patterns. The method in one aspect may also include varying the importance value over time over different processing requirements.
摘要翻译：公开了一种替换缓存数据的方法。一方面中的方法将重要性值与高速缓存中的每个数据块相关联。当新条目需要存储在高速缓存中时，基于与高速缓存块相关联的重要性值来选择用于替换的高速缓存块。在另一方面，根据硬件和/或软件对存储器访问模式的知识来设置重要性值。一个方面中的方法还可以包括随着时间的不同处理要求改变重要性值。

77. 发明授权

US07634642B2 Mechanism to save and restore cache and translation trace for fast context switch 有权
标题翻译：用于快速上下文切换的保存和恢复缓存和转换跟踪的机制
公开(公告)号：US07634642B2
公开(公告)日：2009-12-15
申请号：US11481515
申请日：2006-07-06
申请人： Peter H. Hochschild , Xiaowei Shen , Balaram Sinharoy , Robert W. Wisniewski
发明人： Peter H. Hochschild , Xiaowei Shen , Balaram Sinharoy , Robert W. Wisniewski
IPC分类号： G06F9/00 , G06F9/46
CPC分类号： G06F9/461
摘要： A method and system for efficient context switching are provided. An execution entity that is to be context switched out is allowed to continue executing for a predetermined period of time before being context switched out. During the predetermined period of time in which the execution entity continues to execute, the hardware or an operating system tracks and records its footprint such as the addresses and page and segment table entries and the like accessed by the continued execution. When the execution entity is being context switched back in, its page and segment table and cache states are reloaded for use in its immediate execution.
摘要翻译：提供了一种用于高效上下文切换的方法和系统。允许上下文切换的执行实体在上下文切换之前继续执行预定时间段。在执行实体继续执行的预定时间段期间，硬件或操作系统跟踪并记录其持续执行访问的地址和页面和段表项等的占用空间。当执行实体正在上下文切换回来时，其页面和段表格和高速缓存状态被重新加载以用于其立即执行。

78. 发明申请

US20080177835A1 Methods and Apparatus for Managing and Distinguishing Instant Messaging Sessions and Threads 审中-公开
标题翻译：用于管理和区分即时消息会话和线程的方法和设备
公开(公告)号：US20080177835A1
公开(公告)日：2008-07-24
申请号：US12056737
申请日：2008-03-27
申请人： Jarir Kamel Chaar , Neal Martin Keller , Clifford Alan Pickover , Robert W. Wisniewski
发明人： Jarir Kamel Chaar , Neal Martin Keller , Clifford Alan Pickover , Robert W. Wisniewski
IPC分类号： G06F15/16
CPC分类号： G06Q10/107 , G06F3/0482 , H04L51/04
摘要： A method of managing instant messaging communication over a computer network is provided. One or more instant messaging session windows are organized in an instant messaging session manager. At least one distinguishing session characteristic is attributed to each of the one or more instant messaging session windows. The at least one distinguishing session characteristic is at least one of a sound clip associated with a user of the session, an instant messaging session window background associated with a user of the session, and a change in at least one of a color and an intensity of the instant messaging session window. The at least one distinguishing session characteristic increases a likelihood of identification of each of the one or more instant messaging session windows.
摘要翻译：提供了一种通过计算机网络管理即时消息通信的方法。一个或多个即时消息会话窗口被组织在即时消息会话管理器中。至少一个区分会话特征归因于一个或多个即时消息会话窗口中的每一个。所述至少一个区分会话特征是与会话的用户相关联的声音剪辑中的至少一个，与会话的用户相关联的即时消息会话窗口背景以及颜色和强度中的至少一个的变化的即时通讯会话窗口。该至少一个区分会话特性增加了识别一个或多个即时消息会话窗口中的每一个的可能性。

79. 发明申请

US20080168230A1 COLOR-BASED CACHE MONITORING 有权
标题翻译：基于颜色的高速缓存监控
公开(公告)号：US20080168230A1
公开(公告)日：2008-07-10
申请号：US11620348
申请日：2007-01-05
申请人： Xiaowei Shen , David F. Bacon , Robert W. Wisniewski , Orran Krieger
发明人： Xiaowei Shen , David F. Bacon , Robert W. Wisniewski , Orran Krieger
IPC分类号： G06F12/08
CPC分类号： G06F12/0842 , G06F12/121
摘要： Color-based caching allows each cache line to be distinguished by a specific color, and enables the manipulation of cache behavior based upon the colors of the cache lines. When multiple threads are able to share a cache, effective cache management is critical to overall performance. Color-based caching provides an effective method to better utilize a cache and avoid unnecessary cache thrashing and/or pollution. The color based caching can be monitored to improve memory performance and guarantee Quality-Of-Service of cache utilization.
摘要翻译：基于颜色的缓存允许每个高速缓存行通过特定的颜色进行区分，并且可以基于高速缓存行的颜色来操作缓存行为。当多个线程能够共享缓存时，有效的缓存管理对于整体性能至关重要。基于色彩的缓存提供了一种更好地利用缓存并避免不必要的缓存颠簸和/或污染的有效方法。可以监控基于颜色的缓存，以提高内存性能，并保证缓存利用率的服务质量。

80. 发明授权

US07376808B2 Method and system for predicting the performance benefits of mapping subsets of application data to multiple page sizes 有权
标题翻译：用于预测将应用程序数据子集映射到多个页面大小的性能优势的方法和系统
公开(公告)号：US07376808B2
公开(公告)日：2008-05-20
申请号：US11343565
申请日：2006-01-31
申请人： Gheorghe Calin Cascaval , Evelyn Duesterwald , Peter F. Sweeney , Robert W. Wisniewski
发明人： Gheorghe Calin Cascaval , Evelyn Duesterwald , Peter F. Sweeney , Robert W. Wisniewski
IPC分类号： G06F9/34 , G06F12/00
CPC分类号： G06F12/10 , G06F2212/652
摘要： A method for modeling the performance of memory address translation mechanism (MATM), comprises: a) receiving an execution profile that contains a memory address reference stream of an application, a set of page size mappings, and events about the application's data allocations and de-allocations; b) translating each memory reference in the input memory reference stream into a reference to the corresponding data object, by consulting the memory allocation and de-allocation events, to provide a data object reference stream; c) translating each data object reference into a corresponding page reference by consulting the page size mapping and by modeling the data allocation and de-allocation events in accordance with the mapping to provide a page reference stream and a number of pages of each page size that are needed by the respective mapping; d) using the page reference stream to provide a stream of reuse distance values; e) determining, for each reference in the reuse distance value stream, whether the reference results in a hit or a miss reference to the MATM to provide the number of hits and the number of misses for each MATM; f) providing the hit and miss values to a cost model to estimate the number of miss cycles; g) ranking the mappings by their miss cycle values such that the mapping with the lowest number of miss cycles has the highest rank.
摘要翻译：一种用于对存储器地址转换机制（MATM）的性能进行建模的方法包括：a）接收包含应用的存储器地址参考流，一组页面大小映射和关于应用的数据分配和de的事件的执行简档分配; b）通过咨询存储器分配和解除分配事件来将输入存储器参考流中的每个存储器引用转换成对相应数据对象的引用，以提供数据对象引用流; c）通过参考所述页面大小映射并且根据所述映射对所述数据分配和解除分配事件进行建模来将每个数据对象引用转换成对应的页面引用，以提供页面引用流和每页页面大小的页数需要通过各自的映射; d）使用页面参考流来提供重用距离值流; e）针对重用距离值流中的每个参考，确定参考是否导致对MATM的命中或错过引用以提供每个MATM的命中次数和未命中次数; f）向成本模型提供命中和未命中值以估计错过周期数; g）通过它们的错误循环值对映射进行排序，使得具有最低错误周期数的映射具有最高等级。

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