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71. 发明申请

WO2020068634A1 HYBRID WIRELESS TRANSCEIVER ARCHITECTURE THAT SUPPORTS MULTIPLE ANTENNA ARRAYS 审中-公开
公开(公告)号：WO2020068634A1
公开(公告)日：2020-04-02
申请号：PCT/US2019/052377
申请日：2019-09-23
申请人： QUALCOMM INCORPORATED
发明人： LIU, Li , WANG, Kevin Hsi Huai , FENG, Yunfei , WANG, Chuan , SAHOTA, Gurkanwal
IPC分类号： H04B7/0408 , H04B7/06 , H04B7/08 , H01Q23/00 , H04B1/00 , H04B7/0404
摘要： An apparatus is disclosed for a hybrid wireless transceiver architecture that supports multiple antenna arrays. In an example aspect, the apparatus includes a first antenna array, a second antenna array, and a wireless transceiver. The wireless transceiver includes first dedicated circuitry dedicated to the first antenna array and second dedicated circuitry dedicated to the second antenna array. The wireless transceiver also includes shared circuitry that is shared with both the first antenna array and the second antenna array.

72. 发明申请

WO2014150575A1 LOCAL OSCILLATOR (LO) GENERATOR WITH MULTI-PHASE DIVIDER AND PHASE LOCKED LOOP 审中-公开
标题翻译：具有多相分离器和相位锁定环路的本地振荡器（LO）发生器
公开(公告)号：WO2014150575A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/023667
申请日：2014-03-11
申请人： QUALCOMM INCORPORATED
发明人： LIU, Li , NARATHONG, Chiewcharn
IPC分类号： H03L7/18
CPC分类号： H04B1/16 , H03L7/099 , H03L7/18
摘要： In one design, an apparatus includes an oscillator, a divider, and a phase locked loop (PLL). The oscillator receives a control signal and provides an oscillator signal having a frequency determined by the control signal. The divider receives the oscillator signal and generates multiple divided signals of different phases. The PLL receives a reference signal and a selected divided signal and generates the control signal for the oscillator. The divider is powered on and off periodically and wakes up in one of multiple possible states, with each state being associated with a different phase of the selected divided signal. Phase continuity of the selected divided signal is ensured by using the divider as part of the PLL. The PLL locks the selected divided signal to the reference signal, and the selected divided signal has continuous phase due to the reference signal having continuous phase.
摘要翻译：在一种设计中，装置包括振荡器，分频器和锁相环（PLL）。振荡器接收控制信号并提供具有由控制信号确定的频率的振荡器信号。分频器接收振荡器信号并产生不同相位的多个分频信号。 PLL接收参考信号和选择的分频信号，并产生振荡器的控制信号。分频器周期性地通电和关断，并在多个可能状态之一中唤醒，每个状态与所选分频信号的不同相位相关联。通过使用分频器作为PLL的一部分来确保所选分频信号的相位连续性。 PLL将所选择的分频信号锁定到参考信号，并且由于具有连续相位的参考信号，所选择的分频信号具有连续相位。

73. 发明申请

WO2022066375A1 DUAL-FEED DUAL-BAND INTERLEAVED ANTENNA CONFIGURATION 审中-公开
公开(公告)号：WO2022066375A1
公开(公告)日：2022-03-31
申请号：PCT/US2021/048440
申请日：2021-08-31
申请人： QUALCOMM INCORPORATED
发明人： KIM, Jeongil Jay , LIU, Li , WANG, Kevin Hsi-Huai
IPC分类号： H01Q9/04 , H01Q21/08 , H01Q21/24
摘要： Techniques are provided for improving the bandwidth of a dual-band antenna in a mobile device. An example wireless device includes at least one radio frequency integrated circuit, and at least one patch antenna array operably coupled to the least one radio frequency integrated circuit, comprising a first rectangular patch including a first side and a second side, wherein a length of the first side is greater than a length of the second side, and a second rectangular patch including a first side and a second side of the same dimensions as the respective first side and the second side of the first rectangular patch, wherein the first side of the second rectangular patch is disposed adjacent and parallel to the second side of the first rectangular patch.

74. 发明申请

WO2020068451A1 WIRELESS COMMUNICATION DEVICE 审中-公开
公开(公告)号：WO2020068451A1
公开(公告)日：2020-04-02
申请号：PCT/US2019/050962
申请日：2019-09-13
申请人： QUALCOMM INCORPORATED
发明人： RONG, Sujiang , LIU, Li , SAHOTA, Gurkanwal , WANG, Kevin Hsi Huai
IPC分类号： H01Q1/24 , H01Q21/30 , H04B7/10 , H01Q21/24
摘要： A wireless communication device includes: a housing configured to retain components of the wireless communication device; an antenna unit configured to receive first free-space millimeter-wave signals and convert these signals to first electronic millimeter-wave signals; a processor disposed in the housing; and front-end circuitry communicatively coupled to the antenna unit, the front-end circuitry coupled to the processor by at least one transmission line; where the front-end circuitry is configured to: receive the first electronic millimeter-wave signals from the antenna unit; convert the first electronic millimeter-wave signals to first reduced-frequency signals each having a lower frequency than the first electronic millimeter-wave signals; and convey the first reduced-frequency signals over a same transmission line of the at least one transmission line in a multiplexed manner with different ones of the first reduced-frequency signals having different conveyance characteristics such that the different ones of the first reduced-frequency signals can be separately processed.

75. 发明申请

WO2014209715A1 FREQUENCY DIVIDER WITH DUTY CYCLE ADJUSTMENT WITHIN FEEDBACK LOOP 审中-公开
标题翻译：频率分频器在反馈环路中进行占空比调整
公开(公告)号：WO2014209715A1
公开(公告)日：2014-12-31
申请号：PCT/US2014/042920
申请日：2014-06-18
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Wu-Hsin , SRIDHARA, Sriramgopal , LIU, Li
IPC分类号： H03K3/017 , H03K5/156 , H03K21/08
CPC分类号： H03L7/18 , H03K3/017 , H03K5/1565 , H03K21/08
摘要： A frequency divider (300) with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit (310a, 310b) and at least one duty cycle adjustment circuit (320a, 320b) coupled in a feedback loop. The divider circuit(s) receive a clock signal (input Clock) at a first frequency and provide at least one divided signal (Idivp, Idivn) at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal (ladjp, ladjn) to the divider circuit(s). The divider circuit(s) may include first and second latches (310a, 310b), and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits (320a, 320b). The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.
摘要翻译：公开了一种在反馈环路内进行占空比调整的分频器（300）。在示例性设计中，装置包括耦合在反馈回路中的至少一个除法器电路（310a，310b）和至少一个占空比调整电路（320a，320b）。分频器电路以第一频率接收时钟信号（输入时钟），并以第二频率提供至少一个分频信号（Idivp，Idivn），其为第一频率的一部分。占空比调整电路调整至少一个分频信号的占空比，并向分频器电路提供至少一个占空比调整信号（ladjp，ladjn）。分频器电路可以包括第一和第二锁存器（310a，310b），并且占空比调整电路可以包括第一和第二占空比调整电路（320a，320b）。第一和第二锁存器以及第一和第二占空比调节电路可以耦合在反馈回路中并且可以执行除以2。

76. 发明申请

WO2014100661A1 DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE 审中-公开
标题翻译：多样性接收器，具有多种局部振荡信号
公开(公告)号：WO2014100661A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/077080
申请日：2013-12-20
申请人： QUALCOMM INCORPORATED
发明人： GUDEM, Prasad Srinivasa Siva , LIU, Li , BOSSU, Frederic
IPC分类号： H04B1/26 , H04B7/08 , H04B1/00
CPC分类号： H03D7/1466 , H04B1/005 , H04B1/0064 , H04B7/0871 , Y02D70/40 , Y02D70/444
摘要： A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.
摘要翻译：公开了一种多模式接收机，其可重新配置以在分集模式下共享本地振荡器信号以节省功耗。在一个示例性实施例中，一种装置包括主接收机，其具有被配置为对主信号进行下变频的主混合器和被配置为在载波聚合模式中对二级信号进行下变频的二级混合器。该装置还包括补充混频器，其使用由分集模式中由共享主频率合成器产生的共享主本地振荡器（LO）信号以减少功耗。该装置还包括控制器，其被配置为在分集模式下操作时禁用辅助混合器并且使辅助混频器能够对次级信号进行下变频。

77. 发明申请

WO2014043531A1 CANCELLING SUPPLY NOISE IN A VOLTAGE CONTROLLED OSCILLATOR CIRCUIT 审中-公开
标题翻译：在电压控制的振荡器电路中取消电源噪声
公开(公告)号：WO2014043531A1
公开(公告)日：2014-03-20
申请号：PCT/US2013/059757
申请日：2013-09-13
申请人： QUALCOMM INCORPORATED
发明人： LIU, Li , NARATHONG, Chiewcharn
IPC分类号： H03B5/04 , H03L1/00 , H03L7/099
CPC分类号： H03B5/1228 , H01L25/00 , H01L2924/0002 , H03B5/04 , H03B5/1209 , H03B5/1243 , H03B2200/0088 , H03L1/00 , H03L7/099 , H01L2924/00
摘要： A voltage controlled oscillator (VCO) core for cancelling a supply noise is described. The VCO core includes an input node that receives the supply noise. The VCO core also includes a noise path coupled to the input node. The VCO core additionally includes a cancellation path coupled to the input node and the noise path. The cancellation path includes a programmable gain circuit coupled with a first terminal of a varactor. The supply noise passes through the programmable gain circuit to produce a cancellation noise.
摘要翻译：描述了用于消除电源噪声的压控振荡器（VCO）芯。 VCO核心包括接收电源噪声的输入节点。 VCO核心还包括耦合到输入节点的噪声路径。 VCO核心还包括耦合到输入节点和噪声路径的消除路径。消除路径包括与变容二极管的第一端子耦合的可编程增益电路。电源噪声通过可编程增益电路产生消除噪声。

78. 发明申请

WO2014018179A1 LOW POWER LOCAL OSCILLATOR SIGNAL GENERATION 审中-公开
标题翻译：低功率本地振荡器信号产生
公开(公告)号：WO2014018179A1
公开(公告)日：2014-01-30
申请号：PCT/US2013/045381
申请日：2013-06-12
申请人： QUALCOMM INCORPORATED
发明人： LIU, Li , GUDEM, Prasad Srinivasa Siva , BOSSU, Frederic , NARATHONG, Chiewcharn
IPC分类号： H04W52/02
CPC分类号： H04B17/004 , H04B17/102 , H04B17/20 , H04W52/0274 , Y02D70/00
摘要： A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path.
摘要翻译：描述了一种用于在发射机/接收机电路内提供振荡信号的方法和装置。发射机/接收机电路可以包括产生振荡信号的振荡器，该振荡信号可以沿着包括诸如低功率缓冲器和低功率缓冲器的低功率电路的较短电路路径提供给发射机/接收机电路的低功率低增益混频器功率分频器振荡信号还可以沿着包括高功率电路（例如高功率缓冲器和高功率分频器）的较长电路路径被提供给高功率高增益混频器。具体地，低功率电路适于在ON状态下消耗比处于ON状态的高功率电路处于ON状态的更少的功率，并且较短的电路路径具有比较长电路路径更短的电路径长度。

79. 发明申请

WO2022086844A1 SYSTEM AND METHOD FOR ACTIVE S11 DETECTION IN PHASED ARRAY TRANSCEIVERS 审中-公开
公开(公告)号：WO2022086844A1
公开(公告)日：2022-04-28
申请号：PCT/US2021/055388
申请日：2021-10-18
申请人： QUALCOMM INCORPORATED
发明人： WANG, Chuan , LIU, Li , WANG, Kevin Hsi-Huai , ASURI, Bhushan Shanti , PATEL, Shrenik , BHATTACHARYA, Anushruti , MOHAMMADI, Laya , PARK, Sang-June
IPC分类号： G01R27/06 , H04B17/10 , H04B1/04
摘要： Devices and methods for detection of active return loss for an antenna element of a plurality of antenna elements of a phased array antenna are provided. An exemplary device can convert a voltage differential at an input of a power amplifier (PA) to first current. The device can convert a coupled voltage corresponding to a signal transmitted from the PA to a respective antenna element, to a second current. The device can convert a reflected voltage corresponding to a signal reflected from the respective antenna element, to a third current. The device can convert the first current, the second current, and the third current to an output voltage at a generator output. The device can further have a controller that can adaptively generate codebooks for transmission based on the output voltage.

80. 发明申请

WO2020205828A1 SWING TRACKING AND CONTROL 审中-公开
公开(公告)号：WO2020205828A1
公开(公告)日：2020-10-08
申请号：PCT/US2020/025899
申请日：2020-03-31
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Wu-Hsin , XU, Rui , VIGILANTE, Marco , LIU, Li , WU, Xiaotie
IPC分类号： H03B5/12 , H03F1/34
摘要： In certain aspects, an apparatus includes a transformer including an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on an input signal. The apparatus further includes a feedback circuit configured to detect an output voltage swing at the output inductor, generate a regulated voltage at the input inductor, and control the regulated voltage based on the detected output voltage swing.

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