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    • 71. 发明授权
    • Circuitry for allocating access to a demand-shared bus
    • 用于分配访问需求共享总线的电路
    • US4463445A
    • 1984-07-31
    • US337672
    • 1982-01-07
    • Gary J. Grimes
    • Gary J. Grimes
    • H04L25/02G06F13/00G06F13/374
    • G06F13/374
    • Circuitry is disclosed for allocating requests for demand-shared bus access among a plurality of service requesting ports. During bus contention time, each requesting port synchronously and sequentially applies the digits of its assigned unique priority code to the bus beginning with the most significant digit. After the application of all digits, only the requesting port having the highest code remains in contention and it seizes the bus. A plurality of status flip-flops is provided in each port for generating port parameter bits. The generated parameter bits are applied to the bus as the most significant bits of a dynamic port priority code during contention time. However, the selective application of a mask signal to a mask conductor during contention time causes each requesting port to ignore any parameter bits on the bus as long as the mask signal remains. This returns control of the port preference to any unmasked parameter bits and to the assigned port priority codes.
    • 公开了用于在多个服务请求端口之间分配请求共享总线访问请求的电路。 在总线竞争时间期间,每个请求端口同步并顺序地将其分配的唯一优先级代码的数字应用于从最高有效位开始的总线。 在应用所有数字之后,只有具有最高代码的请求端口仍然存在争用,并占用总线。 在每个端口中提供多个状态触发器以产生端口参数位。 生成的参数位在竞争时间内作为动态端口优先级代码的最高有效位应用于总线。 然而,只要屏蔽信号保留,在竞争时间期间将掩模信号选择性地应用于掩模导体,导致每个请求端口忽略总线上的任何参数位。 这将端口首选项的控制权返回给任何未屏蔽的参数位和分配的端口优先级代码。