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    • 73. 发明授权
    • Display substrate and method of manufacturing the same
    • 显示基板及其制造方法
    • US08357554B2
    • 2013-01-22
    • US13156986
    • 2011-06-09
    • Wang-Woo LeeHong-Sick Park
    • Wang-Woo LeeHong-Sick Park
    • H01L21/00
    • H01L33/0041H01L27/1218H01L27/1225H01L27/124H01L27/1292
    • A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.
    • 提供具有低电阻信号线的显示基板和制造显示基板的方法。 显示基板包括绝缘基板,栅极线,数据线和像素电极。 栅极线栅极线通过子沟槽和开口部分形成。 子沟槽形成在绝缘衬底中,并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。 数据线穿过栅极线。 像素电极通过开关元件电连接到栅极线和数据线。 因此,通过使用平坦化层和绝缘基板形成的沟槽形成信号线,使得信号线的电阻可能降低。
    • 74. 发明申请
    • DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    • 显示基板及其制造方法
    • US20120132917A1
    • 2012-05-31
    • US13156986
    • 2011-06-09
    • Wang-Woo LEEHong-Sick Park
    • Wang-Woo LEEHong-Sick Park
    • H01L29/786H01L33/08
    • H01L33/0041H01L27/1218H01L27/1225H01L27/124H01L27/1292
    • A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.
    • 提供具有低电阻信号线的显示基板和制造显示基板的方法。 显示基板包括绝缘基板,栅极线,数据线和像素电极。 栅极线栅极线通过子沟槽和开口部分形成。 子沟槽形成在绝缘衬底中,并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。 数据线穿过栅极线。 像素电极通过开关元件电连接到栅极线和数据线。 因此,通过使用平坦化层和绝缘基板形成的沟槽形成信号线,使得信号线的电阻可能降低。
    • 76. 发明授权
    • Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel
    • 信号线的制造方法,薄膜晶体管面板,以及薄膜晶体管面板的制造方法
    • US07811868B2
    • 2010-10-12
    • US11932233
    • 2007-10-31
    • Do-Hyun KimWon-Suk ShinChang-Oh JeongHong-Sick ParkEun-Guk LeeJe-Hun Lee
    • Do-Hyun KimWon-Suk ShinChang-Oh JeongHong-Sick ParkEun-Guk LeeJe-Hun Lee
    • H01L21/768
    • H01L27/12H01L27/124H01L27/1288H01L29/458
    • A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.
    • 一种制造薄膜晶体管阵列面板的方法,包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层,硅层和包括下层和上层的导体层,在导体层上形成光致抗蚀剂膜,图案化光致抗蚀剂膜以形成包括第一 部分和第二部分具有比第一部分更大的厚度,通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层,通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体, 通过使用回蚀工艺去除光致抗蚀剂图案的第二部分,通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层,通过使用光致抗蚀剂干蚀刻导体层的下层 图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极,并且形成连接到漏电极的像素电极 。
    • 77. 发明授权
    • Signal line for display device and thin film transistor array panel including the signal line
    • 信号线用于显示器件和薄膜晶体管阵列面板,包括信号线
    • US07662676B2
    • 2010-02-16
    • US12269603
    • 2008-11-12
    • Hong-Sick ParkShi-Yul Kim
    • Hong-Sick ParkShi-Yul Kim
    • H01L21/00
    • H01L29/4908H01L27/12H01L27/124H01L29/458
    • A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
    • 提出了具有低电阻率的信号线的薄膜晶体管(TFT)阵列面板。 TFT阵列面板包括绝缘基板,形成在绝缘基板上的栅极线,形成在栅极线上的栅极绝缘层,漏极电极和形成在栅极绝缘层上的源电极的数据线, 具有间隙的源电极和连接到漏电极的像素电极。 在一个实施例中,栅极线,数据线和漏电极中的至少一个包括由含Mo导体制成的第一导电层,由含Cu导体制成的第二导电层和第三导电层 由含MoN的导体制成。