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71. 发明授权

US5780920A Method of forming a resistor and integrated circuitry having a resistor construction 失效
公开(公告)号：US5780920A
公开(公告)日：1998-07-14
申请号：US680332
申请日：1996-07-11
申请人： Kirk Prall , Pierre C. Fazan , Aftab Ahmad , Howard E. Rhodes , Werner Juengling , Pai-Hung Pan , Tyler Lowrey
发明人： Kirk Prall , Pierre C. Fazan , Aftab Ahmad , Howard E. Rhodes , Werner Juengling , Pai-Hung Pan , Tyler Lowrey
IPC分类号： H01L21/02 , H01L27/06 , H01L27/08 , H01L29/00
CPC分类号： H01L28/20 , H01L27/0629 , H01L27/0802 , Y10S148/136
摘要： A method of forming a resistor from semiconductive material includes, a) providing a substrate; b) providing a layer of semiconductive material over the substrate; c) providing a pair of openings into the semiconductive material layer; d) plugging the pair of openings with an electrically conductive material to define a pair of electrically conductive pillars within the semiconductive material, the pair of pillars having semiconductive material extending therebetween to provide a resistor construction; and e) providing a conductive node to each of the electrically conductive pillars. An integrated circuit incorporating a resistor construction includes, i) a layer of semiconductive material; ii) a pair of electrically conductive pillars provided within the semiconductive material layer, the pair of pillars being separated from one another and thereby having a mass of the semiconductive material extending therebetween; and iii) an electrically conductive node in electrical connection with each of the respective conductive pillars. Alternately, a resistor is provided within a semiconductive substrate using different concentration diffusion regions.

72. 发明授权

US5668037A Method of forming a resistor and integrated circuitry having a resistor construction 失效
标题翻译：形成电阻器的方法和具有电阻器结构的集成电路
公开(公告)号：US5668037A
公开(公告)日：1997-09-16
申请号：US679705
申请日：1996-07-11
申请人： Kirk Prall , Pierre C. Fazan , Aftab Ahmad , Howard E. Rhodes , Werner Juengling , Pai-Hung Pan , Tyler Lowrey
发明人： Kirk Prall , Pierre C. Fazan , Aftab Ahmad , Howard E. Rhodes , Werner Juengling , Pai-Hung Pan , Tyler Lowrey
IPC分类号： H01L21/02 , H01L27/06 , H01L27/08 , H01L21/70
CPC分类号： H01L28/20 , H01L27/0629 , H01L27/0802 , Y10S148/136
摘要： A method of forming a resistor from semiconductive material includes, a) providing a substrate; b) providing a layer of semiconductive material over the substrate; c) providing a pair of openings into the semiconductive material layer; d) plugging the pair of openings with an electrically conductive material to define a pair of electrically conductive pillars within the semiconductive material, the pair of pillars having semiconductive material extending therebetween to provide a resistor construction; and e) providing a conductive node to each of the electrically conductive pillars. An integrated circuit incorporating a resistor construction includes, i) a layer of semiconductive material; ii) a pair of electrically conductive pillars provided within the semiconductive material layer, the pair of pillars being separated from one another and thereby having a mass of the semiconductive material extending therebetween; and iii) an electrically conductive node in electrical connection with each of the respective conductive pillars. Alternately, a resistor is provided within a semiconductive substrate using different concentration diffusion regions.
摘要翻译：从半导体材料形成电阻器的方法包括：a）提供衬底; b）在衬底上提供半导体材料层; c）在半导体材料层中提供一对开口; d）用导电材料堵塞所述一对开口，以在所述半导体材料内限定一对导电柱，所述一对支柱具有在其间延伸的半导体材料以提供电阻器结构; 以及e）为每个导电柱提供导电节点。结合电阻器结构的集成电路包括：i）半导体材料层; ii）设置在半导体材料层内的一对导电柱，所述一对柱彼此分离，从而具有在其间延伸的半导体材料的质量; 以及iii）与每个相应的导电柱电连接的导电节点。或者，使用不同的浓度扩散区域在半导体衬底内提供电阻器。

73. 发明授权

US5405788A Method for forming and tailoring the electrical characteristics of semiconductor devices 失效
标题翻译：用于形成和定制半导体器件的电特性的方法
公开(公告)号：US5405788A
公开(公告)日：1995-04-11
申请号：US66835
申请日：1993-05-24
申请人： Monte Manning , Charles Dennison , Howard Rhodes , Tyler Lowrey
发明人： Monte Manning , Charles Dennison , Howard Rhodes , Tyler Lowrey
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/8244 , H01L21/265
CPC分类号： H01L29/66659 , H01L21/823412 , H01L27/11
摘要： A method for forming semiconductor devices includes a low energy implant for tailoring the electrical characteristics of the semiconductor devices. Using the low energy implant, narrow width devices such as access transistors in an SRAM cell, can be fabricated with a low threshold voltage (Vt). The low energy implant is performed on the active areas of a silicon substrate following field isolation and field implant. For an n-conductivity access transistor, the low energy dopant can be an n-type dopant such as phosphorus, arsenic or antimony.
摘要翻译：用于形成半导体器件的方法包括用于调整半导体器件的电特性的低能量注入。使用低能量注入，可以以低阈值电压（Vt）制造诸如SRAM单元中的存取晶体管的窄宽度器件。在场隔离和场植入之后，在硅衬底的有源区域上执行低能量注入。对于n导电性存取晶体管，低能掺杂剂可以是n型掺杂剂，例如磷，砷或锑。

74. 发明授权

US5217830A Method of fabricating phase shifting reticles using ion implantation 失效
标题翻译：使用离子注入制造相移标线的方法
公开(公告)号：US5217830A
公开(公告)日：1993-06-08
申请号：US676939
申请日：1991-03-26
申请人： Tyler Lowrey
发明人： Tyler Lowrey
IPC分类号： G03F1/30
CPC分类号： G03F1/30
摘要： A method of fabricating a phase shifting reticle that can be used as a mask in photolithographic processes such as semiconductor wafer patterning. A transparent quartz substrate is first coated with a patterned resist. The quartz substrate is then subjected to high voltage ion bombardment to produce a pattern of ion implant areas on the substrate. The ion implantation is closely controlled to produce areas on the substrate having an index of refraction different than the quartz substrate and selected to achieve a 180.degree. phase shift. An opaque film is then deposited over the substrate and patterned with openings. This produces a repetitive pattern of alternating light transmission openings and phase shifters having opaque light blockers on either side.
摘要翻译：一种制造可用作诸如半导体晶片图案化的光刻工艺中的掩模的相移掩模版的方法。首先用图案化的抗蚀剂涂覆透明石英基板。然后对石英衬底进行高压离子轰击，以在衬底上产生离子注入区域的图案。密切地控制离子注入以产生具有不同于石英衬底的折射率的衬底上的区域，并且被选择以实现180°的相移。然后将不透明膜沉积在基底上并用开口图案化。这产生交替的光传输开口的重复图案和在任一侧上具有不透明光阻挡器的移相器。

75. 发明授权

US08658510B2 Processing phase change material to improve programming speed 有权
标题翻译：处理相变材料，提高编程速度
公开(公告)号：US08658510B2
公开(公告)日：2014-02-25
申请号：US13585936
申请日：2012-08-15
申请人： Stephen J. Hudgens , Tyler Lowrey
发明人： Stephen J. Hudgens , Tyler Lowrey
IPC分类号： H01L21/20
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1625 , H01L45/165 , H01L45/1658
摘要： A phase change material may be processed to reduce its microcrystalline grain size and may also be processed to increase the crystallization or set programming speed of the material. For example, material doped with nitrogen to reduce grain size may be doped with titanium to reduce crystallization time.
摘要翻译：可以处理相变材料以降低其微晶粒度，并且还可以加工以增加材料的结晶或设定编程速度。例如，掺杂氮以减小晶粒尺寸的材料可以掺杂钛以减少结晶时间。

76. 发明授权

US08363446B2 Multilevel variable resistance memory cell utilizing crystalline programming states 有权
标题翻译：利用晶体编程状态的多电平可变电阻存储单元
公开(公告)号：US08363446B2
公开(公告)日：2013-01-29
申请号：US12578638
申请日：2009-10-14
申请人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
发明人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
IPC分类号： G11C11/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
摘要： A method of programming an electrical variable resistance memory device. When applied to variable resistance memory devices that incorporate a phase-change material as the active material, the method utilizes a plurality of crystalline programming states. The crystalline programming states are distinguishable on the basis of resistance, where the resistance values of the different states are stable with time and exhibit little or no drift. As a result, the programming scheme is particularly suited to multilevel memory applications. The crystalline programming states may be achieved by stabilizing crystalline phases that adopt different crystallographic structures or by stabilizing crystalline phases that include mixtures of two or more distinct crystallographic structures that vary in the relative proportions of the different crystallographic structures. The programming scheme incorporates at least two crystalline programming states and further includes at least a third programming state that may be a crystalline, amorphous or mixed crystalline-amorphous state.
摘要翻译：一种编程电可变电阻存储器件的方法。当应用于包含相变材料作为活性材料的可变电阻存储器件时，该方法利用多个晶体编程状态。结晶编程状态可以根据电阻进行区分，其中不同状态的电阻值随时间稳定并且表现出很小的或没有漂移。因此，编程方案特别适用于多层存储器应用。晶体编程状态可以通过稳定采用不同晶体结构的结晶相或通过稳定结晶相来实现，所述结晶相包括两种或更多种不同结晶学结构的混合物，其在不同结晶学结构的相对比例中变化。编程方案包含至少两个晶体编程状态，并且还包括至少第三编程状态，其可以是晶体，无定形或混合晶体 - 非晶状态。

77. 发明授权

US08351250B2 Programmable resistance memory 有权
标题翻译：可编程电阻记忆
公开(公告)号：US08351250B2
公开(公告)日：2013-01-08
申请号：US12229997
申请日：2008-08-28
申请人： Tyler Lowrey
发明人： Tyler Lowrey
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C2213/72
摘要： A memory includes a programmable resistance array and unipolar MOS peripheral circuitry. The peripheral circuitry includes address decoding circuitry. Because unipolar MOS circuitry is employed, the number of mask steps and, concomitantly, the cost of the programmable resistance memory may be minimized.
摘要翻译：存储器包括可编程电阻阵列和单极MOS外围电路。外围电路包括地址解码电路。因为采用单极MOS电路，所以可以将屏蔽步骤的数量以及伴随的可编程电阻存储器的成本最小化。

78. 发明授权

US08344350B2 Phase change device with offset contact 有权
标题翻译：相移装置，带偏置接点
公开(公告)号：US08344350B2
公开(公告)日：2013-01-01
申请号：US13093109
申请日：2011-04-25
申请人： Wolodymyr Czubatyj , Tyler Lowrey
发明人： Wolodymyr Czubatyj , Tyler Lowrey
IPC分类号： H01L21/06 , H01L45/00
CPC分类号： H01L45/1683 , H01L45/06 , H01L45/1206 , H01L45/122 , H01L45/1226 , H01L45/126
摘要： A programmable resistance memory combines multiple cells into a block that includes one or more shared electrodes. The shared electrode configuration provides additional thermal isolation for the active region of each memory cell, thereby reducing the current required to program each memory cell.
摘要翻译：可编程电阻存储器将多个单元组合成包括一个或多个共享电极的块。共享电极配置为每个存储单元的有源区域提供额外的热隔离，从而减少编程每个存储单元所需的电流。

79. 发明授权

US08269206B2 Processing phase change material to improve programming speed 有权
标题翻译：处理相变材料，提高编程速度
公开(公告)号：US08269206B2
公开(公告)日：2012-09-18
申请号：US13004167
申请日：2011-01-11
申请人： Stephen J. Hudgens , Tyler Lowrey
发明人： Stephen J. Hudgens , Tyler Lowrey
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1625 , H01L45/165 , H01L45/1658
摘要： A phase change material may be processed to reduce its microcrystalline grain size and may also be processed to increase the crystallization or set programming speed of the material. For example, material doped with nitrogen to reduce grain size may be doped with titanium to reduce crystallization time.
摘要翻译：可以处理相变材料以降低其微晶粒度，并且还可以加工以增加材料的结晶或设定编程速度。例如，掺杂氮以减小晶粒尺寸的材料可以掺杂钛以减少结晶时间。

80. 发明申请

US20120113711A1 Using A Bit Specific Reference Level To Read A Memory 有权
标题翻译：使用位特定参考电平读取存储器
公开(公告)号：US20120113711A1
公开(公告)日：2012-05-10
申请号：US13353531
申请日：2012-01-19
申请人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
发明人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
IPC分类号： G11C11/00 , G11C5/14 , G11C7/06
CPC分类号： G11C7/14 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C2013/0054
摘要： A voltage derived from accessing a selected bit using one read current may be utilized to read a selected bit of an untriggered phase change memory after the read current is changed. As a result, different reference voltages may be used to sense the state of more resistive versus a less resistive selected cells. The resulting read window or margin may be improved in some embodiments,
摘要翻译：在读取电流改变之后，可以利用使用一个读取电流访问所选位的电压来读取未触发的相变存储器的选定位。因此，可以使用不同的参考电压来感测比较阻性的选择的单元更多的电阻的状态。在一些实施例中，可以改善所得到的读取窗口或边缘，

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