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71. 发明授权

US07550316B2 Board on chip package and manufacturing method thereof 有权
标题翻译：片上封装及其制造方法
公开(公告)号：US07550316B2
公开(公告)日：2009-06-23
申请号：US11715906
申请日：2007-03-09
申请人： Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
发明人： Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L23/13 , H01L24/16 , H01L24/48 , H01L24/81 , H01L2221/68345 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/81801 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12044 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/30105 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An aspect of the present invention features a manufacturing method of a board on chip package. The method can comprise: (a) laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; (b) patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; (c) removing the dry film; (d) laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; (e) etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; (f) mounting a semiconductor chip on the solder ball pad by a flip chip bonding; (g) molding the semiconductor chip with a passivation material; (h) removing the carrier film and the thin metal film; and (i) laminating a lower photo solder resist under the solder ball pad. The board on chip package and the manufacturing method thereof according to the present invention can design a high density circuit since a circuit pattern is formed using a seed layer.
摘要翻译：本发明的一个方面的特征在于片上封装的制造方法。该方法可以包括：（a）在载体膜上层压干膜，其一面由薄金属膜层压; （b）通过曝光和显影工艺根据电路线图案化干膜，并形成焊球焊盘和电路线; （c）去除干膜; （d）层压除了形成焊锡球焊盘的部分之外的上光阻焊剂; （e）蚀刻形成在上层光阻抗层未层叠的部分上的金属薄膜; （f）通过倒装芯片接合将半导体芯片安装在焊球垫上; （g）用钝化材料模制半导体芯片; （h）去除载体膜和金属薄膜; 和（i）在焊球垫下方层叠下光阻焊剂。根据本发明的片上封装及其制造方法可以设计高密度电路，因为使用种子层形成电路图案。

72. 发明申请

US20090095508A1 Printed circuit board and method for manufacturing the same 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20090095508A1
公开(公告)日：2009-04-16
申请号：US12149610
申请日：2008-05-05
申请人： Jung-Hyun Park , Ji-Eun Kim , Myung-Sam Kang
发明人： Jung-Hyun Park , Ji-Eun Kim , Myung-Sam Kang
IPC分类号： H05K1/00 , H05K3/02
CPC分类号： H05K3/205 , H01L21/4846 , H05K3/243 , H05K3/421 , H05K2201/09481 , H05K2203/0376 , H05K2203/0574 , Y10T29/49155
摘要： A printed circuit board and a method for manufacturing the same are disclosed. The manufacturing method includes: forming a first plating resist corresponding to the circuit pattern on a surface of each of a first carrier and a second carrier; forming a second plating resist corresponding to the pad on each of the surfaces; forming the pad by performing plating over each of the surfaces; stripping the second plating resists; forming the circuit pattern by performing plating over each of the surfaces; pressing the first carrier and the second carrier with an insulation layer interposed between the first carrier and the second carrier such that the circuit patterns face each other; and removing the first carrier and the second carrier. Since plating bars need not be used, the degree of freedom in designing circuits can be increased, and circuits of higher densities can be designed.
摘要翻译：公开了一种印刷电路板及其制造方法。制造方法包括：在第一载体和第二载体的每一个的表面上形成与电路图案相对应的第一电镀抗蚀剂; 在每个表面上形成对应于所述垫的第二电镀抗蚀剂; 通过在每个表面上进行电镀来形成焊盘; 剥离第二电镀抗蚀剂; 通过在每个表面上进行电镀来形成电路图案; 用绝缘层将所述第一载体和所述第二载体按压在所述第一载体和所述第二载体之间，使得所述电路图案彼此面对; 以及去除所述第一载体和所述第二载体。由于不需要使用电镀棒，因此能够提高设计电路的自由度，能够设计更高密度的电路。

73. 发明申请

US20090011220A1 Carrier and method for manufacturing printed circuit board 审中-公开
标题翻译：载体和制造印刷电路板的方法
公开(公告)号：US20090011220A1
公开(公告)日：2009-01-08
申请号：US12153155
申请日：2008-05-14
申请人： Jung-Hyun Park , Jeong-Woo Park , Sang-Duck Kim , Jong-Gyu Choi , Ji-Eun Kim , Myung-Sam Kang
发明人： Jung-Hyun Park , Jeong-Woo Park , Sang-Duck Kim , Jong-Gyu Choi , Ji-Eun Kim , Myung-Sam Kang
IPC分类号： H05K1/05 , B29C65/42 , B32B7/00 , B32B7/12
CPC分类号： H05K3/205 , H05K3/108 , H05K3/4602 , H05K2203/1536 , Y10T428/249984 , Y10T428/31504 , Y10T428/31511 , Y10T428/3154 , Y10T428/31678 , Y10T428/31721 , Y10T428/31993
摘要： A carrier and a method for manufacturing a printed circuit board are disclosed. The method for manufacturing a printed circuit board may include: forming a first circuit pattern on each of a pair of release layers, which are attached respectively to either side of a base layer by adhesive layers; detaching the pair of release layers from the base layer; stacking and pressing the pair of release layers onto either side of an insulation substrate such that the first circuit patterns are buried in the insulation substrate; and separating the pair of release layers. By forming a circuit pattern on each of a pair of release layers with a single process, and transferring the circuit pattern into each side of an insulation substrate, the manufacturing process can be shortened and circuit patterns can be formed to a high density.
摘要翻译：公开了载体和制造印刷电路板的方法。制造印刷电路板的方法可以包括：在一对剥离层中的每一个上形成第一电路图案，其分别通过粘合剂层附着在基层的任一侧; 将一对释放层从基层分离; 堆叠并将一对释放层压在绝缘基板的任一侧上，使得第一电路图案被埋在绝缘基板中; 并分离一对释放层。通过利用单一工艺在一对释放层的每一个上形成电路图案，并将电路图案转移到绝缘基板的每一侧，可以缩短制造工艺并且可以以高密度形成电路图案。

74. 发明申请

US20080101045A1 Circuit board and manufacturing method thereof 有权
标题翻译：电路板及其制造方法
公开(公告)号：US20080101045A1
公开(公告)日：2008-05-01
申请号：US11976070
申请日：2007-10-19
申请人： Hoe-Ku Jung , Je-Gwang Yoo , Myung-Sam Kang , Ji-Eun Kim , Jeong-Woo Park , Jung-Hyun Park
发明人： Hoe-Ku Jung , Je-Gwang Yoo , Myung-Sam Kang , Ji-Eun Kim , Jeong-Woo Park , Jung-Hyun Park
IPC分类号： H05K1/18 , H05K3/20
CPC分类号： H05K3/205 , H01L21/4846 , H01L23/49816 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/15311 , H05K3/4007 , H05K2201/09745 , H05K2201/10674 , H05K2203/0338 , H05K2203/0435 , Y10T29/49126 , Y10T29/49128 , Y10T29/49144 , Y10T29/49149 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing a circuit board, which includes a bump pad on which a solder bump may be placed, may include forming a solder pad on a surface of a first carrier; forming a metal film, which covers the solder pad and which extends to a bump pad forming region; forming a circuit layer and a circuit pattern, which are electrically connected with the metal film, on a surface of the first carrier; pressing the first carrier and an insulator such that a surface of the first carrier and the insulator faces each other; and removing the first carrier. Utilizing this method, the amount of solder for the contacting of a flip chip can be adjusted, and solder can be filled inside the board, so that after installing a chip, the overall thickness of the package can be reduced.
摘要翻译：一种制造电路板的方法，包括可以放置焊锡凸块的凸块焊盘，可以包括在第一载体的表面上形成焊盘; 形成覆盖焊盘并延伸到凸块焊盘形成区域的金属膜; 在所述第一载体的表面上形成与所述金属膜电连接的电路层和电路图案; 按压所述第一载体和绝缘体，使得所述第一载体和所述绝缘体的表面彼此面对; 并移除第一载体。利用这种方法，可以调节用于接合倒装芯片的焊料的量，并且可以在板内填充焊料，使得在安装芯片之后，可以减小封装的整体厚度。

75. 发明申请

US20080006942A1 Bottom substrate of package on package and manufacturing method thereof 审中-公开
标题翻译：包装底层底物及其制造方法
公开(公告)号：US20080006942A1
公开(公告)日：2008-01-10
申请号：US11708568
申请日：2007-02-21
申请人： Jung-Hyun Park , Byoung-Youl Min , Je-Gwang Yoo , Myung-Sam Kang , Hoe-Ku Jung , Ji-Eun Kim
发明人： Jung-Hyun Park , Byoung-Youl Min , Je-Gwang Yoo , Myung-Sam Kang , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06541 , H01L2225/06568 , H01L2225/06586 , H01L2225/1058 , H01L2924/00014 , H01L2924/01078 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A bottom substrate of package on package and manufacturing method thereof is disclosed. A bottom substrate of a package on package electrically connected to a top substrate by means of a solder ball, including a core board, a solder ball pad formed on a surface of the core board in correspondence with a location of the solder ball, an insulation layer laminated on the core board, a through hole formed by removing a part of the insulation layer such that the solder ball pad is exposed, and a metallic layer filled in the through hole and connected electrically with the solder ball, allows the number of ICs mounted on a bottom substrate to be increased without increasing the size of a solder ball, and allows the size and pitch of the solder balls to be made smaller by controlling the thickness of the insulation layer laminated on the bottom substrate, whereby more signal transmission is possible between a top substrate and a bottom substrate.
摘要翻译：公开了一种封装的底部衬底及其制造方法。封装的封装的底部衬底通过焊球电连接到顶部衬底，所述焊球包括芯板，与所述焊球的位置对应地形成在所述芯板的表面上的焊球焊盘，绝缘体层叠在芯板上的通孔，通过去除绝缘层的一部分使得焊球焊盘露出而形成的通孔以及填充在通孔中并与焊球电连接的金属层允许IC的数量安装在底部基板上以增加焊球的尺寸，并且通过控制层叠在底部基板上的绝缘层的厚度，可以使焊球的尺寸和间距变小，由此更多的信号传输是可能在顶部基板和底部基板之间。

76. 发明申请

US20070281390A1 Manufacturing method of a package substrate 审中-公开
标题翻译：封装衬底的制造方法
公开(公告)号：US20070281390A1
公开(公告)日：2007-12-06
申请号：US11727852
申请日：2007-03-28
申请人： Myung-Sam Kang , Je-Gwang Yoo , Jung-Hyun Park , Ji-Eun Kim , Hoe-Ku Jung , Jin-Yong An
发明人： Myung-Sam Kang , Je-Gwang Yoo , Jung-Hyun Park , Ji-Eun Kim , Hoe-Ku Jung , Jin-Yong An
IPC分类号： H01L21/00
CPC分类号： H01L21/4846 , H01L23/49827 , H01L2924/0002 , H05K3/064 , H05K3/108 , H05K3/242 , H05K3/243 , H05K3/427 , H05K2201/0376 , H05K2203/0361 , H05K2203/1394 , H01L2924/00
摘要： The present invention relates to a manufacturing method of a package substrate. A manufacturing method of a package substrate for mounting an electric component by connecting electrodes of the electric component to bonding pads, includes: manufacturing a buried pattern substrate having a circuit pattern and bonding pads buried in an insulating layer and having a seed layer laminated on the insulating layer, laminating a dry film onto the seed layer and removing the seed layer and the dry film of the upper side of the bonding pads, performing surface-treatment using the remaining seed layer as a plating lead; and removing the remaining seed layer and the dry film such that the circuit pattern is exposed.
摘要翻译：本发明涉及封装基板的制造方法。一种用于通过将电气部件的电极连接到接合焊盘来安装电气部件的封装基板的制造方法，包括：制造具有电路图案的掩埋图案基板和埋在绝缘层中并具有层叠在所述绝缘层上的种子层的接合焊盘绝缘层，将干膜层压到种子层上，去除接合焊盘的上侧的种子层和干膜，使用剩余的种子层作为电镀引线进行表面处理; 并且除去剩余的种子层和干膜，使得电路图案被暴露。

77. 发明申请

US20070210439A1 Board on chip package and manufacturing method thereof 有权
标题翻译：片上封装及其制造方法
公开(公告)号：US20070210439A1
公开(公告)日：2007-09-13
申请号：US11715906
申请日：2007-03-09
申请人： Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
发明人： Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L23/13 , H01L24/16 , H01L24/48 , H01L24/81 , H01L2221/68345 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/81801 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12044 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/30105 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An aspect of the present invention features a manufacturing method of a board on chip package. The method can comprise: (a) laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; (b) patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; (c) removing the dry film; (d) laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; (e) etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; (f) mounting a semiconductor chip on the solder ball pad by a flip chip bonding; (g) molding the semiconductor chip with a passivation material; (h) removing the carrier film and the thin metal film; and (i) laminating a lower photo solder resist under the solder ball pad. The board on chip package and the manufacturing method thereof according to the present invention can design a high density circuit since a circuit pattern is formed using a seed layer.
摘要翻译：本发明的一个方面的特征在于片上封装的制造方法。该方法可以包括：（a）在载体膜上层压干膜，其一面由薄金属膜层压; （b）通过曝光和显影工艺根据电路线图案化干膜，并形成焊球焊盘和电路线; （c）去除干膜; （d）层压除了形成焊锡球焊盘的部分之外的上光阻焊剂; （e）蚀刻形成在上层光阻抗层未层叠的部分上的金属薄膜; （f）通过倒装芯片接合将半导体芯片安装在焊球垫上; （g）用钝化材料模制半导体芯片; （h）去除载体膜和金属薄膜; 和（i）在焊球垫下方层叠下光阻焊剂。根据本发明的片上封装及其制造方法可以设计高密度电路，因为使用种子层形成电路图案。

78. 发明申请

US20160348341A1 OUTRIGGER AND DOZER CONTROL USING GUI 审中-公开
标题翻译：使用GUI进行外部控制和DOZER控制
公开(公告)号：US20160348341A1
公开(公告)日：2016-12-01
申请号：US15114632
申请日：2014-01-27
申请人： Ji-Eun Kim , VOLVO CONSTRUCTION EQUIPMENT AB
发明人： Ji-Eun Kim
IPC分类号： E02F9/20 , E02F9/26 , E02F9/08
CPC分类号： E02F9/2004 , B66C23/78 , E02F3/844 , E02F3/961 , E02F9/085 , E02F9/2012 , E02F9/26 , E02F9/264
摘要： The present invention provides an outrigger and dozer control device of a construction machine which includes one or more outriggers and one or more dozers, the device comprising: an actuator which drives outriggers or dozers of a vehicle; a first key input means which can select one of an outrigger set and a dozer set; a second key input means which can specifically select an outrigger or a dozer; a screen display unit which displays a selected outrigger or dozer while a specific outrigger or a dozer is being selected by the first key input means and the second key input means; and a control unit which receives a selection of an outrigger and a dozer from the first key input means and the second input means and controls an actuator of each selected outrigger and each selected dozer. The present invention simplifies the equipment operation environment for a worker and makes the equipment operation more convenient and easier.
摘要翻译：本发明提供了一种包括一个或多个外伸支架和一个或多个推土机的施工机械的支腿和推土机控制装置，该装置包括：驱动车辆的外伸支架或推土机的致动器; 第一键输入装置，其可以选择外伸支架和推土机组中的一个; 可以具体地选择外伸支架或推土机的第二键输入装置; 屏幕显示单元，其中通过第一键输入装置和第二键输入装置选择特定外伸支架或推土机时，显示选定的外伸支架或推土板; 以及控制单元，其从第一键输入装置和第二输入装置接收外伸支架和推土机的选择，并且控制每个选择的支架和每个所选推土机的致动器。本发明简化了工人的设备操作环境，使设备操作更方便，更方便。

79. 发明授权

US08889994B2 Single-layered printed circuit board and manufacturing method thereof 有权
标题翻译：单层印刷电路板及其制造方法
公开(公告)号：US08889994B2
公开(公告)日：2014-11-18
申请号：US13018971
申请日：2011-02-01
申请人： Young-Ji Kim , Kyung-Ro Yoon , Sang-Duck Kim , Jung-Hyun Park , Nam-Keun Oh , Jong-Gyu Choi , Ji-Eun Kim
发明人： Young-Ji Kim , Kyung-Ro Yoon , Sang-Duck Kim , Jung-Hyun Park , Nam-Keun Oh , Jong-Gyu Choi , Ji-Eun Kim
IPC分类号： H05K1/16
CPC分类号： H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.
摘要翻译：公开了一种单层印刷电路板及其制造方法。根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分所述绝缘膜使得所述焊盘的至少一部分露出。

80. 发明授权

US08418355B2 Method for manufacturing circuit board 失效
标题翻译：电路板制造方法
公开(公告)号：US08418355B2
公开(公告)日：2013-04-16
申请号：US11976071
申请日：2007-10-19
申请人： Sang-Duck Kim , Jung-Hyun Park , Hoe-Ku Jung , Jong-Gyu Choi , Ji-Eun Kim , Jeong-Woo Park
发明人： Sang-Duck Kim , Jung-Hyun Park , Hoe-Ku Jung , Jong-Gyu Choi , Ji-Eun Kim , Jeong-Woo Park
IPC分类号： H05K3/20
CPC分类号： H05K3/20 , H05K3/205 , H05K3/207 , H05K3/386 , H05K2203/0113 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49158 , Y10T29/49163
摘要： A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.
摘要翻译：公开了一种形成转录电路的方法及其制造方法。一种形成转录电路的方法，其包括通过在模板上选择性地形成抗蚀剂来形成对应于电路图案的凹版图案，将导电材料填充到凹版图案中，以及通过将载体压载到载体上而将载体转移到使得载体面向具有填充有导电材料的模板的表面的模板，使得可以形成可以使用现有设备转录成绝缘板的转录电路，由此可以降低成本。

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