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71. 发明专利

JPH0823514A DIGITAL VIDEO SIGNAL DECODER 失效
公开(公告)号：JPH0823514A
公开(公告)日：1996-01-23
申请号：JP15569594
申请日：1994-07-07
申请人： HITACHI LTD
发明人： TSUBOI YUKITOSHI , OKU MASUO , FUJII YUKIO , MIZOZOE HIROKI
IPC分类号： H04N5/92 , G11B20/10 , H04N5/93 , H04N7/24 , H04N19/00 , H04N19/42 , H04N19/423 , H04N19/44 , H04N19/46 , H04N19/59 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/91 , H04N19/94
摘要： PURPOSE:To suppress a circuit scale small and to reduce power consumption by synchronously operating a decoding processing circuit, a display processing circuit and various processing circuits constituting the decoding processing circuit. CONSTITUTION:A timing unit 18 generates plural timing control signals for instructing the respective operation timings of an input buffer memory 11, a decoding buffer memory 12, a variable length decoding unit 13, an IQ.IDCT unit 14, a movement compensation unit 15, a display unit 16 and a memory controller 17 for constituting a decoder LSI 1 from inputted vertical synchronizing signals, horizontal synchronizing signals and clock signals. That is, the respective timing control signals are generated corresponding to a fixed time slot predetermined for a display timing. Then, the decoding processing circuit, the display processing circuit and the various processing circuits for constituting the decoding processing circuit are synchronously operated. Thus, a timing circuit for generating the timing signals of the fixed time slot can be a simple circuit.

72. 发明专利

JPH07264538A VIDEO TAPE RECORDER 失效
公开(公告)号：JPH07264538A
公开(公告)日：1995-10-13
申请号：JP4831594
申请日：1994-03-18
申请人： HITACHI LTD
发明人： FUJII YUKIO , MIZOZOE HIROKI
IPC分类号： H04N5/20 , H04N3/22 , H04N5/92 , H04N7/01 , H04N9/80
摘要： PURPOSE:To intuitively visually recongnize the aspect ratio of an objective image by forming an image free from vertical/horizontal distortion by aspect conversion and displaying whether an unconverted image is longitudinal or not on a screen. CONSTITUTION:A received MUSE video signal is sent to a MUSE/NTSC converter 3 by using a tuner 2 and an NTSC signal in a longitudinal full mode is supplied to a switch 8 and a flag superposing circuit 10. The circuit 10 superposes a flag signal from a wide flag signal generating circuit 9 to the video signal based upon the channel selecting information of the tuner 2 and the mode information of the converter 3 and the superposed signal is recorded in a tape by a recording/reproducing processing part 4. The recording video signal is inputted to an aspect converting circuit 5 and the normal side of a switch 13 through the switch 8, the circuit 5 converts the aspect ratio of the input signal so that the aspect ratio of an NTSC signal in the longitudinal full mode is 4:3, a wide flag signal is erased by an erasing circuit 12, and the erased signal is supplied to the conversion side.

73. 发明专利

JPH07135618A VIDEO SIGNAL PROCESSOR FOR ASPECT RATIO CONVERSION 失效
公开(公告)号：JPH07135618A
公开(公告)日：1995-05-23
申请号：JP27942993
申请日：1993-11-09
申请人： HITACHI LTD
发明人： MIZOZOE HIROKI , FUJII YUKIO , AZEYANAGI TOMOMITSU
IPC分类号： H04N5/21 , H04N5/04 , H04N5/46 , H04N7/01
摘要： PURPOSE:To reduce flicker and an aspect ratio by using a delay means to delay an input TV signal in the unit of fields or lines, multiplying a coefficient with the delayed signal, summing up outputs of the multiplier to output so as to suppress reflection disturbance generated in a vertical direction of a video image attended with aspect ratio conversion. CONSTITUTION:An interlace scanning TV luminance signal received by an input terminal 1 is inputted to 1-line delay devices 11, 13 and a 1-field delay device 12, a plurality of data at different times are made the same in time and 4-line data (w), (x), (y), (z) are inputted by a multiplier 21, in which a coefficient fed from a circuit generator 31 is multiplied with an input signal and the product is outputted. A coefficient generator 37 generates sets of coefficients switchingly for each line or field and gives the generated coefficient to the multiplier 21. Output signals from the multiplier 21 are added by an adder 41, in which a signal reduced in the vertical direction at a multiple of 3/4, that is, subjected to aspect ratio conversion is outputted. Signals of three lines from 4-line signals are written in a buffer memory 51 and the write is stopped for one line period. On the other hand, the read is implemented continuously.

74. 发明专利

JPH06350966A PICTURE SIGNAL RECORDER AND PICTURE SIGNAL REPRODUCING DEVICE 失效
公开(公告)号：JPH06350966A
公开(公告)日：1994-12-22
申请号：JP14065793
申请日：1993-06-11
申请人： HITACHI LTD
发明人： OKU MASUO , TSUBOI YUKITOSHI , TAKAHASHI SUSUMU , FUJII YUKIO , ICHIGE KENJI , TSUKIJI NOBUYOSHI
IPC分类号： H04N5/92 , H04N7/00 , H04N7/015
摘要： PURPOSE:To record and reproduce efficiently a MUSE signal and an NTSC signal whose resolution differs from each other entirely. CONSTITUTION:When an NTSC signal is recorded, the NTSC signal is decoded by a decoder 2 and compressed by a picture compression circuit 3b and fed to an error correction coding circuit 5 and a modulation circuit 6. When a MUSE signal with high resolution is recorded, the MUS signal is subjected to interpolation and band limit processing by a MUSE signal decoder 1 and compressed by a picture compression circuit 3a and fed to the error correction coding circuit 5 and the modulation circuit 6 as a signal with nearly equal data rate to that of the NTSC signal. Since the MUSE signal and the NTSC signal whose resolution is entirely different from each other are made to be signals of nearly equal data rate, most of the recording processing circuit and the reproduction processing circuit is used in common for the MUSE signal and the NTSC signal and the recording band of the recording medium is effectively utilized.

75. 发明专利

JPH05227517A COMPRESSED MOVING IMAGE DECODER 失效
公开(公告)号：JPH05227517A
公开(公告)日：1993-09-03
申请号：JP2823292
申请日：1992-02-14
申请人： HITACHI LTD
发明人： TAKAHASHI SUSUMU , OKU MASUO , TSUBOI YUKITOSHI , ICHIGE KENJI , FUJII YUKIO
IPC分类号： H04N5/92 , H04N11/04 , H04N19/102 , H04N19/136 , H04N19/166 , H04N19/176 , H04N19/196 , H04N19/423 , H04N19/44 , H04N19/46 , H04N19/59 , H04N19/60 , H04N19/625 , H04N19/65 , H04N19/67 , H04N19/70 , H04N19/85 , H04N19/88 , H04N19/89 , H04N19/895 , H04N19/91
摘要： PURPOSE:To attain a further natural correction by utilizing information without any error in a block by using both an in-screen correction on an orthogonal transformation factor and a between-screen correction on picture data, in a device which reproduces picture data compressed and encoded through orthogonal transformation. CONSTITUTION:An in-screen correcter 4 receives a correction command from an error correcter 2, and operates the in-screen correction processing for an invalid discrete cosine transformation factor. An inverse discrete cosine transformer 5 restores the picture data of 8X8 picture elements by an inverse discrete cosine transformation from the discrete cosine transformation factor operated for the in-screen correction processing. A between-screen correcter 6 operates the between-screen correction processing of replacing the entire picture data in the block for the correction command with the picture data of the pre-screen. At that time, the between-screen correcter 6 is controlled by a between-screen correction judging circuit 20 so that the between-screen correction processing can be operated only when the discrete cosine transformation factors more than preliminarily set constant amounts in the block are invalid.

76. 发明专利

JPH0448886A TIME BASE CORRECTOR 失效
公开(公告)号：JPH0448886A
公开(公告)日：1992-02-18
申请号：JP15771490
申请日：1990-06-18
申请人： HITACHI LTD
发明人： OKU MASUO , ABE HIROCHIKA , FUJII YUKIO , TAKAHASHI SUSUMU , TAKAMIYA MASASHI
IPC分类号： H04N5/956 , H04N5/95
摘要： PURPOSE:To detect and process a high frequency base error being a cause to a meandered picture at compatible reproduction with respect to a pattern with high accuracy by applying digital processing to a time base error signal detected from a video signal. CONSTITUTION:A time base error detector 8 uses a synchronizing signal or a color burst signal of an input video signal SVID-IN received thereby to generate a time base error (detection) signal and the obtained time base error signal is digitized by a 2nd ADC 9 in matching with a detection timing of the time base error. A DSP 10 together with a memory 11 applies processing such as delay and arithmetic operation to the digitized time base error signal STBE. A digital video signal from a TBC memory 2 is read synchronously with a reference read clock signal without time base error generated by a reference clock generating section 6 based on an output of a reference synchronizing signal generator 7.

77. 发明专利

JPH03297295A MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH03297295A
公开(公告)日：1991-12-27
申请号：JP9775290
申请日：1990-04-16
申请人： HITACHI LTD
发明人： KITADE TAKESHI , KANIWA KOUJI , FUJII YUKIO , NISHIJIMA HIDEO , ONO KOICHI
IPC分类号： H04N9/83 , G11B20/02 , H04N9/802 , H04N9/87
摘要： PURPOSE:To improve quality of a reproduced picture and a reproduced audio signal by expanding a tape recording available time without modification of a tape format. CONSTITUTION:In the case of expanding a tape recording available time, one field period of an FM luminance signal YFM and a low frequency conversion chroma signal CL from TBC 9, 16 is increased to 5/4 with respect to one field period of an input luminance signal and an input chroma signal Cn. Thus, one field each of the FM luminance signal YFM and the low frequency conversion chroma signal CL is recorded on each track formed on a magnetic tape 25. Since video signals for 150min are thinned by 2 fields each per 10 fields, the number of fields of the video signal is equal to the number of fields for 60min, and the video signals for 150min are recorded on the magnetic tape 25.

78. 发明专利

JPH03178008A DUBBING SYSTEM FOR VTR 失效
公开(公告)号：JPH03178008A
公开(公告)日：1991-08-02
申请号：JP31539589
申请日：1989-12-06
申请人： HITACHI LTD
发明人： OKU MASUO , TAKAHASHI SUSUMU , FUJII YUKIO , ABE HIROCHIKA , TAKAMIYA MASASHI
IPC分类号： H04N5/91 , G11B5/027
摘要： PURPOSE:To obtain a video signal and a sound signal with high quality by supplying an RF sound signal, which is detected by the sound head of a reproducing side VTR, to the sound head of a recording side VTR, while keeping the signal form. CONSTITUTION:At the time of dubbing, a recording signal to be sent out from the recording side VTR is inputted to RF signal input terminals 111-113. The RF sound signal inputted from one RF sound signal input terminal 111 is sent out to a first sound head 31 and the first sound head 31 is driven. Then, the dubbing recording of the RF sound signal onto a tape is executed. The RF sound signal inputted from the other RF sound signal input terminal 112 is similarly sent out as well and a second sound head 32 is driven. Then, the dubbing recording of the RF sound signal onto the tape is executed. Therefore, without switching the outputs of the two sound heads, dubbing is executed while maintaining the sound signal as the RF signal. Thus, without increasing switching noise, the dubbing of the sound signal can be executed with high quality.

79. 发明专利

JPH02130093A SYNCHRONIZING CONVERTING DEVICE 失效
公开(公告)号：JPH02130093A
公开(公告)日：1990-05-18
申请号：JP28247188
申请日：1988-11-10
申请人： HITACHI LTD
发明人： FUJII YUKIO , OKU MASUO , AYUSAWA IWAO
IPC分类号： H04N9/896 , H04N9/89
摘要： PURPOSE:To automatically evade the frequent occurrence of the passing and passed of a writing and reading resetting signal by shifting the timing of a writing or reading resetting signal in units of 1H each time the hourly approach of the writing resetting signal and the reading resetting signal is detected. CONSTITUTION:When a reading resetting signal YRRS and a writing resetting signal YWRS approach hourly and a writing resetting signal YWRS is included in a gate signal GATE, an output signal AND of an AND circuit 21 becomes 'H', and as the result, the level of the output signal of a flip flop 22 is inverted. As the result, a change-over switch 19a selects a next reading resetting signal YRRS2. Thus, when the approach of the reading resetting signal YRRS and the writing resetting signal YWRS is detected, the phase of the reading resetting signal YRRS is shifted in units of 1H. Thus, the timing of respective resetting signals YRRS and YWRS is forcibly pulled away and the passing and passed of both due to the jitter can be automatically evaded.

80. 发明专利

JPH01264388A VIDEO DISK PLAYER 失效
公开(公告)号：JPH01264388A
公开(公告)日：1989-10-20
申请号：JP9135388
申请日：1988-04-15
申请人： HITACHI LTD
发明人： FUJII YUKIO , OKU MASUO , KUDO YOSHIMICHI , SAITO ISAO
IPC分类号： H04N5/93 , G11B33/10
摘要： PURPOSE:To reduce the mental burden of a user by detecting time passage from an activation starting to an activation completion and the time passage from a search start to a search completion, and changing the background picture of pull-back, etc., or an output picture according to the time passage. CONSTITUTION:A switch 9 selects the output side of a switch 22 at the time of activation. Consequently, as rotation frequencies omega of a motor 3 increases from 0 near 1,800 rotations/minute, a pulse width W of a switching signal becomes wider. As a result, on the output picture, a black part is gradually expanded from a left edge. That is, the blue picture is gradually erased from the left edge. At the time of search, since the output of the switch 22 is fetched from an output terminal 10, the blue of output picture is erased according to the time passage from the search start to the search completion. Consequently, in both cases, the user can know the time point of the reproducing start or restart by the percentage of the erased output picture, and the mental burden can be reduced.

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