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71. 发明专利

JPS63316998A SUBSCRIBER CIRCUIT FOR DIGITAL EXCHANGE 失效
公开(公告)号：JPS63316998A
公开(公告)日：1988-12-26
申请号：JP15400587
申请日：1987-06-19
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI , SAWANO KAZUHIKO
IPC分类号： H04Q3/42 , H04Q11/04
摘要： PURPOSE:To prevent the occurrence of malfunction of the titled circuit even in the hit or abnormity of a synchronizing clock by allowing a counter circuit and a decoder to close the gate circuit thereby inhibiting the passing of a burst clock if an erroneous synchronizing signal is applied between synchronizing clocks. CONSTITUTION:The gate circuit 5 comprising an AND circuit is provided on the way of a line supplying a burst clock output of the gate circuit 4 to a serial/parallel conversion circuit 1. In the abnormity where a synchronizing clock signal is retarded by one clock, an output of a D FF6 subjected to one clock delay is overlapped partially with an output 255 of the decoder 3, an output of a D FF8 changes from '1' to '0' level, a '0' level signal is fed to the gate circuit 5 to inhibit the passing of the burst clock through the gate circuit. Moreover, the decoder output has a width of 2-clock or over because the input of the synchronizing clock is stopped to the counter 2 in case of the stop of the synchronizing clock, the transmission of the burst clock is stopped and the fetch of status information in the abnormity of synchronization is prevented.

72. 发明专利

JPS63300657A RING TRIP CIRCUIT IN SUBSCRIBER CIRCUIT 失效
公开(公告)号：JPS63300657A
公开(公告)日：1988-12-07
申请号：JP13678087
申请日：1987-05-29
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI , SAWANO KAZUHIKO
IPC分类号： H04M3/02
摘要： PURPOSE:To attain large scale integration (LSI) by adding an AC voltage superimposed by a call signal to an AC voltage being retarded by a half period so as to cancel the AC voltage and obtain only a DC component thereby stabilizing the ring trip operation and making the circuit small and simplifying it. CONSTITUTION:A call signal current flows to a power supply VB from a ringer 10 through a resistor R, a subscriber line 4 and a telephone set 5, at an incoming call. In hooking off a telephone set 5, a DC current flows to a resistor R from the power supply VB through a telephone set 5. The current is converted by a current voltage conversion section 1 and is sent out as an output signal AS, and the signal is superimposed with the call signal. In giving the signal AS to a delay means 6, the signal BS having a waveform retarding by a half period is obtained. In adding the signals AS and BS to an adder section 7, the output voltage of the adder section 7 has a waveform of the DC component only while the AC components of both the output signals are cancelled. The output voltage is compared with a reference voltage VS by a comparison section 8 and when the output voltage exceeds the voltage VS by off-hook, a trip signal TP(1) is sent.

73. 发明专利

JPS63178625A CODE CONVERTER 失效
公开(公告)号：JPS63178625A
公开(公告)日：1988-07-22
申请号：JP962587
申请日：1987-01-19
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI
IPC分类号： H03M7/50 , H03M7/42
摘要： PURPOSE:To realize a code converter only with a conversion circuit relating to the expansion by generating addresses of a conversion list in the ascending order sequentially, reading an expanded signal level and stopping the generation of address when the level reaches a quantized input signal or over, and using the address at that time as a compressed signal level. CONSTITUTION:A received PCM signal is divided into a sign bit (1 bit) and signal bits (7 bits) subject to parallel processing and the signal bits representing an input signal level is fed to a terminal (a) of a selector (SEL) 82. The said count (7 bits) fed to a ROM 5 via a terminal (b) of the SEL 82 is treated as an input signal address of a conversion list (TB) 51 and an expanded signal level in 12-bit is fed to a terminal (c) of a comparator circuit (CP) 91. A CP 91 compares the expanded signal level supplied one after another together with the increase in the count with a uniformly quantized input signal in 12-bit supplied to a terminal (d) and stops the counter 81 when the said expanded signal level reaches the uniformly quantized input signal or over. The value is equal to the input signal address and represents the compressed signal level.

74. 发明专利

JPS61260797A SCAN INFORMATION READING CIRCUIT 失效
公开(公告)号：JPS61260797A
公开(公告)日：1986-11-18
申请号：JP10202585
申请日：1985-05-14
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI
IPC分类号： H04Q3/72
摘要： PURPOSE:To make it easy to confirm the normality of a scan highway information by selectively reading the types of scan information to be designated or the scan information group corresponding to the subscriber's circuits to be designated among the scan information groups output of each subscriber's circuit. CONSTITUTION:Scan highway information (s) received from the scan information highway is stored in memory 2 via serial-parallel conversion circuit 1. Read changeover signal switch is set at a position 0 to select the output from read address counting circuit 7 using selection circuit 5 and setting is made so that the output from serial-parallel conversion circuit 8 is selected by selection circuit 6. On the other hand, setting is made so that the designated types of the scan information is selected by the scan information type designating signal (x) input to selection circuit 9, and only the loop detecting information is selected and outputted via the serial-parallel conversion circuit 8, the selection circuit 6, and a register 10. To read only the scan information group corresponding to the designated subscriber's circuits, the read changeover signal switch is set at a position 1 to make selection circuit 5 select a circuit designation signal ct and to make the selection circuit 6 select the output of memory 2.

75. 发明专利

JPS6161557A Metering pulse sending circuit 失效
标题翻译：计量脉冲发送电路
公开(公告)号：JPS6161557A
公开(公告)日：1986-03-29
申请号：JP18286684
申请日：1984-09-03
申请人： Fujitsu Ltd , Nippon Telegr & Teleph Corp
发明人： TAKADA KENZO , SHINKAWA HIROSHI , HAYASHI TOSHIO , KIMURA TADAKATSU
IPC分类号： H04M15/00
CPC分类号： H04M15/00
摘要： PURPOSE:To make possible the reduction of a consumption power by controlling with a current supply circuit so that the current, which flows between a normal and a reverse current supply circuit may be supplied only when a metering pulse is sent. CONSTITUTION:When a metering pulse controlling signal (a) becomes '0' from '1', a time constant circuit operates and biases in an electric supply controlling circuit 4 so that the current to be supplied to current mirror CM circuit 2, 3 may be decreased gradually. The current to be supplied to a circuit current circuit 1 is decreased and the current to be supplied to subscriber lines A, B through semiconductor switches S1, S2 is also decreased gradually. A signal (a) having a gentle slope leading edge is added to an amplifier 23 through a LPF, which consists of a resistance 21 and capacitor 22, the output is supplied to CM circuits 3, 13 through transistors Tr5, 15 of a normal and a reverse electric supply circuit N, R and the current of direct current circuits 1, 11 is increased, corresponding to the current. Consequently, only when a metering pulse is sent, a consumption power to the subscriber can be reduced by control ling the current, which flows between a circuit 1 and a circuit 11.
摘要翻译：目的：通过用电流供给电路进行控制，可以降低消耗功率，从而只有在发送计量脉冲时才可以提供在正常供电电路和反向电流供给电路之间流动的电流。构成：当计量脉冲控制信号（a）从“1”变为“0”时，时间常数电路在电源控制电路4中工作并偏置，使得提供给电流镜CM电路2,3的电流可以逐渐减少。提供给电路电路1的电流减小，并且通过半导体开关S1，S2向用户线路A，B提供的电流也逐渐减小。具有平缓斜率前沿的信号（a）通过由电阻21和电容器22组成的LPF被添加到放大器23中，通过正常的晶体管Tr5,15将输出提供给CM电路3,13，并且反向电源电路N，R和直流电路1,11的电流相应于电流增加。因此，仅当发送计量脉冲时，可以通过控制在电路1和电路11之间流动的电流来减少对用户的消耗功率。

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