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    • 74. 发明申请
    • Nonvolatile memory device and method for fabricating the same
    • 非易失性存储器件及其制造方法
    • US20050247973A1
    • 2005-11-10
    • US11121866
    • 2005-05-03
    • Sang Lee
    • Sang Lee
    • H01L21/76H01L21/8247H01L27/115H01L29/423H01L29/788H01L29/792
    • H01L27/11521H01L27/115H01L29/42336H01L29/7885
    • A nonvolatile memory device and a method for fabricating the same is disclosed, in which a corner of a floating gate is rounded to reduce, minimize or prevent discharge of programmed electrons, and an overlap between the floating gate and a control gate increases to improve a coupling ratio and enable nonvolatile memory device operations at a low voltage. The nonvolatile memory device includes a device isolation layer in a field region on a semiconductor substrate, the device isolation having a trench; a tunnel oxide layer; a floating gate comprising a polysilicon pattern in an active region of the semiconductor substrate and a polysilicon spacer at the side of the polysilicon pattern and the inner sidewall of the trench; a gate dielectric layer on the floating gate; and a control gate on the gate dielectric layer overlapping with the floating gate.
    • 公开了一种非易失性存储器件及其制造方法,其中浮动栅极的角被倒圆以减少,最小化或防止编程电子的放电,并且浮置栅极和控制栅极之间的重叠增加以改善 耦合比,并使得非易失性存储器件在低电压下工作。 非易失性存储器件包括在半导体衬底上的场区中的器件隔离层,器件隔离具有沟槽; 隧道氧化层; 包括在所述半导体衬底的有源区域中的多晶硅图案的浮置栅极和在所述多晶硅图案侧和所述沟槽的内侧壁处的多晶硅间隔物; 浮栅上的栅介质层; 并且栅极电介质层上的与浮动栅极重叠的控制栅极。
    • 79. 发明申请
    • PSRAM for performing write-verify-read function
    • PSRAM用于执行写入验证读取功能
    • US20050201167A1
    • 2005-09-15
    • US10876778
    • 2004-06-28
    • Sang LeeTae Kwon
    • Sang LeeTae Kwon
    • G11C11/4193G11C7/00
    • G11C11/40615G11C8/10G11C11/401G11C29/50016
    • A PSRAM performs a Write-Verify-Read function at a test mode, thereby easily analyzing defects. The PSRAM comprises a test mode decoder, a refresh control block and a precharge control block. The test mode decoder generates a test mode control signal for performing a WVR function when a test mode starts. The refresh control block selectively performs a refresh operation in response to the test mode control signal. The precharge control block selectively performs a precharge operation in response to the test mode control signal outputted from the test mode decoder. Here, the test mode control signal is activated at the test mode so that the refresh operation and the precharge operation are not performed.
    • PSRAM在测试模式下执行写入验证读取功能,从而轻松分析缺陷。 PSRAM包括测试模式解码器,刷新控制块和预充电控制块。 当测试模式开始时,测试模式解码器产生用于执行WVR功能的测试模式控制信号。 刷新控制块根据测试模式控制信号有选择地执行刷新操作。 预充电控制块响应于从测试模式解码器输出的测试模式控制信号选择性地执行预充电操作。 这里,在测试模式下激活测试模式控制信号,使得不执行刷新操作和预充电操作。