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71. 发明申请

US20060172467A1 Strained silicon devices transfer to glass for display applications 失效
标题翻译：应变硅器件转移到玻璃上进行显示应用
公开(公告)号：US20060172467A1
公开(公告)日：2006-08-03
申请号：US11046411
申请日：2005-01-28
申请人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu
发明人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/1266 , H01L27/1203 , H01L27/1214 , H01L29/78687
摘要： A method of fabricating strained silicon devices for transfer to glass for display applications includes preparing a wafer having a silicon substrate thereon; forming a relaxed SiGe layer on the silicon substrate; forming a strained silicon layer on the relaxed SiGe layer; fabricating an IC device on the strained silicon layer; depositing a dielectric layer on the wafer to cover a gate module of the IC device; smoothing the dielectric; implanting ions to form a defect layer; cutting the wafer into individual silicon dies; preparing a glass panel and the silicon dies for bonding; bonding the silicon dies onto the glass panel to form a bonded structure; annealing the bonded structure; splitting the bonded structure along the defect layer; removing the remaining silicon layer from the silicon substrate and relaxed SiGe layer on the silicon die on the glass panel; and completing the glass panel circuitry.
摘要翻译：制造用于转移到用于显示器应用的玻璃的应变硅器件的方法包括制备其上具有硅衬底的晶片; 在硅衬底上形成松弛的SiGe层; 在松弛的SiGe层上形成应变硅层; 在应变硅层上制造IC器件; 在所述晶片上沉积介电层以覆盖所述IC器件的栅极模块; 平滑电介质; 注入离子以形成缺陷层; 将晶片切割成单独的硅模具; 制备玻璃面板和用于接合的硅模具; 将硅模具接合到玻璃面板上以形成接合结构; 退火键合结构; 沿着缺陷层分离粘结结构; 从硅衬底去除剩余的硅层并在玻璃面板上的硅晶片上松弛SiGe层; 并完成玻璃面板电路。

72. 发明申请

US20060113522A1 Strained silicon fin structure 有权
标题翻译：应变硅翅片结构
公开(公告)号：US20060113522A1
公开(公告)日：2006-06-01
申请号：US11327092
申请日：2006-01-06
申请人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
IPC分类号： H01L29/06
CPC分类号： H01L29/785 , H01L29/1054 , H01L29/66795 , H01L29/78687
摘要： Disclosing is a strained silicon finFET device having a strained silicon fin channel in a double gate finFET structure. The disclosed finFET device is a double gate MOSFET consisting of a silicon fin channel controlled by a self-aligned double gate for suppressing short channel effect and enhancing drive current. The silicon fin channel of the disclosed finFET device is a strained silicon fin channel, comprising a strained silicon layer deposited on a seed fin having different lattice constant, for example, a silicon layer deposited on a silicon germanium seed fin, or a carbon doped silicon layer deposited on a silicon seed fin. The lattice mismatch between the silicon layer and the seed fin generates the strained silicon fin channel in the disclosed finFET device to improve hole and electron mobility enhancement, in addition to short channel effect reduction characteristic inherently in a finFET device.
摘要翻译：公开了一种应变硅finFET器件，其具有双栅极finFET结构中的应变硅鳍通道。所公开的finFET器件是由用于抑制短沟道效应和增强驱动电流的自对准双栅极控制的硅鳍通道组成的双栅极MOSFET。所公开的finFET器件的硅鳍通道是应变硅鳍通道，包括沉积在具有不同晶格常数的种子鳍上的应变硅层，例如沉积在硅锗晶种鳍上的硅层或碳掺杂硅层沉积在硅种子翅片上。除了在finFET器件中固有的短沟道效应降低特性之外，硅层和种子鳍之间的晶格失配在所公开的finFET器件中产生应变硅鳍通道，以改善空穴和电子迁移率增强。

73. 发明申请

US20060099773A1 Fabrication of a low defect germanium film by direct wafer bonding 失效
标题翻译：通过直接晶片接合制造低缺陷锗膜
公开(公告)号：US20060099773A1
公开(公告)日：2006-05-11
申请号：US10985444
申请日：2004-11-10
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L21/02052 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a low defect germanium thin film includes preparing a silicon wafer for germanium deposition; forming a germanium film using a two-step CVD process, annealing the germanium thin film using a multiple cycle process; implanting hydrogen ions; depositing and smoothing a layer of tetraethylorthosilicate oxide (TEOS); preparing a counter wafer; bonding the germanium thin film to a counter wafer to form a bonded structure; annealing the bonded structure at a temperature of at least 375° C. to facilitate splitting of the bonded wafer; splitting the bonded structure to expose the germanium thin film; removing any remaining silicon from the germanium thin film surface along with a portion of the germanium thin film defect zone; and incorporating the low-defect germanium thin film into the desired end-product device.
摘要翻译：制造低缺陷锗薄膜的方法包括制备用于锗沉积的硅晶片; 使用两步CVD工艺形成锗膜，使用多循环工艺退火锗薄膜; 植入氢离子; 沉积和平滑一层四乙基原硅酸盐氧化物（TEOS）; 准备一个反晶圆; 将锗薄膜结合到对置晶片上以形成结合结构; 在至少375℃的温度下对接合结构进行退火以促进键合晶片的分裂; 分离粘结结构以暴露锗薄膜; 从锗薄膜表面除去锗薄膜缺陷区的一部分剩余的硅; 并将低缺陷锗薄膜并入期望的最终产品装置中。

74. 发明申请

US20060019464A1 Method of fabricating silicon on glass via layer transfer 有权
标题翻译：通过层转移在玻璃上制造硅的方法
公开(公告)号：US20060019464A1
公开(公告)日：2006-01-26
申请号：US10894685
申请日：2004-07-20
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , Y10S438/977
摘要： A method of fabricating a silicon-on-glass layer via layer transfer includes depositing a layer of SiGe on a silicon substrate; relaxing the SiGe layer; depositing a layer of silicon on the relaxed SiGe layer; implanting hydrogen ions in a second hydrogen implantation step to facilitate splitting of the wafer; bonding a glass substrate to the strained silicon layer to form a composite wafer; splitting the composite wafer to provide a split wafer; and processing the split wafer to prepare it for subsequent device fabrication.
摘要翻译：通过层转移制造硅 - 玻璃层的方法包括在硅衬底上沉积SiGe层; 放松SiGe层; 在松弛的SiGe层上沉积一层硅; 在第二氢注入步骤中注入氢离子以促进晶片的分裂; 将玻璃基板粘合到应变硅层以形成复合晶片; 分离复合晶片以提供分离晶片; 并处理分离晶片以准备其用于随后的器件制造。

75. 发明申请

US20050196894A1 THREE-DIMENSIONAL QUANTUM DOT STRUCTURE FOR INFRARED PHOTODETECTION 有权
标题翻译：红外光电三维量子结构
公开(公告)号：US20050196894A1
公开(公告)日：2005-09-08
申请号：US10794158
申请日：2004-03-03
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
IPC分类号： H01L21/00 , H01L21/66 , H01L31/0352
CPC分类号： H01L31/035236 , B82Y10/00 , B82Y20/00
摘要： A 3D quantum dot optical path structure is provided, along with a method for selectively forming a 3D quantum dot optical path. The method comprises: forming a single crystal Si substrate with a surface; forming a Si feature in the substrate, such as a via, trench, or pillar; forming dots from a Ge or SiGe material overlying the Si feature; and, forming an optical path that includes the dots. In some aspects of the method, the Si feature has defect sites. For example, the Si feature may be formed with a miscut angle. As a result of the miscut angle, steps are formed in the Si feature plane. Then, the dots are formed in the Si feature steps. The miscut angle is in the range between 0.1 and 5 degrees, and the spacing between steps is in the range between 1 and 250 nanometers (nm).
摘要翻译：提供了3D量子点光路结构以及用于选择性地形成3D量子点光路的方法。该方法包括：用表面形成单晶Si衬底; 在衬底中形成Si特征，例如通孔，沟槽或柱; 从覆盖Si特征的Ge或SiGe材料形成点; 并且形成包括点的光路。在该方法的某些方面，Si特征具有缺陷位点。例如，Si特征可以形成为错误角度。作为误差角的结果，在Si特征平面中形成台阶。然后，在Si特征步骤中形成点。误差角在0.1和5度之间的范围内，并且步骤之间的间隔在1和250纳米（nm）之间的范围内。

76. 发明申请

US20050153524A1 Strained silicon on insulator from film transfer and relaxation by hydrogen implantation 有权
标题翻译：绝缘体上的应变硅通过氢注入从膜转移和弛豫
公开(公告)号：US20050153524A1
公开(公告)日：2005-07-14
申请号：US10755615
申请日：2004-01-12
申请人： Jer-shen Maa , Jong-Jan Lee , Douglas Tweet , David Evans , Allen Burmaster , Sheng Hsu
发明人： Jer-shen Maa , Jong-Jan Lee , Douglas Tweet , David Evans , Allen Burmaster , Sheng Hsu
IPC分类号： H01L21/762 , H01L21/02 , H01L21/30 , H01L21/46 , H01L27/12
CPC分类号： H01L21/76254
摘要： Transistors fabricated on SSOI (Strained Silicon On Insulator) substrate, which comprises a strained silicon layer disposed directly on an insulator layer, have enhanced device performance due to the strain-induced band modification of the strained silicon device channel and the limited silicon volume because of the insulator layer. The present invention discloses a SSOI substrate fabrication process comprising various novel approaches. One is the use of a thin relaxed SiGe layer as the strain-induced seed layer to facilitate integration and reduce processing cost. Another is the formation of split implant microcracks deep in the silicon substrate to reduce the number of threading dislocations reaching the strained silicon layer. And lastly is the two step annealing/thinning process for the strained silicon/SiGe multilayer film transfer without blister or flaking formation.
摘要翻译：包含直接设置在绝缘体层上的应变硅层的SSOI（应变绝缘体硅）基板上制造的晶体管由于应变诱导的应变硅器件通道的带隙修改而增加了器件性能，并且由于绝缘体层。本发明公开了一种包括各种新方法的SSOI衬底制造工艺。一个是使用薄的松弛SiGe层作为应变诱导的种子层，以促进整合并降低加工成本。另一个是在硅衬底深部形成分裂的植入物微裂纹，以减少到达应变硅层的穿透位错的数量。最后是对应变硅/ SiGe多层膜转移的两步退火/变薄处理，没有起泡或剥落形成。

77. 发明授权

US08106473B2 Germanium film optical device 有权
标题翻译：锗膜光学器件
公开(公告)号：US08106473B2
公开(公告)日：2012-01-31
申请号：US13050689
申请日：2011-03-17
申请人： Jong-Jan Lee , Steven R. Droes , John W. Hartzell , Jer-Shen Maa
发明人： Jong-Jan Lee , Steven R. Droes , John W. Hartzell , Jer-Shen Maa
IPC分类号： H01L27/146 , H01L31/068
CPC分类号： H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14689 , H01L27/1469 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/351 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
摘要翻译：玻璃基板上的锗（Ge）光电二极管阵列具有相应的制造方法。提供未掺杂或轻掺杂第一掺杂剂的Ge衬底。第一掺杂剂可以是n型或p型掺杂剂。 Ge衬底的第一表面适度地掺杂有第一掺杂剂并且结合到玻璃衬底顶表面。然后，Ge衬底第二表面的第一区域被第一掺杂剂重掺杂。 Ge衬底第二表面的第二区域重掺杂有与第一掺杂剂相反的电子亲和力的第二掺杂剂，形成pn结。在Ge衬底第二表面上形成层间电介质（ILD）层，并且在覆盖Ge衬底第二表面的第一和第二区域的ILD层中蚀刻接触孔。接触孔填充有金属，并且金属垫形成在接触孔上。

78. 发明申请

US20110163404A1 Germanium Film Optical Device 有权
标题翻译：锗膜光学器件
公开(公告)号：US20110163404A1
公开(公告)日：2011-07-07
申请号：US13050689
申请日：2011-03-17
申请人： Jong-Jan Lee , Steven R. Droes , John W. Hartzell , Jer-Shen Maa
发明人： Jong-Jan Lee , Steven R. Droes , John W. Hartzell , Jer-Shen Maa
IPC分类号： H01L27/146 , H01L31/068
CPC分类号： H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14689 , H01L27/1469 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/351 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
摘要翻译：玻璃基板上的锗（Ge）光电二极管阵列具有相应的制造方法。提供未掺杂或轻掺杂第一掺杂剂的Ge衬底。第一掺杂剂可以是n型或p型掺杂剂。 Ge衬底的第一表面适度地掺杂有第一掺杂剂并且结合到玻璃衬底顶表面。然后，Ge衬底第二表面的第一区域被第一掺杂剂重掺杂。 Ge衬底第二表面的第二区域重掺杂有与第一掺杂剂相反的电子亲和力的第二掺杂剂，形成pn结。在Ge衬底第二表面上形成层间电介质（ILD）层，并且在覆盖Ge衬底第二表面的第一和第二区域的ILD层中蚀刻接触孔。接触孔填充有金属，并且金属垫形成在接触孔上。

79. 发明申请

US20070218622A1 Method of fabricating local interconnects on a silicon-germanium 3D CMOS 有权
标题翻译：在硅 - 锗3D CMOS上制造局部互连的方法
公开(公告)号：US20070218622A1
公开(公告)日：2007-09-20
申请号：US11376542
申请日：2006-03-15
申请人： Jong-Jan Lee , Paul Schuele , Sheng Hsu , Jer-Shen Maa
发明人： Jong-Jan Lee , Paul Schuele , Sheng Hsu , Jer-Shen Maa
IPC分类号： H01L21/8238
CPC分类号： H01L21/823871 , H01L21/02532 , H01L21/02667 , H01L21/28525 , H01L21/76895 , H01L27/11 , H01L27/1108
摘要： A method of fabricating local interconnect on a silicon-germanium 3D CMOS includes fabricating an active silicon CMOS device on a silicon substrate. An insulator layer is deposited on the silicon substrate and a seed window is opened through the insulator layer to the silicon substrate and to a silicon CMOS device gate. A germanium thin film is deposited on the insulator layer and into windows, forming a contact between the germanium thin film and the silicon device. The germanium thin film is encapsulated in a dielectric material. The wafer is heated at a temperature sufficient to flow the germanium, while maintaining the other layers in a solid condition. The wafer is cooled to solidify the germanium as single crystal germanium and as polycrystalline germanium, which provides local interconnects. Germanium CMOS devices may be fabricated on the single crystal germanium thin film.
摘要翻译：在硅 - 锗3D CMOS上制造局部互连的方法包括在硅衬底上制造有源硅CMOS器件。绝缘体层沉积在硅衬底上，并且晶种窗通过绝缘体层向硅衬底和硅CMOS器件栅极打开。在绝缘体层和窗口上沉积锗薄膜，形成锗薄膜和硅器件之间的接触。锗薄膜被封装在电介质材料中。在足以使锗流动的温度下加热晶片，同时将其它层保持在固体状态。将晶片冷却以将锗固化为单晶锗和作为多晶锗，其提供局部互连。可以在单晶锗薄膜上制造锗CMOS器件。

80. 发明申请

US20070218578A1 Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer 失效
标题翻译：具有在SOI晶片上制造的堆叠光电二极管的实时CMOS成像器
公开(公告)号：US20070218578A1
公开(公告)日：2007-09-20
申请号：US11384110
申请日：2006-03-17
申请人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
IPC分类号： H01L21/00
CPC分类号： H01L27/14647
摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

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