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71. 外观设计

USD529206S1 Front combination lamp for an automobile 有权
公开(公告)号：USD529206S1
公开(公告)日：2006-09-26
申请号：US29234336
申请日：2005-07-15
申请人： Takahiro Minami , Tetsuya Nakagawa
设计人： Takahiro Minami , Tetsuya Nakagawa

72. 发明授权

US5745050A Obstacle detection apparatus for vehicles 失效
标题翻译：车辆障碍物检测装置
公开(公告)号：US5745050A
公开(公告)日：1998-04-28
申请号：US429189
申请日：1995-04-26
申请人： Tetsuya Nakagawa
发明人： Tetsuya Nakagawa
IPC分类号： G01C3/06 , B60R21/00 , B60R21/34 , G01S17/93 , G08G1/16
CPC分类号： G08G1/16
摘要： An obstacle detecting apparatus including a light projecting assembly for projecting the laser light generated in a laser light emitting element through a light emitting path, a light introducing assembly for introducing the laser light reflected by an obstacle into a light receiving element through a light receiving path, and a driving motor for driving the light emitting assembly and at least a portion of the light introducing assembly. The light path in the light projecting assembly is different from the light introducing path, and a distance to the obstacle is obtained based on a propagating delay time from emitting the laser light by the laser light emitting element until receiving the laser light by the laser light receiving element. Also included is a direction detecting device for detecting a direction in which the laser light is projected, a light emission level detecting device for detecting a strength of the laser light, a stain detecting device for detecting stains on the housing, and a cleansing device for sweeping the surface of the housing.
摘要翻译：一种障碍物检测装置，包括：投光组件，用于通过发光路径投射在激光发光元件中产生的激光;光导入组件，用于通过光接收路径将由障碍物反射的激光引入光接收元件; 以及用于驱动发光组件和光导入组件的至少一部分的驱动电机。光投射组件中的光路不同于光引入路径，并且基于由激光发射元件发射激光的传播延迟时间直到通过激光接收激光而获得到障碍物的距离接收元件。还包括用于检测激光的投射方向的方向检测装置，用于检测激光强度的发光水平检测装置，用于检测壳体上的污渍的污渍检测装置，以及用于清扫外壳的表面。

73. 发明授权

US5535410A Parallel processor having decoder for selecting switch from the group of switches and concurrently inputting MIMD instructions while performing SIMD operation 失效
标题翻译：并行处理器具有用于从开关组中选择开关并在执行SIMD操作的同时输入MIMD指令的解码器
公开(公告)号：US5535410A
公开(公告)日：1996-07-09
申请号：US335680
申请日：1994-11-08
申请人： Takao Watanabe , Tetsuya Nakagawa , Yoshinobu Nakagome
发明人： Takao Watanabe , Tetsuya Nakagawa , Yoshinobu Nakagome
IPC分类号： G06F15/16 , G06F9/318 , G06F9/38 , G06F15/80 , G06F13/00
CPC分类号： G06F9/3889 , G06F15/8023 , G06F9/30189 , G06F9/3885 , G06F9/3887 , G06T15/005
摘要： A parallel processor utilizing a memory cell array for rapidly performing parallel processing by switching between SIMD and MIMD operations depending on the type of problems to be solved. Where SIMD and MIMD operations are mixed in an application, the time loss in the switching therebetween is eliminated so as to enhance the speed of the processing. The parallel processor comprises a two-dimensional memory array for storing data to be operated on; a transfer network for transferring to a group of processing elements the data read in parallel from word lines connected to memory cells in the two-dimensional memory array, the group of processing elements performing parallel processing on the data transferred thereto; signal lines for transmitting an instruction in a SIMD operation mode; an instruction buffer for storing and forwarding parallelly instructions in a MIMD operation mode; and a group of switches for switching between the SIMD and the MIMD operation mode.
摘要翻译：利用存储单元阵列的并行处理器，用于通过根据要解决的问题的类型在SIMD和MIMD操作之间切换来快速执行并行处理。在应用中混合SIMD和MIMD操作的情况下，消除其间的切换中的时间损失，从而提高处理速度。并行处理器包括用于存储要被操作的数据的二维存储器阵列; 传送网络，用于将连接到二维存储器阵列中的存储单元的字线并行读取的数据传送到一组处理元件，该组处理元件对传送到其上的数据执行并行处理; 用于在SIMD操作模式下发送指令的信号线; 用于以MIMD操作模式并行存储和转发指令的指令缓冲器; 以及用于在SIMD和MIMD操作模式之间切换的一组开关。

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