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71. 发明授权

US4239949A Self-extinguishing type circuit interrupter 失效
标题翻译：自熄型电路断路器
公开(公告)号：US4239949A
公开(公告)日：1980-12-16
申请号：US889548
申请日：1978-03-23
申请人： Masami Kii , Yoshihiro Ueda , Koji Ibuki
发明人： Masami Kii , Yoshihiro Ueda , Koji Ibuki
IPC分类号： H01H33/98 , H01H33/74
CPC分类号： H01H33/98
摘要： A self-extinguishing circuit interrupter wherein a pair of separable contacts is disposed within an arc extinguishing gas. Energy of an electric arc established between the separated contacts is utilized to increase the pressure of the arc extinguishing gas, and the high pressure gas thus generated is introduced into a pressure chamber to be stored therein. When the arc current approaches zero, the high pressure gas within the pressure chamber is puffed to the arc to extinguish it. A plurality of pressure chambers are axially disposed, i.e., in the direction in which the movable contact moves, thereby improving the arc extinguishing capability of the circuit interrupter.
摘要翻译：一种自熄电路断路器，其中一对可分离触点设置在灭弧气体内。利用在分离的触点之间建立的电弧的能量来增加灭弧气体的压力，并将由此产生的高压气体引入压力室以储存在其中。当电弧电流接近零时，压力室内的高压气体膨胀到电弧以使其熄灭。多个压力室被轴向设置，即在可动触头移动的方向上，从而提高断路器的灭弧能力。

72. 发明授权

US09404814B2 Engine exhaust heat temperature detection device 有权
标题翻译：发动机排热温度检测装置
公开(公告)号：US09404814B2
公开(公告)日：2016-08-02
申请号：US13421047
申请日：2012-03-15
申请人： Hiroyuki Tada , Masato Asahara , Yoshihiro Ueda , Hideki Aoki , Akira Minoura
发明人： Hiroyuki Tada , Masato Asahara , Yoshihiro Ueda , Hideki Aoki , Akira Minoura
IPC分类号： G01K1/08 , G01K13/02
CPC分类号： G01K13/02 , G01K2013/024 , G01K2205/04
摘要： An exhaust gas temperature detection sensor is arranged at a predetermined position outside a muffler, or at a predetermined position outside an exhaust pipe constituting an exhaust gas flow passage on a more downstream side than the muffler in an exhaust direction. The sensor detects that an atmosphere temperature at the predetermined position outside the muffler has reached a predetermined temperature based on an increase in a temperature inside the muffler, or detects that an atmosphere temperature at the predetermined position outside the exhaust pipe has reached a predetermined temperature based on an increase in a temperature of an exhaust gas inside the exhaust pipe.
摘要翻译：排气温度检测传感器布置在消声器外部的预定位置处，或者在构成排气流路的排气管外侧的预定位置处布置在排气方向上比消声器更下游侧的排气管温度检测传感器。该传感器检测到消声器外的预定位置处的气氛温度已基于消音器内部的温度升高而达到预定温度，或者检测到排气管外部的预定位置处的气氛温度已达到预定温度在排气管内的排气温度上升。

73. 发明授权

US09140571B2 Display control apparatus 有权
标题翻译：显示控制装置
公开(公告)号：US09140571B2
公开(公告)日：2015-09-22
申请号：US14235187
申请日：2012-08-09
申请人： Hitoshi Sugiyama , Shigeo Kato , Yoshihiro Ueda
发明人： Hitoshi Sugiyama , Shigeo Kato , Yoshihiro Ueda
IPC分类号： G06F7/00 , G01C21/36 , H04N21/472 , B60K35/00 , G06F5/00
CPC分类号： G01C21/3602 , B60K35/00 , B60K2350/1076 , B60K2350/1096 , B60K2350/352 , G01C21/3626 , G06F3/0481 , G06F3/1423 , G06F5/00 , G09G5/14 , G09G2340/0464 , G09G2340/14 , H04N21/472
摘要： A display control apparatus that assigns display target contents to a plurality of areas configured as display areas in a screen of a display apparatus mounted on a vehicle is provided. The display control apparatus comprises a content manager for managing the contents in association with content information indicating attributes of the contents, an area manager for managing the areas in association with area information indicating attributes of the areas, and a content assignment controller for generating a content list listing the contents and determining content-area combinations based on the content information and the area information in an order of the content list.
摘要翻译：提供了一种显示控制装置，其将显示目标内容分配给安装在车辆上的显示装置的屏幕中的被配置为显示区域的多个区域。显示控制装置包括：内容管理器，用于与指示内容的属性的内容信息相关联地管理内容;区域管理器，用于与指示区域的属性的区域信息相关联地管理区域;以及内容分配控制器，用于生成内容列出内容并基于内容信息和区域信息以内容列表的顺序确定内容区域组合。

74. 发明授权

US09058884B2 Driving method of semiconductor storage device and semiconductor storage device 有权
标题翻译：半导体存储器件和半导体存储器件的驱动方法
公开(公告)号：US09058884B2
公开(公告)日：2015-06-16
申请号：US13601492
申请日：2012-08-31
申请人： Yoshihiro Ueda
发明人： Yoshihiro Ueda
IPC分类号： G11C11/00 , G11C11/14 , G11C11/15 , G11C11/16
CPC分类号： G11C11/16 , G11C11/1673 , G11C11/1693
摘要： A memory includes storage elements, a signal holding part and a sense amplifier. A driving-method includes a read operation for reading target data stored in a first storage element of the storage elements. In the read operation, the signal holding part holds a first voltage according to the target data. First sample data of a first logic is written to the first storage element. The signal holding part holds a second voltage according to the first sample data. Second sample data of a second logic opposite to the first logic is written to the first storage element. The signal holding part holds a third voltage according to the second sample data. The sense amplifier compares a read signal based on the first voltage with a reference signal generated based on the second and third voltages to detect a logic of the target data stored in the first storage element.
摘要翻译：存储器包括存储元件，信号保持部分和读出放大器。驱动方法包括用于读取存储在存储元件的第一存储元件中的目标数据的读取操作。在读取操作中，信号保持部分根据目标数据保持第一电压。将第一逻辑的第一样本数据写入第一存储元件。信号保持部根据第一采样数据保持第二电压。与第一逻辑相反的第二逻辑的第二采样数据被写入第一存储元件。信号保持部根据第二采样数据保持第三电压。感测放大器将基于第一电压的读取信号与基于第二和第三电压产生的参考信号进行比较，以检测存储在第一存储元件中的目标数据的逻辑。

75. 发明授权

US08873273B2 Semiconductor storage device and test method thereof 有权
标题翻译：半导体存储装置及其测试方法
公开(公告)号：US08873273B2
公开(公告)日：2014-10-28
申请号：US13409801
申请日：2012-03-01
申请人： Yoshihiro Ueda
发明人： Yoshihiro Ueda
IPC分类号： G11C11/00
CPC分类号： G11C29/028 , G11C11/1653 , G11C11/1673 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C29/026 , G11C2013/0054
摘要： A memory includes memory cells each storing data according to a change in a resistance state, and reference cells referred to in order to detect data stored in the memory cells. Sense amplifiers compare reference data in the reference cells with data in the memory cells to detect the data in the memory cells. A counter counts a number NH of the memory cells having a resistance higher than a resistance of each reference cell or a number NL of the memory cells having a resistance lower than the resistance of each reference cell based on a result of detecting first logical data stored in the memory cells using each reference cell storing the first logical data. A determining part determines one of the reference cells as an optimum reference cell used in an actual data reading operation based on the number NH or NL for the reference cells.
摘要翻译：存储器包括各自根据电阻状态的变化存储数据的存储器单元，以及参考单元，以便检测存储在存储器单元中的数据。检测放大器将参考单元中的参考数据与存储单元中的数据进行比较，以检测存储单元中的数据。基于检测到的第一逻辑数据的结果，计数器对具有比每个参考单元的电阻高的存储单元的数量NH或具有低于每个参考单元的电阻的电阻的存储单元的数量NL计数在使用存储第一逻辑数据的每个参考单元的存储单元中。确定部分基于参考单元的数量NH或NL，将参考单元之一确定为在实际数据读取操作中使用的最佳参考单元。

76. 发明授权

US08514614B2 Magnetic memory 有权
标题翻译：磁记忆
公开(公告)号：US08514614B2
公开(公告)日：2013-08-20
申请号：US12885175
申请日：2010-09-17
申请人： Takafumi Shimizu , Kenji Tsuchida , Yoshihiro Ueda
发明人： Takafumi Shimizu , Kenji Tsuchida , Yoshihiro Ueda
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/1673
摘要： According to one embodiment, a magnetic memory includes a magnetoresistive element includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is variable and a nonmagnetic layer disposed between the fixed layer and the recording layer. A direction of a read current is set to a first direction in a case where an expression of MR ratio ≧|Ic+/Ic−|−1 is satisfied if a critical current of the first direction used to write the magnetoresistive element to the parallel state is set to Ic− and a critical current of a second direction used to write the magnetoresistive element to the anti-parallel state is set to Ic+.
摘要翻译：根据一个实施例，磁存储器包括磁阻元件，其包括其磁化方向固定的固定层，其磁化方向可变的记录层和设置在固定层和记录层之间的非磁性层。如果用于将磁阻元件写入平行的第一方向的临界电流满足MR ratio> = | Ic + / Ic- | -1的表达式的情况下，将读取电流的方向设置为第一方向状态被设定为Ic-，将用于将磁阻元件写入反并联状态的第二方向的临界电流设定为Ic +。

77. 发明授权

US08342789B2 Loader work machine 有权
标题翻译：装载机工作机
公开(公告)号：US08342789B2
公开(公告)日：2013-01-01
申请号：US12531789
申请日：2009-03-25
申请人： Toyoaki Yasuda , Masanori Fujino , Toshihiko Takemura , Yasuo Nakata , Yoshitaka Matsubara , Yoshihiro Ueda , Yuuki Takano , Yusuke Kawai , Ryohei Sumiyoshi , Hiroyuki Anami , Naoya Muramoto , Kenji Mitsui , Youhei Kawano , Takeshi Ikumura
发明人： Toyoaki Yasuda , Masanori Fujino , Toshihiko Takemura , Yasuo Nakata , Yoshitaka Matsubara , Yoshihiro Ueda , Yuuki Takano , Yusuke Kawai , Ryohei Sumiyoshi , Hiroyuki Anami , Naoya Muramoto , Kenji Mitsui , Youhei Kawano , Takeshi Ikumura
IPC分类号： E02F3/00
CPC分类号： E02F3/3405 , E02F3/3414 , E02F3/432 , E02F9/0816 , E02F9/2275 , Y10S414/131
摘要： A hood for a loader work machine is provided at the rear end of the frame body and downwardly of the transverse connecting member between the pair of right/left support frame members. The transverse connecting member includes a front wall plate and an upper wall plate projecting rearward from an upper end of the front wall plate. The upper wall plate of the transverse connecting member is disposed more downwardly than the vertical center of the cabin. A rear portion of the upper wall plate is inclined downwardly rearward. A hood upper wall is provided for covering a rear upper side between the pair of right/left support frame members. A front end portion of the hood upper wall is connected to the rear portion of the upper wall plate of the transverse connecting member. The hood upper wall is inclined downwardly rearward in correspondence with the rear portion of the upper wall plate.
摘要翻译：用于装载机作业机器的机罩设置在框体的后端，横向连接构件的下方设置在一对右/左支撑框架构件之间。横向连接构件包括从前壁板的上端向后突出的前壁板和上壁板。横向连接构件的上壁板比座舱的垂直中心更向下设置。上壁板的后部向后倾斜。设置有罩上壁，用于覆盖所述一对右/左支撑框架构件之间的后上侧。发动机罩上壁的前端部分连接到横向连接件的上壁板的后部。罩上壁相对于上壁板的后部向后倾斜。

78. 发明申请

US20120230090A1 SEMICONDUCTOR MEMORY 失效
标题翻译：半导体存储器
公开(公告)号：US20120230090A1
公开(公告)日：2012-09-13
申请号：US13415662
申请日：2012-03-08
申请人： Masahiro Takahashi , Yoshihiro Ueda
发明人： Masahiro Takahashi , Yoshihiro Ueda
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , G11C11/1659 , G11C11/1675
摘要： A semiconductor memory has a first switch circuit and a second switch circuit. The semiconductor memory has a row decoder that controls a voltage of a word line. The semiconductor memory has a first writing circuit including a first signal terminal connected to one end of the first switch circuit to input and output a writing current. The semiconductor memory has a second writing circuit including a second signal terminal connected to a one end of the second switch circuit to input and output the writing current. The semiconductor memory has a select transistor including a control terminal connected to the word line. The semiconductor memory has a resistance change element that is connected in series with the select transistor between the first bit line and the second bit line and varies in resistance value depending on an applied current.
摘要翻译：半导体存储器具有第一开关电路和第二开关电路。半导体存储器具有控制字线电压的行解码器。半导体存储器具有第一写入电路，该第一写入电路包括连接到第一开关电路的一端的第一信号端子，以输入和输出写入电流。半导体存储器具有第二写入电路，该第二写入电路包括连接到第二开关电路的一端的第二信号端子，以输入和输出写入电流。半导体存储器具有包括连接到字线的控制端的选择晶体管。半导体存储器具有与第一位线和第二位线之间的选择晶体管串联连接的电阻变化元件，并且根据所施加的电流而改变电阻值。

79. 发明申请

US20120224412A1 SEMICONDUCTOR STORAGE DEVICE AND TEST METHOD THEREOF 有权
标题翻译：半导体存储器件及其测试方法
公开(公告)号：US20120224412A1
公开(公告)日：2012-09-06
申请号：US13409801
申请日：2012-03-01
申请人： Yoshihiro Ueda
发明人： Yoshihiro Ueda
IPC分类号： G11C11/00
CPC分类号： G11C29/028 , G11C11/1653 , G11C11/1673 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C29/026 , G11C2013/0054
摘要： A memory includes memory cells each storing data according to a change in a resistance state, and reference cells referred to in order to detect data stored in the memory cells. Sense amplifiers compare reference data in the reference cells with data in the memory cells to detect the data in the memory cells. A counter counts a number NH of the memory cells having a resistance higher than a resistance of each reference cell or a number NL of the memory cells having a resistance lower than the resistance of each reference cell based on a result of detecting first logical data stored in the memory cells using each reference cell storing the first logical data. A determining part determines one of the reference cells as an optimum reference cell used in an actual data reading operation based on the number NH or NL for the reference cells.
摘要翻译：存储器包括各自根据电阻状态的变化存储数据的存储器单元，以及参考单元，以便检测存储在存储器单元中的数据。检测放大器将参考单元中的参考数据与存储单元中的数据进行比较，以检测存储单元中的数据。基于检测到的第一逻辑数据的结果，计数器对具有比每个参考单元的电阻高的存储单元的数量NH或具有低于每个参考单元的电阻的电阻的存储单元的数量NL计数在使用存储第一逻辑数据的每个参考单元的存储单元中。确定部分基于参考单元的数量NH或NL，将参考单元之一确定为在实际数据读取操作中使用的最佳参考单元。

80. 发明授权

US08223565B2 Resistance change memory with current control and voltage control during a write operation, and write method of the same 有权
标题翻译：电阻变化记忆与写入操作时的电流控制和电压控制，以及写入方式相同
公开(公告)号：US08223565B2
公开(公告)日：2012-07-17
申请号：US12183537
申请日：2008-07-31
申请人： Yoshihiro Ueda
发明人： Yoshihiro Ueda
IPC分类号： G11C7/22
CPC分类号： G11C13/0069 , G11C11/1659 , G11C11/1675 , G11C13/0004 , G11C13/0007 , G11C2013/0078 , G11C2013/009 , G11C2213/31 , G11C2213/32 , G11C2213/34 , G11C2213/72 , G11C2213/79
摘要： A resistance change memory includes a resistance change element having a high-resistance state and a low-resistance state in accordance with write information, and a write circuit configured to supply a write current that the write current flowing through the resistance change element is held constant before and after the resistance change element is changed from the high-resistance state to the low-resistance state, and apply a write voltage that the write voltage applied to the resistance change element is held constant before and after the resistance change element is changed from the low-resistance state to the high-resistance state.
摘要翻译：电阻变化存储器包括根据写入信息具有高电阻状态和低电阻状态的电阻变化元件，以及写入电路，被配置为提供写入电流，使得流过电阻变化元件的写入电流保持恒定在电阻变化元件从高电阻状态变为低电阻状态之前和之后，并施加施加到电阻变化元件上的写入电压在电阻变化元件变化之前和之后保持恒定的写入电压低电阻状态到高电阻状态。

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