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    • 73. 发明授权
    • Semiconductor memory device with trench surrounding each memory cell
    • 具有围绕每个存储单元的沟槽的半导体存储器件
    • US4672410A
    • 1987-06-09
    • US753283
    • 1985-07-09
    • Kenji MiuraShigeru NakajimaKazushige MinegishiTakashi MorieToshifumi Somatani
    • Kenji MiuraShigeru NakajimaKazushige MinegishiTakashi MorieToshifumi Somatani
    • H01L21/20H01L21/225H01L21/8242H01L27/10H01L27/108H01L29/78H01L29/94H01L27/02H01L29/04H01L29/06
    • H01L27/10864H01L21/2257H01L27/10841H01L29/7827H01L29/945
    • A semiconductor device has memory cells respectively located at intersections of bit and word lines arranged in a matrix form, each of the memory cells being constituted by a single insulated gate transistor and a single capacitor. One memory cell is formed in an element formation region defined by each of trenches arranged in a matrix form. The capacitor has an insulating film formed along part of a side wall surface of a trench formed in at least a direction of thickness of a semiconductor substrate and a conductive layer formed along the insulating film. The transistor has a gate insulating film adjacent to the capacitor and formed along a remaining portion of the side wall surface of the trench, a gate electrode formed along the gate insulating film, and a diffusion region formed in a major surface of the semiconductor substrate which is adjacent to the gate insulating film. The semicondcutor memory device further has an isolation region between two adjacent ones of the memory cells along two adjacent ones of the bit or word lines. A method of manufacturing the semiconductor is also proposed.
    • 半导体器件具有分别位于以矩阵形式布置的位和字线的交点处的存储器单元,每个存储器单元由单个绝缘栅晶体管和单个电容器构成。 一个存储单元形成在由以矩阵形式布置的每个沟槽限定的元件形成区域中。 电容器具有沿至少沿着半导体衬底的厚度方向形成的沟槽的侧壁表面的一部分和沿绝缘膜形成的导电层形成的绝缘膜。 晶体管具有与电容器相邻的栅极绝缘膜,沿着沟槽的侧壁表面的剩余部分形成,沿着栅极绝缘膜形成的栅电极和形成在半导体衬底的主表面中的扩散区域 与栅极绝缘膜相邻。 半切割器存储器件还沿着位或字线中的两个相邻的存储器单元中的两个相邻存储单元之间具有隔离区。 还提出了制造半导体的方法。