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    • 71. 发明申请
    • A COMBINED T/R SWITCH WITH LNA AND A METHOD OF IMPROVING THE PERFORMANCE OF A RECEIVER
    • 具有LNA的组合式T / R开关和提高接收器性能的方法
    • WO2003050563A2
    • 2003-06-19
    • PCT/IB2002/004876
    • 2002-11-20
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.
    • VEILLETTE, Benoit, R.
    • G01S15/00
    • G01S7/52025H04B1/48
    • In accordance with the present invention, a receiver circuit and a method of controlling voltage pulses, thereby improving the performance of the receiver are provided. The receiver circuit includes a switch for blocking high voltages and for converting voltage signals to current signals. The switch includes first and second signal terminals and a control terminal. The switch exhibits an ON resistance when closed, wherein the ON resistance is controlled by an electric value at the control terminal. The receiver circuit also includes a control circuit coupled to the switch for controlling the ON resistance of the switch in closed mode. The first switch signal terminal is coupled to an output of a transducer and the second switch signal terminal is coupled to an input of a low-noise amplifier circuit. The switch is a transmit/receive switch which is open during a transmission time interval and closed during a reception time interval. The switch passes only low-voltage pulses to the low-noise amplifier circuit which requires an input resistance and a feedback resistance. The ON resistance of the switch is the input resistance of the low-noise amplifier circuit. The control circuit is a servo-loop circuit for generating an electric value at the control terminal of the switch when closed.
    • 根据本发明,提供了一种接收器电路和一种控制电压脉冲的方法,从而提高了接收器的性能。 接收器电路包括用于阻断高电压并将电压信号转换为电流信号的开关。 开关包括第一和第二信号端子和控制端子。 开关在闭合时呈现导通电阻,其中导通电阻由控制端子处的电气值控制。 接收器电路还包括耦合到开关的控制电路,用于在闭合模式下控制开关的导通电阻。 第一开关信号端子耦合到换能器的输出,并且第二开关信号端子耦合到低噪声放大器电路的输入。 该开关是一个发送/接收开关,它在发送时间间隔期间打开并在接收时间间隔期间关闭。 开关仅通过低压脉冲到需要输入电阻和反馈电阻的低噪声放大器电路。 开关的导通电阻是低噪声放大器电路的输入电阻。 控制电路是一个伺服回路电路,用于在关闭时在开关的控制端产生电气值。
    • 73. 发明申请
    • METHOD OF DECODING A VARIABLE-LENGTH CODEWORD SEQUENCE
    • 解码可变长度编码序列的方法
    • WO2003043202A1
    • 2003-05-22
    • PCT/IB2002/004782
    • 2002-11-13
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.LAMY, CatherineMEILHAC, Lisa
    • LAMY, CatherineMEILHAC, Lisa
    • H03M13/45
    • H03M7/40
    • The present invention relates to a method of source decoding of a variable-length codeword sequence, said decoding being based on an associated codeword table. It is characterized in that it comprises the steps of, a) creating a tree with tree-paths (T_PTH) and branches (B), b) decoding a received sequence (SQr), said step comprising the sub-steps of, 1) extending the best tree-paths (BT PTH) in the tree by computing first cumulative metrics (CM LPTH) of the succeeding branches (B), 2) selecting the codewords (CWDi) corresponding to the best tree-paths (BT_PTH), and saving corresponding data in paths (PTH), the corresponding data comprising second cumulative metrics (CM_STCK), 3) reordering the saved paths (PTH) in accordance with their second cumulative metrics (CM_STCK), 4) testing a priori conditions on top path (TOP_PTH), and if they are verified, outputting said top path, or otherwise returning to the extension sub-step.
    • 本发明涉及可变长度码字序列的源解码方法,所述解码基于相关联的码字表。 其特征在于它包括以下步骤:a)创建具有树路径(T_PTH)和分支(B)的树,b)对接收到的序列(SQr)进行解码,所述步骤包括以下子步骤:1) 通过计算后续分支(B)的第一累积度量(CM LPTH)来扩展树中的最佳树路径(BT PTH),2)选择对应于最佳树路径(BT_PTH)的码字(CWDi),以及 保存路径(PTH)中的对应数据,包括第二累积度量(CM_STCK)的对应数据,3)根据其第二累积度量(CM_STCK)对保存路径重新排序(PTH),4)测试顶层路径上的先验条件 TOP_PTH),并且如果它们被验证,则输出所述顶部路径,或者否则返回到扩展子步骤。
    • 74. 发明申请
    • POLYPHASE FILTER COMBINING VERTICAL PEAKING AND SCALING IN PIXEL-PROCESSING ARRANGEMENT
    • 聚合物过滤器在像素处理装置中组合垂直峰值和缩放
    • WO2003036943A1
    • 2003-05-01
    • PCT/IB2002/004223
    • 2002-10-14
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.
    • LIN, Chien-HsinYEH, Bryan, L-D.
    • H04N5/208
    • H04N7/0135H04N5/14H04N5/208
    • A vertical signal processing circuit including a buffer and a polyphase filter, and adapted to simultaneously process vertical peaking and vertical scaling on pixel data in a first operational mode. In a first operational vertical peaking and scaling mode, the embodiment includes receiving pixel data at a first rate, circulating the data in line buffers and filtering the circulated data through a polyphase filter configured with coefficients derived by convolving peaking filter coefficients with scaling polyphase filter coefficients, and presenting processed pixel data for storage at a second, different pixel rate. Using a control circuit, the pixel-data processing circuit can switch between operational modes by setting different coefficients for the polyphase filter circuit.
    • 一种垂直信号处理电路,包括缓冲器和多相滤波器,并且适于在第一操作模式中同时处理像素数据上的垂直峰值和垂直缩放。 在第一操作垂直峰化和缩放模式中,该实施例包括以第一速率接收像素数据,将数据循环在行缓冲器中并通过多相滤波器对循环数据进行滤波,该多相滤波器配置有通过卷积滤波器系数与缩放多相滤波器系数 并呈现处理后的像素数据以便以不同的第二像素速率进行存储。 使用控制电路,像素数据处理电路可以通过为多相滤波器电路设置不同的系数来在操作模式之间切换。
    • 76. 发明申请
    • SCALABLE HOME CONTROL PLATFORM AND ARCHITECTURE
    • 可扩展的家庭控制平台和架构
    • WO2003027870A1
    • 2003-04-03
    • PCT/IB2002/003686
    • 2002-09-04
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.
    • O'DONNEL, Ciaran
    • G06F13/40
    • G06F13/4063H04L12/2803
    • A home-control platform and architecture includes a plurality of serial buses that provide communications among processing devices that are connected to the home-control platform. A bus control unit is configured to allocate the buses among the devices that request communications services. The platform supports one or more control processors that provide an interface to legacy devices, user and network interfaces, browsers, and the like. The platform also accepts optional plug-in cards that perform as coprocessors for specific tasks, such as MPEG encoding and decoding, signal processing, video and audio CODECs, and so on. The software architecture employed to support this platform includes the use of a real-time microkernel Operating System (OS) at the control processors that interfaces with the task coprocessors, and interfaces with a standard OS, such as Vxworks, WinCE, or LINUX. The microkernel OS provides primitives for task memory and CPU space isolation, virus protection, and secure financial transaction services.
    • 家庭控制平台和架构包括提供连接到家庭控制平台的处理设备之间的通信的多个串行总线。 总线控制单元被配置为在请求通信服务的设备之间分配总线。 该平台支持提供与传统设备,用户和网络接口,浏览器等的接口的一个或多个控制处理器。 该平台还接受可选的插件卡,用作特定任务的协处理器,如MPEG编码和解码,信号处理,视频和音频编解码器等。 用于支持该平台的软件架构包括在与任务协处理器连接的控制处理器上使用实时微内核操作系统(OS),以及与诸如Vxworks,WinCE或LINUX之类的标准操作系统的接口。 微内核操作系统提供任务内存和CPU空间隔离,病毒保护和安全的金融交易服务的原语。
    • 77. 发明申请
    • METHOD AND DEVICE FOR SENDING A USER DATA INSERTED IN A CODED VIDEO SIGNAL
    • 用于发送在编码视频信号中插入的用户数据的方法和装置
    • WO2003019951A1
    • 2003-03-06
    • PCT/IB2002/003421
    • 2002-08-21
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.
    • LE MAGUET, Yann
    • H04N7/52
    • H04N19/467H04N21/234318H04N21/235H04N21/435H04N21/8126
    • The invention relates to a method and device for sending a user data from a video encoder to a video decoder, the user data being inserted in the coded video signal generated by said video encoder. The method is characterized in that it comprises at the encoder end :- an insertion step (202) of inserting a set of stuffing packets at a given position in said coded video signal, the number of stuffing packets in said set being determined via a look-up table from said user data (201),and at the decoder end :- an analysis step (204) of detecting and counting the number of stuffing packets at said given position in said coded video signal, said number of stuffing packets being used for deriving said user data via said look-up table (205).
    • 本发明涉及用于将用户数据从视频编码器发送到视频解码器的方法和装置,用户数据被插入由所述视频编码器产生的编码视频信号中。 该方法的特征在于它包括在编码器端: - 在所述编码视频信号中的给定位置处插入一组填充分组的插入步骤(202),所述组中的填充分组的数目通过外观 - 从所述用户数据(201)的表中,并且在解码器结束: - 分析步骤(204),其对所述编码视频信号中的所述给定位置处的填充数据包的数量进行检测和计数,所述填充数据包的数量被使用 用于经由所述查找表(205)导出所述用户数据。