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61. 发明申请

US20050156700A1 Integrated spiral inductor 有权
标题翻译：集成螺旋电感
公开(公告)号：US20050156700A1
公开(公告)日：2005-07-21
申请号：US11079717
申请日：2005-03-15
申请人： James Chang
发明人： James Chang
IPC分类号： H01F17/00 , H01L23/522 , H01L27/02 , H01L27/08 , H03B5/12 , H03B5/36 , H03D7/16 , H03D7/18 , H03G1/00 , H03H11/12 , H03J1/00 , H03J3/04 , H03J3/08 , H03J3/18 , H03L7/10 , H03L7/23 , H04B1/26
CPC分类号： H03L7/23 , H01F17/0006 , H01F17/0013 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/364 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H01L2924/00
摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
摘要翻译：描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。接收机前端提供可编程衰减和可编程增益低噪声放大器。频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。过滤器调谐和电感Q补偿温度在芯片上执行。滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.使用本地振荡器调谐滤波器以调整替代滤波器，以及在滤波器组件值期间频率缩放至正被调谐的滤波器的滤波器。结合滤波，频率规划提供了额外的镜像抑制。片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。差分晶体振荡器有利地用作频率参考。差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。还提供每个引脚上的分流器，以放电ESD积聚。分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。

62. 发明授权

US06879816B2 Integrated switchless programmable attenuator and low noise amplifier 失效
标题翻译：集成无开关可编程衰减器和低噪声放大器
公开(公告)号：US06879816B2
公开(公告)日：2005-04-12
申请号：US09438687
申请日：1999-11-12
申请人： Klaas Bult , Ramon A. Gomez
发明人： Klaas Bult , Ramon A. Gomez
IPC分类号： H01F17/00 , H01L23/522 , H01L27/02 , H01L27/08 , H03B5/12 , H03B5/36 , H03D3/18 , H03D7/16 , H03D7/18 , H03G1/00 , H03H11/12 , H03J1/00 , H03J3/04 , H03J3/08 , H03J3/18 , H03L7/10 , H03L7/23 , H04B7/00
CPC分类号： H03D3/18 , H01F17/0006 , H01F17/0013 , H01F27/34 , H01F27/40 , H01F27/42 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/0251 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/04 , H03B5/364 , H03D7/161 , H03D7/18 , H03F1/26 , H03F1/3211 , H03F3/195 , H03F3/45183 , H03F3/45188 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/372 , H03F2200/447 , H03F2200/63 , H03F2203/45264 , H03F2203/45286 , H03G1/0023 , H03G1/0029 , H03G3/3052 , H03H7/25 , H03H11/04 , H03H11/1291 , H03H11/53 , H03H11/54 , H03H19/004 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H03L7/183 , H03L7/23 , H03L2207/06 , H01L2924/00
摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
摘要翻译：描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。接收机前端提供可编程衰减和可编程增益低噪声放大器。频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。过滤器调谐和电感Q补偿温度在芯片上执行。滤波器采用多轨螺旋电感。使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。结合滤波，频率规划提供了额外的镜像抑制。片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。差分晶体振荡器有利地用作频率参考。差分信号传输有利地用于整个接收机。

63. 发明授权

US5940114A Image forming apparatus for correcting positional deviations of an image 失效
标题翻译：用于校正图像的位置偏差的图像形成装置
公开(公告)号：US5940114A
公开(公告)日：1999-08-17
申请号：US699705
申请日：1996-08-14
申请人： Tatsuhito Kataoka , Hiroyuki Takahashi , Motoaki Tahara
发明人： Tatsuhito Kataoka , Hiroyuki Takahashi , Motoaki Tahara
IPC分类号： B41J2/525 , G03G15/00 , G03G15/01 , G03G15/36 , G03G21/00 , G03G21/14 , H03J3/04 , H04N1/23 , H04N1/50 , B41J2/41 , H04N1/21
CPC分类号： H04N1/506 , G03G15/0194 , G03G2215/0119 , G03G2215/0161
摘要： An image forming method includes the steps of compressing input image data and coding the input image data in block units, each block unit corresponding to a plurality of pixels. The method also includes storing the image data coded in the coding step in block units in a storing means, forming an image according to image data from the storing step, and correcting positional deviations of the image formed in the image forming step in units smaller than the block units.
摘要翻译：图像形成方法包括以块为单位压缩输入图像数据并对输入图像数据进行编码的步骤，每个块单元对应于多个像素。该方法还包括将编码步骤中编码的图像数据以块为单位存储在存储装置中，根据来自存储步骤的图像数据形成图像，并校正图像形成步骤中形成的图像的位置偏差，单位小于块单位。

64. 发明授权

US5576753A Image forming apparatus which performs registration correction for plural image 失效
标题翻译：对多幅图像进行配准校正的图像形成装置
公开(公告)号：US5576753A
公开(公告)日：1996-11-19
申请号：US93693
申请日：1993-07-20
申请人： Tatsuhito Kataoka , Hiroyuki Takahashi , Motoaki Tahara
发明人： Tatsuhito Kataoka , Hiroyuki Takahashi , Motoaki Tahara
IPC分类号： B41J2/525 , G03G15/00 , G03G15/01 , G03G15/36 , G03G21/00 , G03G21/14 , H03J3/04 , H04N1/23 , H04N1/50 , H04N1/21
CPC分类号： H04N1/506 , G03G15/0194 , G03G2215/0119 , G03G2215/0161
摘要： An image forming apparatus includes a device for forming an image; a device for detecting information relating to the image formed by the image forming device and for repeating the detection; and a device for determining a timing at which the detection is repeated by the detecting device on the basis of the information detected by the detecting device. A device for generating a pattern signal corresponding to a predetermined pattern for detecting the amount of registration deviation by the detecting device is also provided. In addition, a transport belt for transporting the recording medium through the plurality of image forming units is provided so that the image forming units also form predetermined images on the transport belt. A device is also provided for mechanically and/or electrically correcting registration in the image forming units on the basis of the amount of registration deviation detected by the detecting device.
摘要翻译：图像形成装置包括用于形成图像的装置; 用于检测与由图像形成装置形成的图像有关的信息并重复检测的装置; 以及用于根据由检测装置检测到的信息确定检测装置重复检测的定时的装置。还提供了一种用于产生对应于预定图案的图案信号的装置，用于检测由检测装置检测的登记偏差量。此外，设置用于通过多个图像形成单元传送记录介质的传送带，使得图像形成单元也在传送带上形成预定图像。还提供了一种装置，用于基于由检测装置检测到的对准偏差量，在图像形成单元中机械地和/或电气地校正配准。

65. 发明授权

US5544101A Memory device having a latching multiplexer and a multiplexer block therefor 失效
标题翻译：具有锁存多路复用器及其多路复用器的存储器件
公开(公告)号：US5544101A
公开(公告)日：1996-08-06
申请号：US219609
申请日：1994-03-28
申请人： Theodore W. Houston
发明人： Theodore W. Houston
IPC分类号： G11C17/00 , G11C7/10 , G11C11/408 , G11C11/413 , G11C11/417 , G11C7/00 , H03J3/04
CPC分类号： G11C7/106 , G11C7/1051
摘要： A memory device (10) is provided which includes a memory array (12), a multiplexer block (14) and a control block (16). The memory array (12) is operable to provide a plurality of memory array outputs (28.sub.1 . . . 28.sub.n) responsive to a memory address (MEMORY ADDRESS). Each memory array output (28.sub.1 . . . 28.sub.n) represents a data state of a memory cell. The multiplexer block (14) comprises at least one latch block (30.sub.1 . . . 30.sub.i, 32.sub.1 . . . 32.sub.j, 34.sub.1, 34.sub.2, and 36) arranged in at least one stage. The multiplexer block is coupled to the plurality of memory array outputs (28.sub.1 . . . 28.sub.n). The multiplexer block (14) is operable to provide a multiplexer block output (38) representing a data state of a desired memory cell corresponding to the memory address (MEMORY ADDRESS) responsive to a plurality of multiplexer control signals (44.sub.1 . . . 44.sub.m). Each latch block is operable to receive a plurality of input signals, operable to retain a plurality of data states and operable to provide an output signal. A control block (16) is coupled to the memory array (12) and to the multiplexer block (14). The control block (16) is operable to determine from the memory address (MEMORY ADDRESS) whether the data state of the desired memory cell is retained by a latch block in the multiplexer block (14) and operable to generate the plurality of multiplexer control signals (44.sub.1 . . . 44.sub.m).
摘要翻译：提供了一种存储器件（10），其包括存储器阵列（12），多路复用器块（14）和控制块（16）。存储器阵列（12）可操作以响应于存储器地址（存储器地址）来提供多个存储器阵列输出（281 ... 28n）。每个存储器阵列输出（281 ... 28n）表示存储单元的数据状态。多路复用器块（14）包括布置在至少一个级中的至少一个锁存块（301 ... 30i，321 ... ... 32j，341,342和36）。多路复用器块耦合到多个存储器阵列输出（281 ... ... 28n）。多路复用器块（14）可操作以响应于多个多路复用器控制信号（441 ... 44m）提供表示对应于存储器地址（存储器地址）的期望存储单元的数据状态的多路复用器块输出（38）。每个锁存块可操作以接收多个输入信号，可操作以保持多个数据状态并且可操作以提供输出信号。控制块（16）耦合到存储器阵列（12）和多路复用器块（14）。控制块（16）可操作以根据存储器地址（存储器地址）确定期望存储器单元的数据状态是否由多路复用器块（14）中的锁存块保留，并且可操作以产生多个多路复用器控制信号（441.44m）。

66. 发明授权

US5511012A Apparatus comprising a circuit having an input/output response controllable by a control signal, and approximation method 失效
标题翻译：包括具有可由控制信号控制的输入/输出响应的电路的装置和近似方法
公开(公告)号：US5511012A
公开(公告)日：1996-04-23
申请号：US241839
申请日：1994-05-12
申请人： Yannick Deville
发明人： Yannick Deville
IPC分类号： H03M7/30 , H03J1/00 , H03J3/04 , H03J3/32 , H03J3/08
CPC分类号： H03J3/32 , H03J1/0033 , H03J2200/16
摘要： The relationship between the input and output of a signal transfer circuit, such as a tune circuit, a filter, a phase shifter, an amplifier, etc., is determined by the circuit response to the input signal. The value of the circuit response (R) is controlled by the value (V) of a control signal supplied thereto. According to the invention, the relationship between the latter values is approximated by a linear regression function based on a number of measured first pairs of response/control signal values and based on such regression function a transcoder determines control signal values for providing response values of the circuit in accordance with second pairs of response/control signal values.
摘要翻译：诸如调谐电路，滤波器，移相器，放大器等的信号传送电路的输入和输出之间的关系由对输入信号的电路响应确定。电路响应（R）的值由提供给其的控制信号的值（V）控制。根据本发明，通过基于测量的第一对响应/控制信号值的数量的线性回归函数来近似后一值的关系，并且基于这种回归函数，代码转换器确定用于提供响应/控制信号值的响应值的控制信号值电路根据第二对响应/控制信号值。

67. 发明授权

US5230091A Method and apparatus for tuning and compensating power levels in a radio telephone 失效
标题翻译：用于在无线电电话中调谐和补偿功率电平的方法和装置
公开(公告)号：US5230091A
公开(公告)日：1993-07-20
申请号：US583942
申请日：1990-09-17
申请人： Risto Vaisanen
发明人： Risto Vaisanen
IPC分类号： H03J3/04 , H04B17/00
CPC分类号： H03J3/04 , H04B17/13 , H04B17/21
摘要： In a method and apparatus according to the invention the tuning information determined by a measuring computer (20) is stored in the memory of the radio telephone (1). When the radio telephone is in operation the microprocessor (10) receives from the sensors (14) information e.g. about the temperature, and it selects from its memory tuning information, with which the transmitter (11) power is controlled via a D/A-converter (15). The tuning can be made automatically, without opening the casing of the radio telephone.

68. 发明授权

US4369417A Circuit for tunable radio-frequency circuits 失效
标题翻译：可调谐射频电路电路
公开(公告)号：US4369417A
公开(公告)日：1983-01-18
申请号：US205078
申请日：1980-11-10
申请人： Karl-Heinz Kupfer
发明人： Karl-Heinz Kupfer
IPC分类号： H03J7/08 , H03B5/04 , H03J3/04 , H03J3/18 , H03J5/24 , H03L1/02 , H03J7/24
CPC分类号： H03J3/185 , H03J3/04 , H03J5/244 , H03L1/02
摘要： A circuit is provided for frequency drift compensation of a tuning diode in tunable RF-circuits, and comprises a temperature-responsive voltage divider coupled between an independent voltage supply source and a reference potential, the tuning diode being coupled to a tap of the voltage divider. In this circuit the separate tuning voltage source is not loaded down and may thus produce a tuning voltage which is independent of the variation of the voltage from the temperature compensation portion of the circuit.
摘要翻译：提供了一种用于可调谐RF电路中的调谐二极管的频率漂移补偿的电路，并且包括耦合在独立电压源和参考电位之间的温度响应分压器，调谐二极管耦合到分压器。在该电路中，单独的调谐电压源未被加载，因此可产生与电路的温度补偿部分的电压变化无关的调谐电压。

69. 发明授权

US4319209A Fine tuning coil having steel wire forming coil portion 失效
标题翻译：具有钢丝成形线圈部分的微调线圈
公开(公告)号：US4319209A
公开(公告)日：1982-03-09
申请号：US156591
申请日：1980-06-05
申请人： Toshiwo Hara
发明人： Toshiwo Hara
IPC分类号： H03J3/10 , H01F21/06 , H03J3/04
CPC分类号： H01F21/06
摘要： A fine tuning coil for use in a local oscillator of a tuner, which is made of a high-tension steel wire or a so-called piano wire. The wire has a diameter which is smaller than that of the conventionally used copper wires, and is loosely wound.
摘要翻译：一种用于调谐器的本地振荡器的微调线圈，其由高压钢丝或所谓的钢琴线制成。线的直径小于常规使用的铜线的直径，并且松动缠绕。

70. 发明授权

US3727139A Voltage supply for voltage variable capacitor diode tuning 失效
标题翻译：电压可变电容二极管调谐的电压供应
公开(公告)号：US3727139A
公开(公告)日：1973-04-10
申请号：US3727139D
申请日：1971-08-10
申请人： PHILCO FORD CORP
发明人： GALLANT S , WARING J
IPC分类号： H03J3/04 , H03B5/04 , H03B5/08 , H03B5/12 , H03J3/18 , H04B1/26
CPC分类号： H03B5/04 , H03J3/185
摘要： An oscillator is amplitude stabilized by means of a high gain feedback loop and is used to apply an a-c signal to a variableinductor voltage divider. The divider output, which has an amplitude proportional to the magnitude of inductance, is rectified and filtered to produce a d-c voltage that is used to tune the voltage variable capacitor elements of a radio receiver tuner. Thus voltage variable capacitor tuning is accomplished by means of a variable inductor transducer.
摘要翻译：振荡器通过高增益反馈回路进行幅度稳定，并用于向可变电感分压器施加a-c信号。具有与电感幅度成比例的幅度的分频器输出被整流和滤波以产生用于调谐无线电接收机调谐器的电压可变电容器元件的d-c电压。因此，电压可变电容调谐通过可变电感传感器实现。

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