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61. 发明授权

US10840890B2 Discrete time IIR filter with high stop band rejection 有权
公开(公告)号：US10840890B2
公开(公告)日：2020-11-17
申请号：US16238604
申请日：2019-01-03
申请人： University College Dublin
发明人： Amirhossein Ansari Bozorg , Robert Bogdan Staszewski
IPC分类号： H03H17/04 , H03H19/00
CPC分类号： H03H17/0416 , H03H19/00 , H03H2210/025 , H03H2240/00
摘要： A novel and useful high-order discrete-time charge rotating (CR) infinite impulse response (IIR) low pass filter is presented. The filter utilizes history capacitor arrays incorporating banks of capacitors. A linear interpolation technique is used in the IIR filter with second order antialiasing filtering, whose transfer function is sinc(x)2 per stage. It also uses a gm cell, rather than operational amplifiers, and is thus compatible with digital nanoscale technology. A 7th-order charge-sampling discrete time filter is disclosed. The order of the filter is easily extendable to higher orders. The charge rotating filter is process scalable with Moore's law and amenable to digital nanoscale CMOS technology. Bandwidth of the filter is precise and robust to PVT variation. The filter exhibits very low power consumption per filter pole, low input-referred noise, wide tuning range, excellent linearity and low area per minimum bandwidth and filter pole.

62. 发明授权

US09749707B2 Method and system for power management in a frequency division multiplexed network 有权
公开(公告)号：US09749707B2
公开(公告)日：2017-08-29
申请号：US15200109
申请日：2016-07-01
申请人： MaxLinear, Inc.
发明人： Curtis Ling , Timothy Gallagher , Sridhar Ramesh
IPC分类号： H04N7/16 , H04N21/6587 , H04N21/61 , H03M1/12 , H03H17/04 , H03M3/00 , H04J1/00 , H04N7/10 , H04H20/42 , H04H20/77 , H04H40/27 , H04N21/222 , H04N21/6373
CPC分类号： H04N21/6587 , H03H17/0416 , H03M1/12 , H03M1/126 , H03M3/496 , H04H20/426 , H04H20/77 , H04H40/27 , H04J1/00 , H04N7/10 , H04N7/106 , H04N21/2221 , H04N21/6118 , H04N21/6373
摘要： A network device may receive a signal from a headend, wherein a bandwidth of the received signal spans from a low frequency to a high frequency and encompasses a plurality of sub-bands. The network device may determine, based on communication with the headend, whether one of more of the sub-bands residing above a threshold frequency are available for carrying downstream data from the headend to the circuitry. The network device may digitize the signal using an ADC operating at a sampling frequency. The sampling frequency may be configured based on a result of the determining. When the sub-band(s) are available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively high frequency. When the sub-band(s) are not available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively low frequency.

63. 发明授权

US09264065B2 Low complexity non-integer adaptive sample rate conversion 有权
标题翻译：低复杂度非整数自适应采样率转换
公开(公告)号：US09264065B2
公开(公告)日：2016-02-16
申请号：US14336132
申请日：2014-07-21
申请人： Raytheon Company
发明人： Gregary B. Prince
IPC分类号： H03M7/00 , H03H17/04 , H03H17/02 , H03M5/02
CPC分类号： H03M7/00 , H03H17/0294 , H03H17/0416 , H03M5/02
摘要： Generally described herein are methods and systems for sample rate conversion of non-integer and integer factors. In one or more embodiments an apparatus can include a sample rate converter that can include an input configured to receive an input signal with a first frequency and an output configured to provide an output signal with a second frequency different from the first frequency. The sample rate converter can include a filter coefficient lookup table and a numerically controlled oscillator configured to provide filter coefficients from the filter coefficient lookup table at a rate that is a function of the first frequency and the second frequency. The sample rate converter can include a multiplier configured to produce an output that is the product of a filter coefficient of the filter coefficients from the numerically controlled oscillator and a sample of an input signal and an accumulator configured to sum an output of the multiplier and provide a result of the summation when the accumulator receives an indicator to dump the result.
摘要翻译：这里通常描述的是用于非整数和整数因子的采样率转换的方法和系统。在一个或多个实施例中，装置可以包括采样率转换器，其可以包括被配置为接收具有第一频率的输入信号的输入和被配置为提供具有与第一频率不同的第二频率的输出信号的输出。采样率转换器可以包括滤波器系数查找表和数字控制振荡器，其被配置为以所述第一频率和第二频率的函数的速率从所述滤波器系数查找表提供滤波器系数。采样率转换器可以包括被配置为产生作为来自数控振荡器的滤波器系数的滤波器系数与输入信号的采样的乘积的乘法器和被配置为对乘法器的输出求和并提供当累加器接收到转储结果的指示器时，求和的结果。

64. 发明授权

US09049491B2 Method and system for power management in a frequency division multiplexed network 有权
标题翻译：频分复用网络中电源管理的方法和系统
公开(公告)号：US09049491B2
公开(公告)日：2015-06-02
申请号：US14015481
申请日：2013-08-30
申请人： MaxLinear, Inc.
发明人： Curtis Ling , Timothy Gallagher , Sridhar Ramesh
IPC分类号： H03M1/00 , H04N21/61 , H03M1/12 , H03H17/04 , H03M3/00 , H04J1/00 , H04H20/42 , H04H20/77 , H04H40/27 , H04N7/10
CPC分类号： H04N21/6587 , H03H17/0416 , H03M1/12 , H03M1/126 , H03M3/496 , H04H20/426 , H04H20/77 , H04H40/27 , H04J1/00 , H04N7/10 , H04N7/106 , H04N21/2221 , H04N21/6118 , H04N21/6373
摘要： A network device may receive a signal from a headend, wherein a bandwidth of the received signal spans from a low frequency to a high frequency and encompasses a plurality of sub-bands. The network device may determine, based on communication with the headend, whether one of more of the sub-bands residing above a threshold frequency are available for carrying downstream data from the headend to the circuitry. The network device may digitize the signal using an ADC operating at a sampling frequency. The sampling frequency may be configured based on a result of the determining. When the sub-band(s) are available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively high frequency. When the sub-band(s) are not available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively low frequency.
摘要翻译：网络设备可以从前端接收信号，其中接收信号的带宽从低频跨越到高频并且包含多个子带。网络设备可以基于与头端的通信来确定驻留在阈值频率之上的多个子带中的一个以上是否可用于将下行数据从头端传送到电路。网络设备可以使用以采样频率工作的ADC来对信号进行数字化。可以基于确定的结果来配置采样频率。当子带可用于从头端传送到网络设备的下行数据时，采样频率可以被设置为相对较高的频率。当子带不可用于从头端传送到网络设备的下行数据时，采样频率可以被设置为相对低的频率。

65. 发明授权

US08823559B2 Shift-invariant digital sampling rate conversion system 有权
标题翻译：移位不变数字采样率转换系统
公开(公告)号：US08823559B2
公开(公告)日：2014-09-02
申请号：US13881581
申请日：2011-10-27
申请人： Stéphan Tassart
发明人： Stéphan Tassart
IPC分类号： H03M7/00 , H04L1/00 , H03H17/06 , H03H17/04
CPC分类号： H04L1/0002 , H03H17/0416 , H03H17/0455 , H03H17/0621 , H03H17/0685
摘要： There is described a method of making a linear periodically time varying system shift-invariant, comprising the following steps implemented for each input signal the sampling rate of which has to be converted: —generating a set of polyphase components based on the input signal, —feeding the generated set of polyphase components to the system, and —generating an output signal by performing interleaving, shifting and addition on signals output by the system corresponding to the generated set of polyphase components processed by the system.
摘要翻译：描述了一种制造线性周期性时变系统偏移不变量的方法，包括为每个输入信号实现以下步骤，其中采样速率必须被转换： - 基于输入信号产生一组多相分量，将生成的多相分量组合馈送到系统，并且通过对由系统处理的生成的多相分量组合对应的系统输出的信号执行交织，移位和相加来产生输出信号。

66. 发明申请

US20090079598A1 SAMPLE RATE CONVERTER 审中-公开
标题翻译：采样率转换器
公开(公告)号：US20090079598A1
公开(公告)日：2009-03-26
申请号：US12057647
申请日：2008-03-28
申请人： Masanori Furuta , Takafumi Yamaji , Takeshi Ueno
发明人： Masanori Furuta , Takafumi Yamaji , Takeshi Ueno
IPC分类号： H03M7/00
CPC分类号： H03H17/04 , H03H17/0416
摘要： The sample rate converter includes a synthesizing unit which synthesizes an input signal sampled with frequency fs with a feedback signal of the frequency fs, in a frequency band from 0 to fs/N (where N indicates a natural number), with a gain greater than at least 1, to generate a synthesized signal, a downsampler which downsamples the synthesized signal to obtain an output signal of sample rate fs/N, and an upsampler which upsamples the output signal to generate the feedback signal.
摘要翻译：采样率转换器包括合成单元，其将从频率fs采样的输入信号与频率fs的反馈信号在0至fs / N（其中N表示自然数）的频带中合成，增益大于至少1，以产生合成信号，下采样器，其对合成信号进行下采样以获得采样率fs / N的输出信号;以及上采样器，其对输出信号进行采样以产生反馈信号。

67. 发明申请

US20070220073A1 Digital filter and method for designing digital filters 审中-公开
标题翻译：数字滤波器和数字滤波器设计方法
公开(公告)号：US20070220073A1
公开(公告)日：2007-09-20
申请号：US11545838
申请日：2006-10-11
申请人： Mario Traber
发明人： Mario Traber
IPC分类号： G06F15/00
CPC分类号： H03H17/0288 , H03H17/0277 , H03H17/0416 , H03H17/0444 , H03H17/045
摘要： A digital filter comprises a plurality of filter units each realizing mutually independent filter functions with a predetermined recursive filter order on a signal path between the input and the output of the filter and operating at a first clock rate, a plurality of sampling devices operating at the first clock rate, and a weighting network coupled to the sampling devices and operating at a second clock rate. The filter units comprise at least one delay element which can be reset to a predeterminable value. To each of the filter units one of the sampling devices is allocated setting the respective delay element to a predetermined value dependent on a sampling rate conversion factor. An input signal is conducted, via the weighting network, to a respective sampling device, or digital internal sampling signals output by a respective sampling device are conducted to the output via the weighting network.
摘要翻译：数字滤波器包括多个滤波器单元，每个滤波器单元在滤波器的输入和输出之间的信号路径上以预定的递归滤波器顺序实现相互独立的滤波器功能，并以第一时钟速率工作;多个采样装置第一时钟速率和耦合到采样设备并以第二时钟速率操作的加权网络。滤波器单元包括至少一个可被重置为可预定值的延迟元件。对于每个滤波器单元，分配采样设备之一，根据采样率转换因子将相应的延迟元件设置为预定值。通过加权网络将输入信号传送到相应的采样装置，或者由相应采样装置输出的数字内部采样信号通过加权网络被传送到输出端。

68. 发明申请

US20070146177A1 Sample rate conversion combined with filter 有权
标题翻译：采样率转换结合滤波器
公开(公告)号：US20070146177A1
公开(公告)日：2007-06-28
申请号：US11387093
申请日：2006-03-22
申请人： John Melanson , Stephen Turk
发明人： John Melanson , Stephen Turk
IPC分类号： H03M7/00
CPC分类号： H03H17/0416 , H03H17/0444
摘要： Digital filtering and sample rate conversion blocks are combined in order to reduce hardware and/or computational complexity. Input data samples provided at a first sample rate are converted to output data samples at a second sample rate unequal to the first sample rate. An Infinite Impulse Response filter having internal states are updated at the first sample rate filters the input data samples in, to produce filtered data samples at the first sample rate. Output data samples are output at the second sample rate, where each output data sample is created as the sum of at least two intermediate products, a first intermediate product and a second intermediate product. The first intermediate product is defined by a first function of the internal states multiplied by a first function of the time difference between output samples and internal state updates, and the second intermediate product is defined by a second function of the internal states multiplied by a second function of the time difference between output samples and internal state updates.
摘要翻译：数字滤波和采样率转换块被组合以便降低硬件和/或计算复杂性。以第一采样率提供的输入数据样本以不等于第一采样率的第二采样率转换为输出数据采样。具有内部状态的无限脉冲响应滤波器以第一采样速率更新，对输入数据样本进行滤波，以产生第一采样率的滤波数据样本。以第二采样率输出输出数据样本，其中每个输出数据样本被创建为至少两个中间产品，第一中间产品和第二中间产品的总和。第一中间产品由内部状态的第一函数乘以输出样本和内部状态更新之间的时间差的第一函数而定义，并且第二中间乘积由内部状态的第二函数乘以第二个函数输出样本和内部状态更新之间的时间差的函数。

69. 发明申请

US20070146176A1 Sample rate conversion combined with filter 有权
标题翻译：采样率转换结合滤波器
公开(公告)号：US20070146176A1
公开(公告)日：2007-06-28
申请号：US11318271
申请日：2005-12-23
申请人： John Melanson , Stephen Turk
发明人： John Melanson , Stephen Turk
IPC分类号： H03M7/00
CPC分类号： H03H17/0416 , H03H17/0444
摘要： Digital filtering and sample rate conversion blocks are combined in order to reduce hardware and/or computational complexity. A novel filter design is used to perform sample rate conversion. The filter may be combined with another digital filter. Two embodiments may be used to achieve this function. In a first embodiment, the filter may be clocked at a first (i.e., input) data rate (i.e., before rate conversion). In a second embodiment, the filter may be clocked at the second (i.e., output) data rate (i.e., after rate conversion). In both cases, the filter's basic structure remains essentially the same, but some extra terms are added to handle the rate conversion. The present application is directed toward a sample-rate conversion filter using the output data rate clock as the filter clock.
摘要翻译：数字滤波和采样率转换块被组合以便降低硬件和/或计算复杂性。使用新的滤波器设计来执行采样率转换。滤波器可以与另一数字滤波器组合。可以使用两个实施例来实现该功能。在第一实施例中，滤波器可以以第一（即输入）数据速率（即，在速率转换之前）被计时。在第二实施例中，滤波器可以以第二（即输出）数据速率（即，在速率转换之后）被计时。在这两种情况下，过滤器的基本结构保持基本相同，但添加了一些额外的术语来处理速率转换。本申请涉及使用输出数据速率时钟作为滤波器时钟的采样率转换滤波器。

70. 发明授权

US06982538B2 Methods and apparatus for generating a sinusoidal motor drive signal for a MEMS gyroscope 有权
标题翻译：用于产生用于MEMS陀螺仪的正弦电动机驱动信号的方法和装置
公开(公告)号：US06982538B2
公开(公告)日：2006-01-03
申请号：US10236418
申请日：2002-09-06
申请人： Stanley A. White
发明人： Stanley A. White
IPC分类号： H02P1/46
CPC分类号： H03H17/0444 , G01C19/56 , H03H17/0285 , H03H17/0294 , H03H17/0416 , Y10T74/12 , Y10T74/1225 , Y10T74/1229 , Y10T74/1257 , Y10T74/1275 , Y10T74/1282
摘要： An apparatus is described which reduces a time delay and a resultant phase shift in a gyroscope motor drive signal. The motor drive signal originates from a numerically controlled oscillator whose output is sampled at a predetermined rate. The apparatus includes a first element which upsamples the oscillator output signal samples and a band pass filter configured to receive an output from the first element and remove spectral components from the output of the first element. The apparatus further includes a third element which generates a tuning parameter, β′o, for tuning of the band pass filter and a scaling multiplier configured to normalize an output of the filter.
摘要翻译：描述了一种减少陀螺仪电机驱动信号中的时间延迟和结果相移的装置。电动机驱动信号来自数控振荡器，其输出以预定速率被采样。该装置包括对振荡器输出信号采样进行上采样的第一元件和配置成接收来自第一元件的输出并从第一元件的输出去除频谱分量的带通滤波器。该装置还包括产生调谐参数的第三元件，用于调整带通滤波器，以及缩放乘法器，被配置为对滤波器的输出进行归一化。

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