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    • 61. 发明授权
    • Inverted thin film transistor having a trapezoidal-shaped protective layer
    • 具有梯形保护层的倒置薄膜晶体管
    • US06229156B1
    • 2001-05-08
    • US08854135
    • 1997-05-08
    • Hiroyuki MuraiKen Nakashima
    • Hiroyuki MuraiKen Nakashima
    • H01L2712
    • H01L29/66765H01L29/41733H01L29/78609
    • A thin film transistor of the present invention is composed of a transparent insulating substrate, a gate electrode formed on the transparent insulating substrate, a gate insulating film formed on the transparent insulating substrate including the gate electrode, a semiconductor active layer formed corresponding to the gate electrode through the gate insulating film, a source region and a drain region formed adjacent to the semiconductor active layer, a protective layer formed on the semiconductor active layer and having the side face inclined with respect to the transparent insulating substrate surface, a source electrode and a drain electrode formed respectively on the source region and the drain region, a part of which is extended onto the protective layer.
    • 本发明的薄膜晶体管由透明绝缘基板,形成在透明绝缘基板上的栅极电极,形成在包括栅电极的透明绝缘基板上形成的栅极绝缘膜,对应于栅极形成的半导体有源层 通过栅极绝缘膜的电极,与半导体有源层相邻形成的源极区域和漏极区域,形成在半导体有源层上并具有相对于透明绝缘基板表面倾斜的侧面的保护层,源电极和 分别形成在源极区域和漏极区域上的漏电极,其一部分延伸到保护层上。
    • 63. 发明授权
    • Method of fabricating thin film transistor
    • 制造薄膜晶体管的方法
    • US5668019A
    • 1997-09-16
    • US094954
    • 1993-07-23
    • Kazuhiro KobayashiHiroyuki MuraiTakao SakamotoYuichi Masutani
    • Kazuhiro KobayashiHiroyuki MuraiTakao SakamotoYuichi Masutani
    • H01L21/336H01L29/786H01L21/84
    • H01L29/66757H01L29/78621
    • An Si thin film (2) for a channel is formed on an insulating substrate (1), and then a gate insulating film (3) made principally of SiO.sub.2 is formed thereon. On the gate insulating film (3) is formed a gate electrode (4) composed of a Si thin film doped with impurities. The gate electrode (4) is patterned by isotropic etching using a photoresist (11) as a mask, and the gate insulating film (3) is patterned by anisotropic etching using the photoresist (11) as a mask into a configuration wider than the gate electrode (4) to be removed from source/drain regions position. The Si thin film (2) is ion implanted with impurities to form source/drain regions of an offset structure. A thin film transistor having an offset or LDD structure and capable of reducing an off-state drain current is fabricated without the need for increased number of masks and for an accurate photolithography technique, such as in alignment accuracy between masks.
    • 在绝缘基板(1)上形成用于沟道的Si薄膜(2),然后在其上形成主要由SiO 2制成的栅极绝缘膜(3)。 在栅绝缘膜(3)上形成由掺杂有杂质的Si薄膜构成的栅电极(4)。 通过使用光致抗蚀剂(11)作为掩模的各向同性蚀刻对栅电极(4)进行构图,并且通过使用光致抗蚀剂(11)作为掩模的各向异性蚀刻将栅极绝缘膜(3)图案化成比栅极宽 电极(4)从源/漏区位置移除。 Si薄膜(2)被离子注入杂质以形成偏移结构的源极/漏极区域。 制造具有偏移或LDD结构并且能够降低截止状态漏极电流的薄膜晶体管,而不需要增加数量的掩模和精确的光刻技术,例如掩模之间的对准精度。
    • 65. 发明申请
    • TOUCH PANEL AND DISPLAY DEVICE COMPRISING THE SAME
    • 触控面板和包括它的显示装置
    • US20100253647A1
    • 2010-10-07
    • US12740124
    • 2008-11-10
    • Masafumi AgariNaoki NakagawaSeiichiro MoriHiroyuki Murai
    • Masafumi AgariNaoki NakagawaSeiichiro MoriHiroyuki Murai
    • G06F3/045
    • G06F3/044G06F3/0416
    • A touch panel capable of calculating touch position coordinates of an indicator with high accuracy in a desired detection time even if a large number of detection wire groups are provided. An oscillator circuit selects one of detection wires selected by a circuit or the like according to a command from a detection control circuit and oscillates. A circuit counts an output signal from the oscillator circuit up to a first count value. A circuit measures a period of the count. A circuit determines that there is a touch when it detects the detection wire of which the measured period is equal to or higher than a threshold value and sends the detection wire giving a maximum value equal to or higher than the threshold value to a circuit as a touch detection wire. The circuit causes the circuit or the like to select the touch detection wire and the detection wires adjacent thereto on both sides, the circuit counts up until the count value becomes a second count value larger than the first count value, and the circuit measures the count period. The circuit performs interpolation on the basis of the count value obtained by subtracting a background capacitance value from a measured value obtained by the circuit, to thereby determine the touch coordinates.
    • 即使提供了大量检测线组,能够在期望的检测时间内高精度地计算指示器的触摸位置坐标的触摸面板。 振荡电路根据来自检测控制电路的指令,选择由电路等选择的检测线之一并振荡。 电路将来自振荡器电路的输出信号计数到第一计数值。 电路测量一段时间。 电路确定当检测到测量周期等于或高于阈值的检测线时有触摸,并将给出等于或高于阈值的最大值的检测线发送到电路作为 触摸检测线。 电路使电路等在两侧选择触摸检测线及与其相邻的检测线,电路向上计数,直到计数值变为比第一计数值大的第二计数值,并且电路测量计数 期。 电路根据通过从电路获得的测量值减去背景电容值而得到的计数值进行内插,从而确定触摸坐标。
    • 70. 发明授权
    • Shift register and image display apparatus containing the same
    • 移位寄存器和包含它的图像显示装置
    • US07499518B2
    • 2009-03-03
    • US11532750
    • 2006-09-18
    • Youichi TobitaHiroyuki Murai
    • Youichi TobitaHiroyuki Murai
    • G11C19/00
    • G11C19/184G09G3/3648G09G3/3677G09G2300/0408G09G2310/027G11C19/28
    • A shift register includes, in the output stage, a first transistor connected between an output terminal and a first clock terminal and a second transistor connected between the output terminal and a first power terminal. Third and fourth transistors constitute an inverter which inverses the level of the gate of the second transistor and outputs it to the gate of the first transistor. An isolation circuit formed by fifth and sixth transistors is provided between the gate of the first transistor and the gate of the fourth transistor. The fifth transistor is diode-connected. When the gate of the first transistor becomes higher than the gate of the fourth transistor, the first and fourth transistors are electrically isolated from each other.
    • 移位寄存器包括在输出级中连接在输出端和第一时钟端之间的第一晶体管和连接在输出端和第一电源端之间的第二晶体管。 第三和第四晶体管构成反相器,其反转第二晶体管的栅极的电平并将其输出到第一晶体管的栅极。 由第五晶体管和第六晶体管形成的隔离电路设置在第一晶体管的栅极和第四晶体管的栅极之间。 第五个晶体管是二极管连接的。 当第一晶体管的栅极变得高于第四晶体管的栅极时,第一和第四晶体管彼此电隔离。