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61. 发明申请

US20060258154A1 Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon 有权
公开(公告)号：US20060258154A1
公开(公告)日：2006-11-16
申请号：US11488579
申请日：2006-07-17
申请人： Gurtej Sandhu , Guy Blalock
发明人： Gurtej Sandhu , Guy Blalock
IPC分类号： H01L21/4763
CPC分类号： C23C14/5826 , H01L21/28512 , H01L21/28518
摘要： A method of forming a reaction product includes providing a semiconductor substrate comprising a first material. A second material is formed over the first material. The first and second materials are of different compositions, and are proximate one another at an interface. The first and second materials as being proximate one another at the interface are capable of reacting with one another at some minimum reaction temperature when in an inert non-plasma atmosphere at a pressure. The interface is provided at a processing temperature which is at least 50° C. below the minimum reaction temperature, and is provided at the pressure. With the interface at the processing temperature and at the pressure, the substrate is exposed to a plasma effective to impart a reaction of the first material with the second material to form a reaction product third material of the first and second materials over the first material. Other aspects and implementations are contemplated.

62. 发明申请

US20060246734A1 Methods of forming patterned photoresist layers over semiconductor substrates 有权
标题翻译：在半导体衬底上形成图案化光致抗蚀剂层的方法
公开(公告)号：US20060246734A1
公开(公告)日：2006-11-02
申请号：US11477287
申请日：2006-06-28
申请人： Guy Blalock , Gurtej Sandhu , Jon Daley
发明人： Guy Blalock , Gurtej Sandhu , Jon Daley
IPC分类号： H01L21/302 , H01L21/31 , H01L21/4763 , G03C5/00
CPC分类号： G03F7/091 , H01L21/0276
摘要： This invention includes methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a porous antireflective coating is formed over a semiconductor substrate. A photoresist footer-reducing fluid is provided within pores of the porous antireflective coating. A positive photoresist is formed over the porous antireflective coating having the fluid therein. The positive photoresist is patterned and developed to form a patterned photoresist layer, with the fluid within the pores being effective to reduce photoresist footing in the patterned photoresist layer than would otherwise occur in the absence of the fluid within the pores. Other aspects and implementations are contemplated.
摘要翻译：本发明包括在半导体衬底上形成图案化光致抗蚀剂层的方法。在一个实施方案中，在半导体衬底上形成多孔抗反射涂层。在多孔抗反射涂层的孔内提供光致抗蚀剂页脚还原液。在其中具有流体的多孔抗反射涂层上形成正性光致抗蚀剂。正性光致抗蚀剂被图案化和显影以形成图案化的光致抗蚀剂层，孔内的流体有效地减少图案化光致抗蚀剂层中的光致抗蚀剂底脚，而不是在孔内不存在流体的情况下发生。考虑了其他方面和实现。

63. 发明申请

US20060172534A1 Atomic layer deposition methods 有权
公开(公告)号：US20060172534A1
公开(公告)日：2006-08-03
申请号：US11359098
申请日：2006-02-21
申请人： Trung Doan , Guy Blalock , Gurtej Sandhu
发明人： Trung Doan , Guy Blalock , Gurtej Sandhu
IPC分类号： H01L21/44
CPC分类号： H01L21/0228 , C23C16/38 , C23C16/403 , C23C16/45542 , C23C16/515 , H01L21/02178 , H01L21/02183 , H01L21/02186 , H01L21/02205 , H01L21/02274 , H01L21/28562 , H01L21/3141 , H01L21/31616 , H01L21/31683 , H01L21/76841
摘要： A first precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. A second precursor gas different in composition from the first precursor gas is flowed to the first monolayer within the chamber under surface microwave plasma conditions within the chamber effective to react with the first monolayer and form a second monolayer on the substrate which is different in composition from the first monolayer. The second monolayer includes components of the first monolayer and the second precursor. In one implementation, the first and second precursor flowings are successively repeated effective to form a mass of material on the substrate of the second monolayer composition. Additional and other implementations are contemplated.

64. 发明申请

US20060021969A1 Method for controlling the temperature of a gas distribution plate in a process reactor 审中-公开
标题翻译：控制工艺反应器中气体分布板温度的方法
公开(公告)号：US20060021969A1
公开(公告)日：2006-02-02
申请号：US11237604
申请日：2005-09-27
申请人： Kevin Donohoe , Guy Blalock
发明人： Kevin Donohoe , Guy Blalock
IPC分类号： C03C25/68
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor and method is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.
摘要翻译：公开了一种等离子体工艺反应器和方法，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。通过减少在气体分配板后面注入的流量分数，可以增加气体分配板的温度。气体分配板的温度升高导致来自气体分配板的沉积材料的更高的O 2等离子体去除速率。此外，更高的等离子体温度有助于在固定温度反应器中不可能在高温下操作的其它过程。

65. 发明申请

US20060008988A1 Method of forming a memory cell 审中-公开
标题翻译：形成存储单元的方法
公开(公告)号：US20060008988A1
公开(公告)日：2006-01-12
申请号：US11217944
申请日：2005-09-01
申请人： Chun Chen , Guy Blalock , Graham Wolstenholme , Kirk Prall
发明人： Chun Chen , Guy Blalock , Graham Wolstenholme , Kirk Prall
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L21/76895 , H01L27/115
摘要： Methods and apparatus are described to facilitate forming memory devices with low resistance polysilicon local interconnects that allow a smaller array feature size and therefore facilitate forming arrays of a denser array format. Embodiments of the present invention are formed utilizing a wet etch process that has a high selectivity, allowing the deposition and etching of polysilicon local interconnects to source regions of array transistors. By providing for a local interconnect of polysilicon, a smaller source region and/or drain region can also be utilized, further decreasing the required word line spacing. Low resistance polysilicon local source interconnects can also couple to an increased number of memory cells, thereby reducing the number of contacts made to an array ground.
摘要翻译：描述了方法和装置以便于形成具有低电阻多晶硅局部互连的存储器件，其允许更小的阵列特征尺寸，并因此促进形成更密集阵列格式的阵列。使用具有高选择性的湿蚀刻工艺形成本发明的实施例，允许将多晶硅局部互连件沉积和蚀刻到阵列晶体管的源极区域。通过提供多晶硅的局部互连，还可以利用更小的源极区和/或漏极区，进一步减少所需的字线间隔。低电阻多晶硅本地源极互连还可以耦合到增加数量的存储器单元，从而减少对阵列地阵进行的触点的数量。

66. 发明申请

US20050057268A1 Plasma probe, methods for fabricating the same, and methods for using the same 失效
标题翻译：等离子体探针，其制造方法及其使用方法
公开(公告)号：US20050057268A1
公开(公告)日：2005-03-17
申请号：US10663587
申请日：2003-09-16
申请人： Guy Blalock
发明人： Guy Blalock
IPC分类号： G01R19/00 , G01R31/28 , G01R31/02
CPC分类号： G01R19/0046 , G01R31/2831 , Y10T29/49155
摘要： A plasma probe that includes a substrate having substantially the same properties as those of a substrate to be processed, a bottom electrode layer located over the substrate and electrically isolated therefrom, a dielectric layer positioned over the bottom electrode layer including apertures through which one or more electrodes of the bottom electrode layer are exposed, and at least one upper electrode layer that is electrically isolated from the bottom electrode layer by way of the dielectric layer. Electrodes of the bottom and upper electrode layers communicate with meters which may provide real-time data representative of one or more properties of a region of a plasma to which the electrodes are exposed. The plasma probe may be fabricated by forming the bottom electrode layer over the substrate and separately forming one or more upper electrode layers over a sacrificial substrate. These structures are assembled with the dielectric layer therebetween.
摘要翻译：一种等离子体探针，其包括具有与待处理衬底基本相同的性质的衬底，位于衬底上并与其电隔离的底部电极层，位于底部电极层上方的电介质层，该电介质层包括一个或多个露出底部电极层的电极以及通过电介质层与底部电极层电隔离的至少一个上部电极层。底部和上部电极层的电极与可提供表示电极暴露于其中的等离子体区域的一个或多个特性的实时数据通信。可以通过在衬底上形成底电极层并且在牺牲衬底上分开形成一个或多个上电极层来制造等离子体探针。这些结构与介电层组装在一起。

67. 发明申请

US20050051827A1 Capacitor constructions and rugged silicon-containing surfaces 失效
标题翻译：电容器结构和坚固的含硅表面
公开(公告)号：US20050051827A1
公开(公告)日：2005-03-10
申请号：US10913275
申请日：2004-08-06
申请人： Guy Blalock , Lyle Breiner , Er-Xuan Ping , Shenlin Chen
发明人： Guy Blalock , Lyle Breiner , Er-Xuan Ping , Shenlin Chen
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/00 , H01L29/76 , H01L31/119
CPC分类号： H01L27/10852 , H01L28/84 , Y10S438/964
摘要： The invention encompasses a method of forming a rugged silicon-containing surface. A layer comprising amorphous silicon is provided within a reaction chamber at a first temperature. The temperature is increased to a second temperature at least 40° C. higher than the first temperature while flowing at least one hydrogen isotope into the chamber. After the temperature reaches the second temperature, the layer is seeded with seed crystals. The seeded layer is then annealed to form a rugged silicon-containing surface. The rugged silicon-containing surface can be incorporated into a capacitor construction. The capacitor construction can be incorporated into a DRAM cell, and the DRAM cell can be utilized in an electronic system.
摘要翻译：本发明包括形成坚固的含硅表面的方法。在第一温度下在反应室内设置包含非晶硅的层。当将至少一个氢同位素流入室内时，将温度升高至高于第一温度至少40℃的第二温度。温度达到第二个温度后，该层用晶种接种。接种层然后退火以形成坚固的含硅表面。坚固的含硅表面可以结合到电容器结构中。电容器结构可以并入到DRAM单元中，并且可以在电子系统中使用DRAM单元。

68. 发明申请

US20050031284A1 Waveguide for thermo optic device 失效
标题翻译：波导用于光电装置
公开(公告)号：US20050031284A1
公开(公告)日：2005-02-10
申请号：US10929271
申请日：2004-08-30
申请人： Guy Blalock , Howard Rhodes , Vishnu Agarwal , Gurtej Sandhu , James Foresi , Jean-Francois Viens , Dale Fried
发明人： Guy Blalock , Howard Rhodes , Vishnu Agarwal , Gurtej Sandhu , James Foresi , Jean-Francois Viens , Dale Fried
IPC分类号： G02B6/12 , G02B6/125 , G02B6/136 , G02F1/01 , G02F1/025 , G02B6/10
CPC分类号： G02F1/025 , G02B6/125 , G02B6/136 , G02B2006/12107 , G02B2006/12164 , G02F1/0147 , G02F2203/15
摘要： A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.
摘要翻译：波导和谐振器形成在热光器件的下包层上，每个具有基本相等的形成高度。此后，波导的形成高度被衰减。以这种方式，波导和谐振器在波导和谐振器前面或彼此面对的区域（与现有技术相比）中的波导和谐振器之间的纵横比，从而恢复波导和光栅之间的同步性并允许更高的带宽配置要使用的。在形成谐振器和波导之后，通过光掩模和蚀刻波导来实现波导衰减。在一个实施例中，在沉积上部包层之后进行光掩模和蚀刻。另一方面，它是在沉积之前进行的。还教导了具有这些波导的热光器件，热光封装和光纤系统。

69. 发明申请

US20050031263A1 Resistive heater for thermo optic device 有权
公开(公告)号：US20050031263A1
公开(公告)日：2005-02-10
申请号：US10929210
申请日：2004-08-30
申请人： Gurtej Sandhu , Guy Blalock
发明人： Gurtej Sandhu , Guy Blalock
IPC分类号： G02F1/01 , G02F1/225 , G02B6/34
CPC分类号： G02B6/125 , G02F1/0102 , G02F1/0147 , G02F1/2257 , G02F2201/30 , G02F2201/307 , G02F2202/104
摘要： Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing methods. The resistive heater is comprised of a heater region and a conductive path region formed together in a first mask count from a relatively high resistance material. A conductor formed from a relatively low resistance material is formed directly on the conductive path region in a second mask count. Thermo optic devices formed by these two mask count methods are also described.

70. 发明申请

US20050022935A1 Apparatus for improved low pressure inductively coupled high density plasma reactor 审中-公开
公开(公告)号：US20050022935A1
公开(公告)日：2005-02-03
申请号：US10929835
申请日：2004-08-30
申请人： Guy Blalock , Kevin Donohoe
发明人： Guy Blalock , Kevin Donohoe
IPC分类号： C23C16/505 , H01J37/32 , H01L21/205 , H01L21/302 , H01L21/3065 , H05H1/46 , C23F1/00
CPC分类号： H01J37/32091 , H01J37/321 , H01J37/32183 , H05H1/46
摘要： A plasma reactor comprises an electromagnetic energy source coupled to a radiator through first and second variable impedance networks. The plasma reactor includes a chamber having a dielectric window that is proximate to the radiator. A shield is positioned between the radiator and the dielectric window. The shield substantially covers a surface of the radiator near the dielectric window. A portion of the radiator that is not covered by the shield is proximate to a conductive wall of the chamber. Plasma reactor operation includes the following steps. A plasma is ignited in a chamber with substantially capacitive electric energy coupled from the radiator. A variable impedance network is tuned so that the capacitive electric energy coupled into the chamber is diminished. The plasma is then powered with substantially magnetic energy.

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