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61. 发明申请

US20100177552A1 TABLE-BASED REFERENCE VOLTAGE CHARACTERIZATION SCHEME 有权
标题翻译：基于表的参考电压特性方案
公开(公告)号：US20100177552A1
公开(公告)日：2010-07-15
申请号：US12352722
申请日：2009-01-13
申请人： Henry F. Huang , Andrew J. Carter , Maroun Khoury , Yong Lu , Yiran Chen
发明人： Henry F. Huang , Andrew J. Carter , Maroun Khoury , Yong Lu , Yiran Chen
IPC分类号： G11C11/00 , G11C5/14 , G11C7/00
CPC分类号： G11C5/147 , G11C11/1673 , G11C13/0069
摘要： Method and apparatus for reading data from a non-volatile memory cell, such as a modified STRAM cell. In some embodiments, at least a first and second memory cell are read for a plurality of resistance values that are used to select and store a voltage reference for each memory cell.
摘要翻译：用于从诸如修改的STRAM单元的非易失性存储单元读取数据的方法和装置。在一些实施例中，针对用于选择和存储每个存储器单元的电压参考的多个电阻值，读取至少第一和第二存储单元。

62. 发明申请

US20100097852A1 MRAM DIODE ARRAY AND ACCESS METHOD 有权
标题翻译： MRAM二极管阵列和访问方法
公开(公告)号：US20100097852A1
公开(公告)日：2010-04-22
申请号：US12254414
申请日：2008-10-20
申请人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Song S. Xue
发明人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Song S. Xue
IPC分类号： G11C11/14 , G11C7/00
CPC分类号： G11C11/1675 , G11C11/1659
摘要： A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions.
摘要翻译：存储单元包括磁性隧道结数据单元电耦合到位线和源极线。磁隧道结数据单元被配置为通过使写入电流通过磁性隧道结数据单元而在高电阻状态和低电阻状态之间切换。第一二极管电磁性地在磁性隧道结数据单元和源极线之间，第二个二极管电气地在磁性隧道结数据单元和源极线之间。第一二极管和第二二极管并联电连接并具有相反的正向偏压方向。

63. 发明申请

US20100067282A1 MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 失效
标题翻译：存储器阵列，带有读参考电压电池
公开(公告)号：US20100067282A1
公开(公告)日：2010-03-18
申请号：US12212798
申请日：2008-09-18
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00 , G11C7/02 , G11C7/22 , G11C11/14
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

64. 发明申请

US20100058125A1 DATA DEVICES INCLUDING MULTIPLE ERROR CORRECTION CODES AND METHODS OF UTILIZING 有权
标题翻译：包含多个错误修正码的数据设备和使用方法
公开(公告)号：US20100058125A1
公开(公告)日：2010-03-04
申请号：US12198516
申请日：2008-08-26
申请人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Song S. Xue
发明人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Song S. Xue
IPC分类号： G06F11/00
CPC分类号： G06F11/1048 , G11C2029/0411
摘要： A method of utilizing at least one block of data, wherein the at least one block of data includes a plurality of cells for storing data and at least one error flag bit, the method including: scanning the block of data for errors; determining the error rate of the block of data; and applying an error correction code to data being read from or written to a cell within the at least one block of data, wherein the error correction code is applied based on the error rate, wherein a weak error correction code is applied when the error rate is below an error threshold, and a strong error correction code is applied when the error rate is at or above the error threshold.
摘要翻译：一种使用至少一个数据块的方法，其中所述至少一个数据块包括用于存储数据的多个单元和至少一个误差标志位，所述方法包括：扫描所述数据块的错误; 确定数据块的错误率; 以及对所述至少一个数据块中的单元读取或写入的数据应用纠错码，其中，基于所述错误率应用所述纠错码，其中当所述错误率低于错误阈值，并且当错误率处于或高于错误阈值时应用强纠错码。

65. 发明申请

US20100008134A1 TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT 有权
标题翻译：基于传输门控的转子转矩记忆单元
公开(公告)号：US20100008134A1
公开(公告)日：2010-01-14
申请号：US12170549
申请日：2008-07-10
申请人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Yang Li
发明人： Yiran Chen , Hai Li , Hongyue Liu , Yong Lu , Yang Li
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C11/1657 , G11C11/1659 , G11C11/1675 , Y10S977/935
摘要： A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.
摘要翻译：描述基于传输门的自旋转移转矩存储单元。存储单元包括电耦合到位线和源极线的磁性隧道结数据单元。 NMOS晶体管与PMOS晶体管并联电连接，并且它们与源极线和磁性隧道结数据单元电连接。磁隧道结数据单元被配置为通过使极化写入电流通过磁性隧道结数据单元在高电阻状态和低电阻状态之间切换。 PMOS晶体管和NMOS晶体管可单独寻址，使得第一方向上的第一写入电流流过PMOS晶体管，并且第二方向的第二写入电流流过NMOS晶体管。

66. 发明授权

US08519495B2 Single line MRAM 失效
标题翻译：单线MRAM
公开(公告)号：US08519495B2
公开(公告)日：2013-08-27
申请号：US12372025
申请日：2009-02-17
申请人： Insik Jin , Hongyue Liu , Yong Lu , Xiaobin Wang
发明人： Insik Jin , Hongyue Liu , Yong Lu , Xiaobin Wang
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/1673 , G11C11/1675 , H01L27/228
摘要： A magnetic memory device includes a first electrode separated from a second electrode by a magnetic tunnel junction. The first electrode provides a write current path along a length of the first electrode. The magnetic tunnel junction includes a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation. The free magnetic layer is spaced from the first electrode a distance of less than 10 nanometers. A current passing along the write current path generates a magnetic field. The magnetic field switches the free magnetic layer magnetization orientation between a high resistance state magnetization orientation and a low resistance state magnetization orientation.
摘要翻译：磁存储器件包括通过磁性隧道结从第二电极分离的第一电极。第一电极沿着第一电极的长度提供写入电流路径。磁性隧道结包括具有可在高电阻状态磁化取向和低电阻状态磁化取向之间切换的磁化取向的自由磁性层。自由磁性层与第一电极间隔小于10纳米的距离。沿着写入电流路径的电流产生磁场。磁场在高电阻状态磁化取向和低电阻状态磁化取向之间切换自由磁层磁化取向。

67. 发明申请

US20100207219A1 SINGLE LINE MRAM 失效
标题翻译：单线MRAM
公开(公告)号：US20100207219A1
公开(公告)日：2010-08-19
申请号：US12372025
申请日：2009-02-17
申请人： Insik Jin , Hongyue Liu , Yong Lu , Xiaobin Wang
发明人： Insik Jin , Hongyue Liu , Yong Lu , Xiaobin Wang
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/1673 , G11C11/1675 , H01L27/228
摘要： A magnetic memory device includes a first electrode separated from a second electrode by a magnetic tunnel junction. The first electrode provides a write current path along a length of the first electrode. The magnetic tunnel junction includes a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation. The free magnetic layer is spaced from the first electrode a distance of less than 10 nanometers. A current passing along the write current path generates a magnetic field. The magnetic field switches the free magnetic layer magnetization orientation between a high resistance state magnetization orientation and a low resistance state magnetization orientation.
摘要翻译：磁存储器件包括通过磁性隧道结从第二电极分离的第一电极。第一电极沿着第一电极的长度提供写入电流路径。磁性隧道结包括具有可在高电阻状态磁化取向和低电阻状态磁化取向之间切换的磁化取向的自由磁性层。自由磁性层与第一电极间隔小于10纳米的距离。沿着写入电流路径的电流产生磁场。磁场在高电阻状态磁化取向和低电阻状态磁化取向之间切换自由磁层磁化取向。

68. 发明授权

US10385391B2 Entangled mate sequencing 有权
公开(公告)号：US10385391B2
公开(公告)日：2019-08-20
申请号：US13497069
申请日：2010-09-22
申请人： Frederick P. Roth , Joseph C. Mellor , Yong Lu , Mark Chee
发明人： Frederick P. Roth , Joseph C. Mellor , Yong Lu , Mark Chee
IPC分类号： C40B20/00 , C12Q1/68 , C12Q1/6874
摘要： Methods and compositions are provided for performing a set of N DNA sequencing reaction cycles whereby sequence information is obtained for approximately 2*N nucleotide bases.

69. 发明授权

US09720433B2 Cellular power supply network, intelligent gateway and power supply control method thereof 有权
公开(公告)号：US09720433B2
公开(公告)日：2017-08-01
申请号：US13995884
申请日：2011-10-25
申请人： Yong Lu
发明人： Yong Lu
IPC分类号： G05F3/02 , H02H7/04 , H02J3/00 , H02J3/06 , H02J3/38
CPC分类号： G05F3/02 , H02H7/04 , H02J3/006 , H02J3/06 , H02J3/38 , Y04S10/20 , Y04S20/14
摘要： The embodiments of the present invention provide a cellular power supply network, an intelligent gateway and a power supply control method thereof. The cellular power supply network further comprises: at least one cellular power supply layer formed by a plurality of transformers connected as a cellular structure. In the embodiments of the present invention, the electricity energy can be transferred from one transformer to another transformer demanding power as needed, so that the power is more reasonably distributed and the energy utilization rate is improved. In the technical solutions of the present invention, when a certain transformer cannot work normally due to a fault, the electricity energy outside the transformer can be introduced into the user of the transformer using the cellular power supply network, so as to keep continuous power usage. Meanwhile, the transformer can be separated from the power supply network for repairing and maintenance.

70. 发明申请

US20140142251A1 FILLED ELASTOMER COMPRISING POLYURETHANE 审中-公开
标题翻译：填充弹性体包含聚氨酯
公开(公告)号：US20140142251A1
公开(公告)日：2014-05-22
申请号：US14131152
申请日：2012-07-04
申请人： Dong Liang , Weihua Ye , Yong Lu , Zhen Tong , Zhaohui Chen
发明人： Dong Liang , Weihua Ye , Yong Lu , Zhen Tong , Zhaohui Chen
IPC分类号： C08L9/06
摘要： The present invention relates to a method for producing a filled elastomer wherein a rubber composition is produced by mixing I) raw rubber, II) cross linking agent, III) filler, IV) isocyanate terminated polymer composition and optionally V) further additives and cross linking of the rubber composition. The present invention further relates to a filled elastomer obtainable according to said method and the use of filled elastomers according to the invention as shoe sole.
摘要翻译：本发明涉及一种填充弹性体的制造方法，其中通过混合I）生橡胶，II）交联剂，III）填料，IV）异氰酸酯封端的聚合物组合物和任选的V）进一步添加和交联来制备橡胶组合物的橡胶组合物。本发明还涉及根据所述方法可获得的填充弹性体和根据本发明的填充弹性体作为鞋底的用途。

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