专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明授权

US08504944B2 Image processing apparatus, method of displaying image, image display program, and recording medium having image display program for displaying image recorded thereon 有权
标题翻译：图像处理装置，显示图像的方法，图像显示程序和具有用于显示记录在其上的图像的图像显示程序的记录介质
公开(公告)号：US08504944B2
公开(公告)日：2013-08-06
申请号：US13053510
申请日：2011-03-22
申请人： Tadashi Yamaguchi
发明人： Tadashi Yamaguchi
IPC分类号： G06F3/048
CPC分类号： G06F3/0418 , G06F3/0428 , G06F3/04886
摘要： An image processing apparatus includes: an image display control unit controlling an image display on a display screen; an image generating unit generating a question image including a question and option buttons configured by icons that can be arbitrarily selected for the question; a position detecting unit detecting a position of a pointer present on the display screen from imaging data acquired by imaging the display screen; a position information storing unit storing positions of the icons when the question image is displayed on the display screen; and a control unit specifying an icon out of the icons selected by the pointer based on the position of the pointer and calibrating the position of the pointer based on the position of the icon, which is stored in the position information storing unit, corresponding to the icon specified to have been selected.
摘要翻译：一种图像处理装置，包括：图像显示控制单元，控制显示屏幕上的图像显示; 图像生成单元，生成包括由可以任意选择的问题构成的问题和选项按钮的问题图像; 位置检测单元，通过对显示屏进行成像而获取的成像数据来检测存在于显示屏幕上的指示器的位置; 位置信息存储单元，其在所述显示屏幕上显示所述问题图像时存储所述图标的位置; 以及控制单元，其基于指示器的位置指定由指针选择的图标中的图标，并且基于存储在位置信息存储单元中的与图标对应的图标的位置来校准指针的位置图标指定为已选择。

62. 发明申请

US20120304053A1 DISPLAY APPARATUS, DISPLAY METHOD, AND PROGRAM 审中-公开
标题翻译：显示设备，显示方法和程序
公开(公告)号：US20120304053A1
公开(公告)日：2012-11-29
申请号：US13576722
申请日：2011-12-20
申请人： Tadashi Yamaguchi
发明人： Tadashi Yamaguchi
IPC分类号： G06F17/00
CPC分类号： G06F1/1616 , G06F1/1647 , G06F1/1677 , G06F3/1431 , G06F15/0291 , G09G2380/02 , G09G2380/14
摘要： Techniques are disclosed for displaying content on an electronic book having a plurality of physically distinct displays configured to be turned by a user. A content page may be calculated for display on a display page with number Dm, different from the currently opened display page number Dn. The content page may be calculated based at least in part on a ratio between Dd and Dr, where Dd is a difference between Dm and Dn, and Dr is a number of display pages between the currently opened display page and a beginning or end of the available display pages formed by the plurality of displays of the electronic book.
摘要翻译：公开了用于在电子书上显示内容的技术，该电子书具有被配置为由用户转动的多个物理上不同的显示。可以计算内容页面以在与当前打开的显示页面号码Dn不同的数字Dm的显示页面上显示。可以至少部分地基于Dd和Dr之间的比率来计算内容页面，其中Dd是Dm和Dn之间的差，Dr是当前打开的显示页面与当前打开的显示页面的开始或结束之间的显示页面的数量由电子书的多个显示器形成的可用显示页面。

63. 发明授权

US08289410B2 Recording apparatus and method, playback apparatus and method, and program 有权
标题翻译：记录装置和方法，播放装置和方法以及程序
公开(公告)号：US08289410B2
公开(公告)日：2012-10-16
申请号：US12488091
申请日：2009-06-19
申请人： Tadashi Yamaguchi
发明人： Tadashi Yamaguchi
IPC分类号： H04N5/227 , H04N5/77
CPC分类号： H04N1/2112 , G11B27/034 , H04N1/212 , H04N1/2125 , H04N5/772 , H04N9/8227 , H04N9/8233 , H04N21/4147 , H04N21/4828 , H04N21/8153 , H04N21/84 , H04N2201/3235 , H04N2201/3253 , H04N2201/3263 , H04N2201/3269
摘要： A recording apparatus includes: a still image acquiring unit configured to acquire a still image from a moving image during recording or playback of the moving image; an information adding unit configured to add information related to the moving image at or slightly before the time the still image is acquired by the still image acquiring means, to the still image acquired by the still image acquiring unit; and a still image recording unit configured to record the still image to which the information related to the moving image has been added by the information adding unit.
摘要翻译：记录装置包括：静止图像获取单元，被配置为在运动图像的记录或重放期间从运动图像获取静止图像; 信息添加单元，被配置为在由静止图像获取装置获取静态图像的时间之前或之前将关于运动图像的信息添加到由静止图像获取单元获取的静止图像; 以及静止图像记录单元，被配置为记录由信息添加单元添加了与运动图像相关的信息的静止图像。

64. 发明申请

US20110207317A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110207317A1
公开(公告)日：2011-08-25
申请号：US13053733
申请日：2011-03-22
申请人： Toshiaki Tsutsumi , Tomonori Okudaira , Keiichiro Kashihara , Tadashi Yamaguchi
发明人： Toshiaki Tsutsumi , Tomonori Okudaira , Keiichiro Kashihara , Tadashi Yamaguchi
IPC分类号： H01L21/768
CPC分类号： H01L23/485 , H01L21/28518 , H01L2924/0002 , H01L2924/00
摘要： There is provided a semiconductor device having a metal silicide layer which can suppress the malfunction and the increase in power consumption of the device. The semiconductor device has a semiconductor substrate containing silicon and having a main surface, first and second impurity diffusion layers formed in the main surface of the semiconductor substrate, a metal silicide formed over the second impurity diffusion layer, and a silicon nitride film and a first interlayer insulation film sequentially stacked over the metal silicide. In the semiconductor device, a contact hole penetrating through the silicon nitride film and the first interlayer insulation film, and reaching the surface of the metal silicide is formed. The thickness of a portion of the metal silicide situated immediately under the contact hole is smaller than the thickness of a portion of the metal silicide situated around the contact hole.
摘要翻译：提供了具有金属硅化物层的半导体器件，其可以抑制器件的故障和功率消耗的增加。半导体器件具有包含硅并具有主表面的半导体衬底，形成在半导体衬底的主表面中的第一和第二杂质扩散层，形成在第二杂质扩散层上的金属硅化物，以及氮化硅膜和第一层间绝缘膜依次层叠在金属硅化物上。在半导体器件中，形成穿过氮化硅膜和第一层间绝缘膜并到达金属硅化物表面的接触孔。位于接触孔正下方的金属硅化物的一部分的厚度小于位于接触孔周围的金属硅化物的一部分的厚度。

65. 发明授权

US07872314B2 Method of manufacturing semiconductor device carrying out ion implantation before silicide process 有权
标题翻译：在硅化物处理之前进行离子注入的半导体器件的制造方法
公开(公告)号：US07872314B2
公开(公告)日：2011-01-18
申请号：US12727334
申请日：2010-03-19
申请人： Tadashi Yamaguchi , Keiichiro Kashihara , Tomonori Okudaira , Toshiaki Tsutsumi
发明人： Tadashi Yamaguchi , Keiichiro Kashihara , Tomonori Okudaira , Toshiaki Tsutsumi
IPC分类号： H01L23/62
CPC分类号： H01L21/823814 , H01L21/26506 , H01L21/823835 , H01L21/823864 , H01L29/665 , H01L29/6653 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： An N-type source region and an N-type drain region of N-channel type MISFETs are implanted with ions (containing at least one of F, Si, C, Ge, Ne, Ar and Kr) with P-channel type MISFETs being covered by a mask layer. Then, each gate electrode, source region and drain region of the N- and P-channel type MISFETs are subjected to silicidation (containing at least one of Ni, Ti, Co, Pd, Pt and Er). This can suppress a drain-to-body off-leakage current (substrate leakage current) in the N-channel type MISFETs without degrading the drain-to-body off-leakage current in the P-channel type MISFETs.
摘要翻译：离子（含有F，Si，C，Ge，Ne，Ar和Kr中的至少一个）注入N沟道型MISFET的N型源极区域和N型漏极区域，P沟道型MISFET为被掩模层覆盖。然后，对N沟道型MISFET和P沟道型MISFET的各栅电极，源极区和漏极区进行硅化（含有Ni，Ti，Co，Pd，Pt和Er中的至少一种）。这可以抑制N沟道型MISFET中的漏 - 漏泄漏电流（衬底泄漏电流），而不会降低P沟道型MISFET中的漏 - 漏泄漏电流。

66. 发明授权

US07728430B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07728430B2
公开(公告)日：2010-06-01
申请号：US11987613
申请日：2007-12-03
申请人： Tadashi Yamaguchi
发明人： Tadashi Yamaguchi
IPC分类号： H01L23/48
CPC分类号： H01L23/3114 , H01L23/544 , H01L23/562 , H01L24/11 , H01L24/12 , H01L24/81 , H01L2223/54426 , H01L2223/5448 , H01L2224/05001 , H01L2224/05023 , H01L2224/05147 , H01L2224/05568 , H01L2224/05647 , H01L2224/13099 , H01L2224/81121 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/14 , H01L2924/00014
摘要： A polygonal semiconductor device includes a substrate and a wiring layer. The substrate includes semiconductor circuit elements. The wiring layer includes a dielectric sealing layer, a plurality of first electrodes, and a plurality of second electrodes. The first and second electrodes both extend through the dielectric sealing layer in its thickness direction. The first electrodes are electrically connected to the semiconductor circuit elements. Each of the corners of the polygonal device is formed, throughout the thickness of the wiring layer, by one of the second electrodes. The corners of the device are thereby reinforced, as the electrode material is tougher than the dielectric sealing material.
摘要翻译：多边形半导体器件包括衬底和布线层。衬底包括半导体电路元件。布线层包括电介质密封层，多个第一电极和多个第二电极。第一和第二电极在其厚度方向上均延伸穿过电介质密封层。第一电极电连接到半导体电路元件。通过其中一个第二电极，在整个布线层的厚度上形成多边形装置的每个角。因此，由于电极材料比电介质密封材料更硬，所以装置的角部被加强。

67. 发明授权

US07696050B2 Method of manufacturing semiconductor device carrying out ion implantation before silicide process 有权
标题翻译：在硅化物处理之前进行离子注入的半导体器件的制造方法
公开(公告)号：US07696050B2
公开(公告)日：2010-04-13
申请号：US11537208
申请日：2006-09-29
申请人： Tadashi Yamaguchi , Keiichiro Kashihara , Tomonori Okudaira , Toshiaki Tsutsumi
发明人： Tadashi Yamaguchi , Keiichiro Kashihara , Tomonori Okudaira , Toshiaki Tsutsumi
IPC分类号： H01L21/336
CPC分类号： H01L21/823814 , H01L21/26506 , H01L21/823835 , H01L21/823864 , H01L29/665 , H01L29/6653 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： An N-type source region and an N-type drain region of N-channel type MISFETs are implanted with ions (containing at least one of F, Si, C, Ge, Ne, Ar and Kr) with P-channel type MISFETs being covered by a mask layer. Then, each gate electrode, source region and drain region of the N- and P-channel type MISFETs are subjected to silicidation (containing at least one of Ni, Ti, Co, Pd, Pt and Er). This can suppress a drain-to-body off-leakage current (substrate leakage current) in the N-channel type MISFETs without degrading the drain-to-body off-leakage current in the P-channel type MISFETs.
摘要翻译：离子（含有F，Si，C，Ge，Ne，Ar和Kr中的至少一个）注入N沟道型MISFET的N型源极区域和N型漏极区域，P沟道型MISFET为被掩模层覆盖。然后，对N沟道型MISFET和P沟道型MISFET的各栅电极，源极区和漏极区进行硅化（含有Ni，Ti，Co，Pd，Pt和Er中的至少一种）。这可以抑制N沟道型MISFET中的漏 - 漏泄漏电流（衬底泄漏电流），而不会降低P沟道型MISFET中的漏 - 漏泄漏电流。

68. 发明授权

US07193301B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07193301B2
公开(公告)日：2007-03-20
申请号：US10798555
申请日：2004-03-12
申请人： Tadashi Yamaguchi
发明人： Tadashi Yamaguchi
IPC分类号： H01L23/02
CPC分类号： H01L24/19 , H01L23/13 , H01L23/3114 , H01L23/5389 , H01L2224/04105 , H01L2224/20 , H01L2224/211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/15311
摘要： A plurality of semiconductor chips (14) each having a first main surface (14b) formed with electrode pads (21) and a second main surface (14c) opposite to the first main surface are respectively mounted on a chip mounting surface (12a) larger in area than the second main surface, of a wafer-shaped mounting substrate (12) at equal intervals so as to extend along first and second trenches (18a, 18b) defined in the chip mounting surface with these trenches as target lines. Thereafter, solder balls (25) electrically connected to the electrode pads of the semiconductor chips are disposed on their corresponding wiring patterns 34 that extend from above first regions (100) located above the semiconductor chips, of a surface region of an encapsulating layer (32) covering the semiconductor chips to above second regions (200) that surround the first regions. Afterwards, the encapsulating layer and the mounting substrate are cut and thereby fractionized into semiconductor devices each having a fan-out structure.
摘要翻译：每个具有形成有电极焊盘（21）的第一主表面（14b）和与第一主表面相对的第二主表面（14c）的多个半导体芯片（14）分别安装在芯片安装表面（12）上 a）相对于晶片状安装基板（12）的面积大于第二主表面的距离，以等间隔延伸，以便以这些沟槽限定在芯片安装表面中的第一和第二沟槽（18a，18b）延伸为目标线。此后，电连接到半导体芯片的电极焊盘的焊球（25）设置在它们对应的布线图案34上，该布线图案34从位于半导体芯片上方的第一区域（100）延伸到封装层（32）的表面区域）覆盖半导体芯片到围绕第一区域的第二区域（200）。然后，封装层和安装基板被切割，从而分成半扇形，每个都具有扇出结构。

69. 发明授权

US07131314B2 Material for diamond sintered body die and diamond sintered body die 有权
标题翻译：金刚石烧结体模具和金刚石烧结体模具的材料
公开(公告)号：US07131314B2
公开(公告)日：2006-11-07
申请号：US10497084
申请日：2003-05-23
申请人： Minoru Yoshida , Takeru Nakashima , Tadashi Yamaguchi
发明人： Minoru Yoshida , Takeru Nakashima , Tadashi Yamaguchi
IPC分类号： B21C3/02
CPC分类号： B21C3/02 , B21C3/025 , B21C3/18
摘要： To provide a diamond compact die semi-manufactured product and a diamond compact die that do not crack during die processing.A diamond compact die semi-manufactured product includes a diamond compact and a holding ring. The holding ring is a cylinder composed of a tungsten alloy, and the inner diameter thereof is tapered. The diamond compact is tapered so as to fit to the taper of the cylinder and the diamond compact is press-fitted to the holding ring. For lower cost production, the tapered face of the diamond compact is formed by electric spark machining. The tungsten alloy contains 90% to 97% by weight of tungsten and 3% to 10% by weight of nickel.
摘要翻译：提供金刚石紧凑模具半成品和在模具加工期间不裂纹的金刚石紧凑型模具。金刚石紧凑模具半成品包括金刚石紧固件和固定环。保持环是由钨合金构成的圆筒，其内径为锥形。金刚石压块是锥形的，以适应圆筒的锥形，金刚石压块压配合到保持环上。为了降低成本，金刚石致密体的锥形面通过电火花加工形成。钨合金含有90重量％至97重量％的钨和3重量％至10重量％的镍。

70. 发明申请

US20060091451A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060091451A1
公开(公告)日：2006-05-04
申请号：US11254725
申请日：2005-10-21
申请人： Tadashi Yamaguchi , Koyu Asai , Mahito Sawada , Kiyoteru Kobayashi , Tatsunori Murata , Satoshi Shimizu
发明人： Tadashi Yamaguchi , Koyu Asai , Mahito Sawada , Kiyoteru Kobayashi , Tatsunori Murata , Satoshi Shimizu
IPC分类号： H01L23/52
CPC分类号： H01L21/76802 , H01L21/76801 , H01L21/76828 , H01L21/76829 , H01L21/76837 , H01L23/53295 , H01L23/564 , H01L2924/0002 , H01L2924/13091 , H01L2924/00
摘要： In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.
摘要翻译：为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜，层间绝缘膜。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式