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61. 发明申请

US20140156972A1 Control Transfer Termination Instructions Of An Instruction Set Architecture (ISA) 有权
标题翻译：指令集架构（ISA）的控制传输终止指令
公开(公告)号：US20140156972A1
公开(公告)日：2014-06-05
申请号：US13690221
申请日：2012-11-30
申请人： Vedyvas Shanbhogue , Jason W. Brandt , Uday R. Savagaonkar , Ravi L. Sahita
发明人： Vedyvas Shanbhogue , Jason W. Brandt , Uday R. Savagaonkar , Ravi L. Sahita
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F21/71 , G06F9/3005 , G06F9/30054 , G06F9/30076 , G06F9/3012 , G06F9/30145 , G06F9/3851 , G06F9/3857 , G06F9/3861 , G06F21/52
摘要： In an embodiment, the present invention includes a processor having an execution logic to execute instructions and a control transfer termination (CTT) logic coupled to the execution logic. This logic is to cause a CTT fault to be raised if a target instruction of a control transfer instruction is not a CTT instruction. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括具有执行指令的执行逻辑和耦合到执行逻辑的控制传输终止（CTT）逻辑的处理器。如果控制传输指令的目标指令不是CTT指令，则该逻辑是引起CTT故障。描述和要求保护其他实施例。

62. 发明申请

US20140041045A1 DIGITAL RIGHTS MANAGEMENT (DRM) LOCKER 有权
公开(公告)号：US20140041045A1
公开(公告)日：2014-02-06
申请号：US13566223
申请日：2012-08-03
申请人： Christopher J. McConnell , Uday R. Savagaonkar
发明人： Christopher J. McConnell , Uday R. Savagaonkar
IPC分类号： G06F21/24
CPC分类号： H04L63/10 , G06F21/10 , H04L2463/101
摘要： Methods, apparatuses and storage medium associated digital rights management (DRM) using DRM locker is disclosed herein. In embodiments, a DRM locker is provided to a client device. The DRM locker may be configured to store a number of DRM licenses or keys for a number of DRM protected contents. The DRM locker, on presentation of an associated locker key, may respond to a request for one or more of the stored DRM licenses or keys, to enable consumption of the corresponding DRM protected contents using the client device. Other embodiments may be disclosed or claimed.

63. 发明授权

US08468356B2 Software copy protection via protected execution of applications 有权
标题翻译：通过受保护的应用程序执行软件复制保护
公开(公告)号：US08468356B2
公开(公告)日：2013-06-18
申请号：US12165260
申请日：2008-06-30
申请人： Ravi L. Sahita , Uday R. Savagaonkar , Vedvyas Shanbhogue , Ernest F. Brickell
发明人： Ravi L. Sahita , Uday R. Savagaonkar , Vedvyas Shanbhogue , Ernest F. Brickell
IPC分类号： G06F21/00
CPC分类号： G06F21/53 , H04L9/0841 , H04L9/3263 , H04L2209/605
摘要： Methods and apparatus to provide a tamper-resistant environment for software are described. In some embodiments, procedures for verifying whether a software container is utilizing protected memory and is associated with a specific platform are described. Other embodiments are also described.
摘要翻译：描述了为软件提供防篡改环境的方法和设备。在一些实施例中，描述了用于验证软件容器是否正在利用受保护的存储器并且与特定平台相关联的过程。还描述了其它实施例。

64. 发明申请

US20110161677A1 SEAMLESSLY ENCRYPTING MEMORY REGIONS TO PROTECT AGAINST HARDWARE-BASED ATTACKS 有权
标题翻译：无缝加密存储区域防范基于硬件的攻击
公开(公告)号：US20110161677A1
公开(公告)日：2011-06-30
申请号：US12651432
申请日：2009-12-31
申请人： Uday R. Savagaonkar , Ravi Sahita , David Durham , Men Long
发明人： Uday R. Savagaonkar , Ravi Sahita , David Durham , Men Long
IPC分类号： G06F12/14
CPC分类号： G06F12/1408 , G06F12/1441 , G06F2212/1052
摘要： Systems, apparatuses, and methods, and for seamlessly protecting memory regions to protect against hardware-based attacks are disclosed. In one embodiment, an apparatus includes a decoder, control logic, and cryptographic logic. The decoder is to decode a transaction between a processor and memory-mapped input/output space. The control logic is to redirect the transaction from the memory-mapped input/output space to a system memory. The cryptographic logic is to operate on data for the transaction.
摘要翻译：公开了系统，装置和方法，并且用于无缝地保护存储器区域以防止基于硬件的攻击。在一个实施例中，一种装置包括解码器，控制逻辑和加密逻辑。解码器是对处理器和存储器映射的输入/输出空间之间的事务进行解码。控制逻辑是将事务从存储器映射的输入/输出空间重定向到系统存储器。密码逻辑是对数据进行交易操作。

65. 发明申请

US20090241189A1 EFFICIENT HANDLING OF INTERRUPTS IN A COMPUTING ENVIRONMENT 有权
标题翻译：有效处理计算环境中的中断
公开(公告)号：US20090241189A1
公开(公告)日：2009-09-24
申请号：US12050862
申请日：2008-03-18
申请人： Vedvyas Shanbhogue , Uday R. Savagaonkar , Ravi L. Sahita
发明人： Vedvyas Shanbhogue , Uday R. Savagaonkar , Ravi L. Sahita
IPC分类号： G06F12/14
CPC分类号： G06F13/26
摘要： A method for efficiently handling interrupts in a virtual technology environment with integrity services is provided. The method comprises assigning an interrupt to a virtual machine that is running a software agent; suspending the software agent; invoking a protected interrupt handler; copying the interrupt's memory content to a protected location, in response to successfully verifying the integrity of the content; replacing the interrupt's return address with a return address for a protected function; switching from the software agent's protected context to its active context; executing the original interrupt handler; returning control to the protected function to ensure that execution of the software agent resumes safely; switching back to the software agent's protected context, in response to successfully verifying the integrity of the content; and passing control back to the software agent to resume execution.
摘要翻译：提供了一种在完整性服务中有效处理虚拟技术环境中断的方法。该方法包括：向运行软件代理的虚拟机分配中断; 暂停软件代理; 调用受保护的中断处理程序; 响应成功验证内容的完整性，将中断的内存内容复制到受保护的位置; 用保护功能的返回地址替换中断的返回地址; 从软件代理的受保护的上下文切换到其活动上下文; 执行原始中断处理程序; 将控制权返回到受保护的功能，以确保软件代理的执行安全恢复; 响应成功验证内容的完整性，切换回软件代理的受保护的上下文; 并将控制权传回软件代理程序以恢复执行。

66. 发明申请

US20090172343A1 USING A TRANSLATION LOOKASIDE BUFFER TO MANAGE PROTECTED MICRO-CONTEXTS 有权
标题翻译：使用翻译LOOKASIDE缓冲区来管理受保护的微型内容
公开(公告)号：US20090172343A1
公开(公告)日：2009-07-02
申请号：US11967523
申请日：2007-12-31
申请人： Uday R. Savagaonkar
发明人： Uday R. Savagaonkar
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F9/461 , G06F12/1027 , G06F12/1036 , G06F12/145 , G06F2212/651
摘要： Embodiments of an invention for using a translation lookaside buffer to manage protected micro-contexts are disclosed. In one embodiment, an apparatus includes an interface and memory management logic. The interface is to perform a transaction to fetch information from a memory. The memory management logic is to translate an untranslated address to a memory address. The memory management logic includes a storage location, a series of translation stages, determination logic, and a translation lookaside buffer. The storage location is to store an address of a data structure for the first translation stage. Each of the translation stages includes translation logic to find an entry in a data structure based on a portion of the untranslated address. Each entry is to store an address of a different data structure for the first translation stage, an address of a data structure for a successive translation stage, or the physical address. The determination logic is to determine whether an entry is storing an address of a different data structure for the first translation stage. The translation lookaside buffer is to store translations.
摘要翻译：公开了使用翻译后备缓冲器来管理受保护的微上下文的发明的实施例。在一个实施例中，一种装置包括接口和存储器管理逻辑。该接口是执行一个事务来从内存中获取信息。存储器管理逻辑将非翻译地址转换为存储器地址。存储器管理逻辑包括存储位置，一系列翻译级，确定逻辑和翻译后备缓冲器。存储位置是存储用于第一翻译阶段的数据结构的地址。每个翻译阶段包括翻译逻辑，以基于未翻译地址的一部分在数据结构中找到条目。每个条目是存储用于第一翻译阶段的不同数据结构的地址，用于连续翻译阶段的数据结构的地址或物理地址。确定逻辑是确定条目是否存储用于第一翻译阶段的不同数据结构的地址。翻译后备缓冲区用于存储翻译。

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