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61. 发明授权

US06897527B2 Strained channel FinFET 有权
标题翻译：应变通道FinFET
公开(公告)号：US06897527B2
公开(公告)日：2005-05-24
申请号：US10833112
申请日：2004-04-28
申请人： Srikanteswara Dakshina-Murthy , Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Srikanteswara Dakshina-Murthy , Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L21/336 , H01L29/10 , H01L29/49 , H01L29/786 , H01L27/01
CPC分类号： H01L29/785 , H01L29/1054 , H01L29/4908 , H01L29/66795 , H01L29/78654 , H01L29/78687
摘要： A semiconductor device includes a fin and a layer formed on at least a portion of the fin. The fin includes a first crystalline material. The layer includes a second crystalline material, where the first crystalline material has a larger lattice constant than the second crystalline material to induce tensile strain within the layer.
摘要翻译：半导体器件包括翅片和形成在鳍片的至少一部分上的层。翅片包括第一结晶材料。该层包括第二结晶材料，其中第一结晶材料具有比第二结晶材料更大的晶格常数以在层内引起拉伸应变。

62. 发明授权

US06893930B1 Fabrication of field effect transistor with shallow junctions using low temperature activation of antimony 有权
标题翻译：使用低温活化锑制造具有浅结的场效应晶体管
公开(公告)号：US06893930B1
公开(公告)日：2005-05-17
申请号：US10161452
申请日：2002-05-31
申请人： Bin Yu , Haihong Wang
发明人： Bin Yu , Haihong Wang
IPC分类号： H01L21/265 , H01L21/336
CPC分类号： H01L29/66598 , H01L21/26513 , H01L29/665 , H01L29/6653
摘要： For fabricating a field effect transistor on an active device area of a semiconductor substrate, a gate dielectric and a gate electrode are formed on the active device area of the semiconductor substrate. Antimony (Sb) dopant is implanted into exposed regions of the active device area of the semiconductor substrate to form at least one of drain and source extension junctions and/or drain and source contact junctions. A low temperature thermal anneal process at a temperature less than about 950° Celsius is performed for activating the antimony (Sb) dopant within the drain and source extension junctions and/or drain and source contact junctions. In one embodiment of the present invention, the drain and source contact junctions are formed and thermally annealed before the formation of the drain and source extension junctions in a disposable spacer process for further minimizing heating of the drain and source extension junctions. In another embodiment of the present invention, the drain and source extension junctions and/or the drain and source contact junctions are formed to be amorphous before the thermal anneal process. In that case, a SPE (solid phase epitaxy) activation process in performed for activating the antimony (Sb) dopant within the amorphous drain and source extension junctions and/or the amorphous drain and source contact junctions at a temperature less than about 650° Celsius.
摘要翻译：为了在半导体衬底的有源器件区域上制造场效应晶体管，在半导体衬底的有源器件区域上形成栅极电介质和栅电极。将锑（Sb）掺杂剂注入到半导体衬底的有源器件区域的暴露区域中，以形成漏极和源极延伸结和/或漏极和源极接触结中的至少一个。在低于约950℃的温度下进行低温热退火工艺，以激活漏极和源极延伸结和/或漏极和源极接触接点内的锑（Sb）掺杂剂。在本发明的一个实施例中，在一次性间隔器工艺中形成漏极和源极延伸接头之前，形成漏极和源极接触接头并进行热退火，以进一步最小化漏极和源极延伸接点的加热。在本发明的另一实施例中，在热退火工艺之前，将漏极和源极延伸接头和/或漏极和源极接触接点形成为非晶体。在这种情况下，在低于约650℃的温度下，在非晶漏极和源极延伸结和/或非晶漏极和源极接触点内激活用于激活锑（Sb）掺杂剂的SPE（固相外延）激活过程。

63. 发明授权

US06762483B1 Narrow fin FinFET 有权
标题翻译：窄鳍FinFET
公开(公告)号：US06762483B1
公开(公告)日：2004-07-13
申请号：US10348910
申请日：2003-01-23
申请人： Zoran Krivokapic , Judy Xilin An , Srikanteswara Dakshina-Murthy , Haihong Wang , Bin Yu
发明人： Zoran Krivokapic , Judy Xilin An , Srikanteswara Dakshina-Murthy , Haihong Wang , Bin Yu
IPC分类号： H01L2906
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66818 , H01L29/78687
摘要： A method of forming fins for a double-gate fin field effect transistor (FinFET) includes forming a second layer of semi-conducting material over a first layer of semi-conducting material and forming double caps in the second layer of semi-conducting material. The method further includes forming spacers adjacent sides of each of the double caps and forming double fins in the first semi-conducting material beneath the double caps. The method also includes thinning the double fins to produce narrow double fins.
摘要翻译：一种形成双栅极鳍效应晶体管（FinFET）的鳍片的方法包括在第一半导体材料层上形成第二半导电材料层，并在第二半导体材料层中形成双重盖子。该方法还包括在每个双盖的侧面上形成间隔物，并在双盖下方的第一半导体材料中形成双翅片。该方法还包括使双翅片变薄以产生窄的双翅片。

64. 发明授权

US06645797B1 Method for forming fins in a FinFET device using sacrificial carbon layer 有权
标题翻译：在使用牺牲碳层的FinFET器件中形成翅片的方法
公开(公告)号：US06645797B1
公开(公告)日：2003-11-11
申请号：US10310926
申请日：2002-12-06
申请人： Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Cyrus E. Tabery , Haihong Wang , Chih-Yuh Yang , Bin Yu
发明人： Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Cyrus E. Tabery , Haihong Wang , Chih-Yuh Yang , Bin Yu
IPC分类号： H01L2184
CPC分类号： H01L29/785 , H01L29/66795
摘要： A method for forming a fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further includes etching the mask and carbon layer to form at least one structure, where the structure has a first width, reducing the width of the carbon layer in the at least one structure to a second width, depositing an oxide layer to surround the at least one structure, removing a portion of the oxide layer and the mask, removing the carbon layer to form an opening in a remaining portion of the oxide layer for each of the at least one structure, filling the at least one opening with conductive material, and removing the remaining portion of the oxide layer and a portion of the conductive layer to form the fin.
摘要翻译：一种在半导体器件中形成翅片的方法，包括：衬底，形成在衬底上的绝缘层和形成在绝缘层上的导电层，包括在导电层上形成碳层，并在碳层上形成掩模。该方法还包括蚀刻掩模和碳层以形成至少一种结构，其中结构具有第一宽度，将至少一个结构中的碳层的宽度减小到第二宽度，沉积氧化物层以围绕至少一个结构，去除所述氧化物层和所述掩模的一部分，除去所述碳层以在所述至少一个结构中的每一个结构的氧化物层的剩余部分中形成开口，用导电材料填充所述至少一个开口并且去除氧化物层的剩余部分和导电层的一部分以形成翅片。

65. 发明授权

US08334181B1 Germanium MOSFET devices and methods for making same 有权
标题翻译：锗MOSFET器件及其制造方法
公开(公告)号：US08334181B1
公开(公告)日：2012-12-18
申请号：US12836378
申请日：2010-07-14
申请人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L29/72
CPC分类号： H01L29/7855 , H01L21/823821 , H01L29/42384 , H01L29/7843 , H01L29/78684
摘要： A double gate germanium metal-oxide semiconductor field-effect transistor (MOSFET) includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, and a second gate formed adjacent a second side of the germanium fin opposite the first side. A triple gate MOSFET includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, a second gate formed adjacent a second side of the germanium fin opposite the first side, and a top gate formed on top of the germanium fin. An all-around gate MOSFET includes a germanium fin, a first sidewall gate structure formed adjacent a first side of the germanium fin, a second sidewall gate structure formed adjacent a second side of the germanium fin, and additional gate structures formed on and around the germanium fin.
摘要翻译：双栅极锗金属氧化物半导体场效应晶体管（MOSFET）包括锗翅片，邻近锗翅片的第一侧形成的第一栅极和与第一侧相对的锗翅片第二侧附近形成的第二栅极。三栅极MOSFET包括锗翅片，与锗翅片的第一侧相邻形成的第一栅极，与第一侧相对的锗翅片的第二侧附近形成的第二栅极和形成在锗翅片顶部上的顶栅极。全栅极MOSFET包括锗翅片，邻近锗翅片的第一侧形成的第一侧壁栅极结构，邻近锗翅片的第二侧形成的第二侧壁栅极结构，以及形成在锗翅片上和周围的附近的栅极结构锗鳍

66. 发明授权

US07279735B1 Flash memory device 有权
标题翻译：闪存设备
公开(公告)号：US07279735B1
公开(公告)日：2007-10-09
申请号：US10838215
申请日：2004-05-05
申请人： Bin Yu , Haihong Wang
发明人： Bin Yu , Haihong Wang
IPC分类号： H01L29/788
CPC分类号： H01L29/7883 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/785
摘要： A non-volatile memory device includes a substrate, an insulating layer, a fin structure, a floating gate, an inter-gate dielectric and a control gate. The insulating layer is formed on the substrate and the fin structure is formed on the insulating layer. The fin structure may include a strained layer formed on a non-strained layer.
摘要翻译：非易失性存储器件包括衬底，绝缘层，翅片结构，浮动栅极，栅极间电介质和控制栅极。绝缘层形成在基板上，翅片结构形成在绝缘层上。翅片结构可以包括形成在非应变层上的应变层。

67. 发明授权

US06921963B2 Narrow fin FinFET 有权
标题翻译：窄鳍FinFET
公开(公告)号：US06921963B2
公开(公告)日：2005-07-26
申请号：US10830006
申请日：2004-04-23
申请人： Zoran Krivokapic , Judy Xilin An , Srikanteswara Dakshina-Murthy , Haihong Wang , Bin Yu
发明人： Zoran Krivokapic , Judy Xilin An , Srikanteswara Dakshina-Murthy , Haihong Wang , Bin Yu
IPC分类号： H01L21/336 , H01L29/423 , H01L29/786 , H01L29/06
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66818 , H01L29/78687
摘要： A narrow channel FinFET is described herein with a narrow channel width. A protective layer may be formed over the narrow channel, the protective layer being wider than the narrow channel.
摘要翻译：这里描述了窄通道FinFET，其具有窄的通道宽度。可以在窄通道上形成保护层，保护层比窄通道宽。

68. 发明申请

US20050153485A1 Narrow-body damascene tri-gate FinFET 有权
标题翻译：窄体镶嵌三栅极FinFET
公开(公告)号：US20050153485A1
公开(公告)日：2005-07-14
申请号：US10754540
申请日：2004-01-12
申请人： Shibly Ahmed , Haihong Wang , Bin Yu
发明人： Shibly Ahmed , Haihong Wang , Bin Yu
IPC分类号： H01L21/336 , H01L29/786 , H01L21/335
CPC分类号： H01L29/785 , H01L29/66545 , H01L29/66795
摘要： A method of forming a fin field effect transistor includes forming a fin and forming a source region on a first end of the fin and a drain region on a second end of the fin. The method further includes forming a dummy gate with a first semi-conducting material in a first pattern over the fin and forming a dielectric layer around the dummy gate. The method also includes removing the first semi-conducting material to leave a trench in the dielectric layer corresponding to the first pattern, thinning a portion of the fin exposed within the trench, and forming a metal gate within the trench.
摘要翻译：形成鳍状场效应晶体管的方法包括：在鳍片的第一端上形成翅片并形成源极区域，在鳍片的第二端部形成漏极区域。该方法还包括在鳍上形成具有第一图案的第一半导体材料的虚拟栅极，并在虚拟栅极周围形成介电层。该方法还包括去除第一半导体材料以在对应于第一图案的电介质层中留下沟槽，使在沟槽内暴露的鳍片的一部分变薄，并在沟槽内形成金属栅极。

69. 发明申请

US20050121716A1 FLASH MEMORY DEVICE 有权
标题翻译：闪存存储器件
公开(公告)号：US20050121716A1
公开(公告)日：2005-06-09
申请号：US10726508
申请日：2003-12-04
申请人： Wiley Hill , Haihong Wang , Yider Wu , Bin Yu
发明人： Wiley Hill , Haihong Wang , Yider Wu , Bin Yu
IPC分类号： G11C16/04 , H01L21/28 , H01L21/8247 , H01L27/115 , H01L29/788
CPC分类号： H01L21/28273 , H01L27/115 , H01L27/11556 , H01L29/785
摘要： A memory device includes a conductive structure, a number of dielectric layers and a control gate. The dielectric layers are formed around the conductive structure and the control gate is formed over the dielectric layers. A portion of the conductive structure functions as a drain region for the memory device and at least one of the dielectric layers functions as a charge storage structure for the memory device. The dielectric layers may include oxide-nitride-oxide layers.
摘要翻译：存储器件包括导电结构，多个电介质层和控制栅极。电介质层形成在导电结构周围，并且控制栅极形成在电介质层上。导电结构的一部分用作存储器件的漏极区，并且至少一个介电层用作存储器件的电荷存储结构。电介质层可以包括氧化物 - 氮化物 - 氧化物层。

70. 发明授权

US06764884B1 Method for forming a gate in a FinFET device and thinning a fin in a channel region of the FinFET device 有权
标题翻译：用于在FinFET器件中形成栅极并在FinFET器件的沟道区域中减薄鳍片的方法
公开(公告)号：US06764884B1
公开(公告)日：2004-07-20
申请号：US10405342
申请日：2003-04-03
申请人： Bin Yu , Haihong Wang
发明人： Bin Yu , Haihong Wang
IPC分类号： H01L2184
CPC分类号： H01L29/785 , H01L29/42392 , H01L29/66545 , H01L29/66818
摘要： A method of manufacturing a FinFET device includes forming a fin structure on an insulating layer. The fin structure includes a conductive fin. The method also includes forming source/drain regions and forming a dummy gate over the fin. The dummy gate may be removed and the width of the fin in the channel region may be reduced. The method further includes depositing a gate material to replace the removed dummy gate.
摘要翻译：制造FinFET器件的方法包括在绝缘层上形成翅片结构。翅片结构包括导电翅片。该方法还包括形成源极/漏极区域并在鳍片上形成虚拟栅极。可以去除伪栅极，并且可以减小沟道区域中的鳍的宽度。该方法还包括沉积栅极材料以取代去除的虚拟栅极。

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