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61. 发明授权

US07626258B2 Cap wafer, semiconductor chip having the same, and fabrication method thereof 有权
标题翻译：盖晶片，具有相同的半导体芯片及其制造方法
公开(公告)号：US07626258B2
公开(公告)日：2009-12-01
申请号：US11657056
申请日：2007-01-24
申请人： Ji-hyuk Lim , Jun-sik Hwang , Woon-bae Kim
发明人： Ji-hyuk Lim , Jun-sik Hwang , Woon-bae Kim
IPC分类号： H01L23/12 , H01L23/42
CPC分类号： B81B7/007 , B81B2207/095
摘要： A cap wafer, fabrication method, and a semiconductor chip are provided. The cap wafer includes a cap wafer substrate; a penetrated electrode formed to penetrate the cap wafer substrate; and an electrode pad connected with a lower portion of the penetrated electrode on a lower surface of the cap wafer substrate, wherein the penetrated electrode has an oblique section which gradually widens from an upper surface to the lower surface of the cap wafer substrate. The fabrication method includes forming an oblique-via hole on a lower surface of a cap wafer substrate, the oblique-via hole having an oblique section which gradually narrows in a direction moving away from the lower surface of the cap wafer substrate; and forming a penetrated electrode in the oblique-via hole. The semiconductor chip includes a base wafer; a cap wafer; a cavity; a penetrated electrode; and a pad bonding layer.
摘要翻译：提供盖晶片，制造方法和半导体芯片。盖晶片包括盖晶片基板; 形成为穿透盖晶片基板的穿透电极; 以及在所述盖片基板的下表面与所述被穿透电极的下部连接的电极焊盘，其中，所述被穿透电极具有从所述盖晶片基板的上表面向下表面逐渐变宽的倾斜部。该制造方法包括在盖晶片基板的下表面上形成倾斜通孔，该倾斜通孔具有在从盖晶片基板的下表面移开的方向上逐渐变窄的倾斜截面; 并且在所述倾斜通孔中形成穿透电极。半导体芯片包括基底晶片; 盖晶片; 一个空腔穿透电极; 和焊垫接合层。

62. 发明授权

US07452809B2 Fabrication method of packaging substrate and packaging method using the packaging substrate 有权
标题翻译：包装基材的包装方法和封装方法
公开(公告)号：US07452809B2
公开(公告)日：2008-11-18
申请号：US11240771
申请日：2005-10-03
申请人： Moon-chul Lee , Woon-bae Kim , Jun-sik Hwang , Chang-youl Moon
发明人： Moon-chul Lee , Woon-bae Kim , Jun-sik Hwang , Chang-youl Moon
IPC分类号： H01L21/44 , H01R43/00
CPC分类号： B81C1/00301 , Y10T29/49117
摘要： A fabrication method of a packaging substrate includes the steps of: forming a recess by etching a predetermined area of a lower surface of a substrate; depositing a seed layer on an upper surface of the substrate; in the recess, etching predetermined area(s) of the lower surface of the substrate and forming at least one via hole that reaches the seed layer; and plating the inside of the via hole by using the seed layer, and forming electrode(s) for electrically coupling the upper and lower parts of the substrate. First and second pads coupled to the electrode(s) may be formed on the upper and lower parts of the substrate, respectively. Thus, using the second pads as bonding materials, the packaging process becomes easier, which resultantly simplifies the fabrication process of the packaging substrate and the packaging process.
摘要翻译：包装基板的制造方法包括以下步骤：通过蚀刻基板的下表面的预定区域来形成凹部; 在基板的上表面上沉积种子层; 在所述凹部中蚀刻所述基板的下表面的预定区域并形成到达所述籽晶层的至少一个通孔; 并且通过使用晶种层对通孔的内部进行电镀，以及形成用于电耦合衬底的上部和下部的电极。分别连接到电极的第一和第二焊盘分别形成在衬底的上部和下部。因此，使用第二焊盘作为粘合材料，封装过程变得更容易，从而简化了封装衬底的制造过程和封装过程。

63. 发明授权

US07442622B2 Silicon direct bonding method 有权
标题翻译：硅直接键合法
公开(公告)号：US07442622B2
公开(公告)日：2008-10-28
申请号：US11505420
申请日：2006-08-17
申请人： Sung-gyu Kang , Seung-mo Lim , Jae-chang Lee , Woon-bae Kim
发明人： Sung-gyu Kang , Seung-mo Lim , Jae-chang Lee , Woon-bae Kim
IPC分类号： H01L21/30
CPC分类号： H01L21/187 , H01L21/2007
摘要： A silicon direct bonding (SDB) method by which void formation caused by gases is suppressed. The SDB method includes: preparing two silicon substrates having corresponding bonding surfaces; forming trenches having a predetermined depth in at least one bonding surface of the two silicon substrates; forming gas discharge outlets connected to the trenches on at least one of the two silicon substrates to vertically penetrate the bonding surface; cleaning the two silicon substrates; closely contacting the two silicon substrates to each other; and thermally treating the two substrates to bond them to each other. The trenches are formed along at least a part of a plurality of dicing lines, and both ends of the trenches are clogged. Gases generated during a thermal treatment process can be smoothly and easily discharged through the trenches and the gas discharge outlet such that a void is prevented from being formed in the junctions of the two silicon substrates due to the gases.
摘要翻译：抑制由气体引起的空隙形成的硅直接接合（SDB）方法。 SDB方法包括：制备具有相应粘合表面的两个硅衬底; 在所述两个硅衬底的至少一个接合表面中形成具有预定深度的沟槽; 形成连接到所述两个硅衬底中的至少一个上的沟槽的气体放电出口，以垂直地穿透所述接合表面; 清洁两个硅衬底; 使两个硅衬底彼此紧密接触; 并对两个基板进行热处理以将它们彼此粘合。沟槽沿着多个切割线的至少一部分形成，并且沟槽的两端被堵塞。在热处理过程中产生的气体可以通过沟槽和气体排出口平滑且容易地排出，从而防止由于气体而在两个硅衬底的接合处形成空隙。

64. 发明申请

US20070176250A1 Wafer level package for surface acoustic wave device and fabrication method thereof 有权
标题翻译：用于表面声波器件的晶片级封装及其制造方法
公开(公告)号：US20070176250A1
公开(公告)日：2007-08-02
申请号：US11447969
申请日：2006-06-07
申请人： Moon-chul Lee , Jun-sik Hwang , Ji-hyuk Lim , Woon-bae Kim
发明人： Moon-chul Lee , Jun-sik Hwang , Ji-hyuk Lim , Woon-bae Kim
IPC分类号： H01L29/84
CPC分类号： H03H9/1092 , H01L2224/48091 , H01L2224/48227 , H01L2924/16195 , H01L2924/00014
摘要： A wafer level package for a surface acoustic wave (SAW) device and a fabrication method thereof. The SAW device wafer level package includes a SAW device in which a SAW element is formed on a top surface of a device wafer, a cap wafer which is bonded with a top surface of the SAW device and has a viahole penetrating the cap wafer, and a conductive member to fill a part of the viahole. The viahole has a first via portion and a second via portion, the first via portion has a gradually smaller diameter from a bottom surface of the cap wafer until a certain depth, and the second via portion has a gradually greater diameter from the first via portion until a top surface of the cap wafer.
摘要翻译：一种用于表面声波（SAW）器件的晶片级封装及其制造方法。 SAW器件晶片级封装包括SAW器件，其中SAW元件形成在器件晶片的顶表面上，盖晶片与SAW器件的顶表面结合并具有穿透盖晶片的通孔，以及用于填充通孔的一部分的导电构件。通孔具有第一通孔部分和第二通孔部分，第一通孔部分具有从盖子晶片的底表面到一定深度的逐渐变小的直径，并且第二通孔部分具有从第一通孔部分直到盖晶片的顶表面。

65. 发明申请

US20060175707A1 Wafer level packaging cap and fabrication method thereof 有权
公开(公告)号：US20060175707A1
公开(公告)日：2006-08-10
申请号：US11339500
申请日：2006-01-26
申请人： Moon-chul Lee , Woon-bae Kim , Kae-dong Back , Qian Wang , Jun-sik Hwang , Kyu-dong Jung
发明人： Moon-chul Lee , Woon-bae Kim , Kae-dong Back , Qian Wang , Jun-sik Hwang , Kyu-dong Jung
IPC分类号： H01L23/52
CPC分类号： B81C1/00301 , B81B2207/095 , H01L21/76898 , H01L23/04 , H01L23/10 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A wafer level packaging cap and method thereof for a wafer level packaging are provided. The wafer level packaging cap covering a device wafer with a device thereon, includes a cap wafer having on a bottom surface a cavity providing a space for receiving the device, and integrally combined with the device wafer, a plurality of metal lines formed on the bottom surface of the cap wafer to correspond to a plurality of device pads formed on the device wafer to be electrically connected to the device, a plurality of buffer portions connected to the plurality of metal lines and comprising a buffer wafer with a plurality of grooves and a metal filled in the plurality of grooves, a plurality of connection rods electrically connected to the plurality of buffer portions and penetrating the cap wafer from a top portion of the buffer portion, and a plurality of cap pads formed on a top surface of the cap wafer and electrically connected to a plurality of connection rods.

66. 发明授权

US07065867B2 Low temperature hermetic sealing method having passivation layer 有权
公开(公告)号：US07065867B2
公开(公告)日：2006-06-27
申请号：US10293933
申请日：2002-11-14
申请人： Woon-bae Kim , Hyung-jae Shin , Chang-ho Cho , Seung-goo Kang
发明人： Woon-bae Kim , Hyung-jae Shin , Chang-ho Cho , Seung-goo Kang
IPC分类号： H05K3/30
CPC分类号： B81C1/00269 , H01L21/50 , H01L23/10 , H01L24/48 , H01L24/97 , H01L2224/16225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/09701 , H01L2924/12042 , H01L2924/15153 , H01L2924/15165 , H01L2924/15312 , H01L2924/16152 , H01L2924/16195 , H01L2924/163 , Y10T29/49002 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , Y10T29/49789 , Y10T29/49794 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A hermetic sealing method, which is capable of preventing oxidation of a micro-electromechanical system (MEMS) and sealing the MEMS at a low temperature. A low temperature hermetic sealing method having a passivation layer includes depositing a junction layer, a wetting layer, and a solder layer on a prepared lid frame, depositing a first protection layer for preventing oxidation on the solder layer and forming a lid, preparing a package base on which a device is disposed, and in which a metal layer and a second protection layer are formed around the device, and assembling the lid and the package base, heating, and sealing them. The protection layer is laminated on the solder layer that is formed by the lid, thereby preventing oxidation without using a flux. The low temperature hermetic sealing method having a passivation layer is suitable for sealing a device, such as the MEMS, which is sensitive to heat, water and other by-products.

67. 发明申请

US20060094158A1 Fabrication method of packaging substrate and packaging method using the packaging substrate 有权
标题翻译：包装基材的包装方法和封装方法
公开(公告)号：US20060094158A1
公开(公告)日：2006-05-04
申请号：US11240771
申请日：2005-10-03
申请人： Moon-chul Lee , Woon-bae Kim , Jun-sik Hwang , Chang-youl Moon
发明人： Moon-chul Lee , Woon-bae Kim , Jun-sik Hwang , Chang-youl Moon
IPC分类号： H01L21/50
CPC分类号： B81C1/00301 , Y10T29/49117
摘要： A fabrication method of a packaging substrate includes the steps of: forming a recess by etching a predetermined area of a lower surface of a substrate; depositing a seed layer on an upper surface of the substrate; in the recess, etching predetermined area(s) of the lower surface of the substrate and forming at least one via hole that reaches the seed layer; and plating the inside of the via hole by using the seed layer, and forming electrode(s) for electrically coupling the upper and lower parts of the substrate. First and second pads coupled to the electrode(s) may be formed on the upper and lower parts of the substrate, respectively. Thus, using the second pads as bonding materials, the packaging process becomes easier, which resultantly simplifies the fabrication process of the packaging substrate and the packaging process.
摘要翻译：包装基板的制造方法包括以下步骤：通过蚀刻基板的下表面的预定区域来形成凹部; 在基板的上表面上沉积种子层; 在所述凹部中蚀刻所述基板的下表面的预定区域并形成到达所述籽晶层的至少一个通孔; 并且通过使用晶种层对通孔的内部进行电镀，以及形成用于电耦合衬底的上部和下部的电极。分别连接到电极的第一和第二焊盘分别形成在衬底的上部和下部。因此，使用第二焊盘作为粘合材料，封装过程变得更容易，从而简化了封装衬底的制造过程和封装过程。

68. 发明授权

US06969639B2 Wafer level hermetic sealing method 失效
标题翻译：晶圆级气密密封方法
公开(公告)号：US06969639B2
公开(公告)日：2005-11-29
申请号：US09984734
申请日：2001-10-31
申请人： Chang-ho Cho , Hyung-jae Shin , Woon-bae Kim
发明人： Chang-ho Cho , Hyung-jae Shin , Woon-bae Kim
IPC分类号： H01L23/14 , B81B7/00 , B81C1/00 , H01L21/50 , H01L23/00 , H01L23/04 , H01L23/10 , H01L21/44 , H01L21/48
CPC分类号： H01L23/10 , B81B7/0077 , B81C1/00269 , B81C1/00357 , B81C2201/019 , H01L21/50 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/12041 , H01L2924/16235 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A device that is hermetically sealed at a wafer level or a method of hermetically sealing a device, which is sensitive to high temperatures or affected by heating cycles. Semiconductor devices are formed on a wafer. A lid wafer is formed. Adhesives are formed in a predetermined position over the wafer and/or the lid wafer. The wafer and the lid wafer are sealed by the adhesives at the wafer level. The sealing may be performed at a low temperature using a solder to protect the devices sensitive to heat. The sealed devices are diced into individual chips. In the wafer level hermetic sealing method, a sawing operation is performed after the devices are sealed. Therefore, the overall processing time is reduced, devices are protected from the effects of moisture or particles, and devices having a moving structure, such as MEMS devices, are more easily handled.
摘要翻译：在晶片级气密密封的装置或密封装置的方法，其对高温敏感或受加热循环影响。半导体器件形成在晶片上。形成盖子晶片。粘合剂形成在晶片和/或盖晶片上的预定位置。晶片和盖晶片在晶片级被粘合剂密封。可以使用焊料在低温下进行密封以保护对热敏感的装置。将密封的装置切成单独的芯片。在晶片级密封方法中，在密封装置之后进行锯切操作。因此，总体处理时间减少，防止装置受潮湿或微粒的影响，并且具有诸如MEMS装置的移动结构的装置更容易处理。

69. 发明授权

US06633513B1 Magneto-optical head for magneto-optical reading and writing system 失效
标题翻译：磁光读写系统磁光头
公开(公告)号：US06633513B1
公开(公告)日：2003-10-14
申请号：US09599500
申请日：2000-06-23
申请人： Woon-bae Kim , Byoung-chan Lee , Hyung-gae Shin , Cheol-sung Yeon , Sang-hun Lee , Jong-woo Shin
发明人： Woon-bae Kim , Byoung-chan Lee , Hyung-gae Shin , Cheol-sung Yeon , Sang-hun Lee , Jong-woo Shin
IPC分类号： G11B1100
CPC分类号： G11B7/1387 , G11B5/17 , G11B5/313 , G11B11/10534 , G11B11/10554 , G11B11/1058 , G11B2007/13725
摘要： A magneto-optical head for magneto-optical writing and reading systems having an improved construction for a field modulating coil and a miniature objective lens, and a method of manufacturing the magneto-optical head. The magneto-optical head is mounted at the end of a slide-arm movable over a magneto-optical recording medium by hydrodynamics and includes: a lens mounted at the end of the slide-arm, for focusing incident light to form a light spot on the magneto-optical recording medium; a coil member including at least two stacked coil layers, and an insulating layer interposed between adjacent coil layers for electrically insulating the adjacent coil layers from one another, the stacked coil layers being planar coils with a spiral structure and having electrical contacts for electrical connection therebetween; and a connection member interposed between the lens and the coil member, for connecting the coil member to one side of the lens, facing the magneto-optical recording medium, and for electrically connecting the coil layers to an external power supply. The coil member is manufactured using a semiconductor fabrication process.
摘要翻译：一种用于磁光写入和读取系统的磁光头，其具有用于场调制线圈和微型物镜的改进的结构，以及制造磁光头的方法。磁光头安装在滑动臂的端部，通过流体动力学在磁光记录介质上移动，并且包括：安装在滑臂的端部的透镜，用于聚焦入射光以形成光点磁光记录介质; 包括至少两个堆叠的线圈层的线圈构件和插入相邻线圈层之间的用于将相邻线圈层彼此电绝缘的绝缘层，所述堆叠线圈层是具有螺旋结构的平面线圈，并且具有用于电连接的电触点 ; 以及插入在透镜和线圈构件之间的连接构件，用于将线圈构件连接到透镜的一侧，面对磁光记录介质，并将线圈层电连接到外部电源。线圈构件使用半导体制造工艺制造

70. 发明授权

US6061203A Device for opening lids of varying sized tape cassettes in a magnetic recording and reproducing apparatus 失效
标题翻译：用于在磁记录和再现装置中打开不同大小的磁带盒的盖的装置
公开(公告)号：US6061203A
公开(公告)日：2000-05-09
申请号：US12003
申请日：1998-01-22
申请人： Woon-bae Kim , Chang-woo Lee
发明人： Woon-bae Kim , Chang-woo Lee
IPC分类号： G11B15/665 , G11B15/675 , G11B23/02 , G11B25/06 , G11B5/008
CPC分类号： G11B15/675 , G11B25/063 , G11B25/066
摘要： An opening device is provided for opening a lid of a tape cassette in a magnetic recording and reproducing apparatus which can be constructed to receive a first and second tape cassette having different sizes. The opening device includes first and second opening sections for opening the lid of the tape cassette which has been loaded in the apparatus. The first and second opening sections are integrally formed and disposed on a predetermined position on a main base of the apparatus, thus resulting in a more compact size.
摘要翻译：提供了一种打开装置，用于打开磁记录和再现装置中的盒式磁带的盖，该磁记录和再现装置可被构造成接收具有不同尺寸的第一和第二磁带盒。打开装置包括第一和第二开口部分，用于打开装在装置中的带盒的盖子。第一和第二开口部一体地形成并设置在装置的主基座上的预定位置上，从而形成更紧凑的尺寸。

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