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61. 发明授权

US07755185B2 Arrangement for cooling a power semiconductor module 有权
标题翻译：用于冷却功率半导体模块的布置
公开(公告)号：US07755185B2
公开(公告)日：2010-07-13
申请号：US11536843
申请日：2006-09-29
申请人： Reinhold Bayerer , Thomas Licht
发明人： Reinhold Bayerer , Thomas Licht
IPC分类号： H01L23/34
CPC分类号： H01L23/3735 , H01L23/373 , H01L23/473 , H01L24/32 , H01L24/48 , H01L24/73 , H01L2224/29111 , H01L2224/2929 , H01L2224/29299 , H01L2224/32225 , H01L2224/45014 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2224/8384 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0106 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/1305 , H01L2924/13055 , H01L2924/15787 , H01L2924/1579 , H01L2924/181 , H01L2924/3011 , H01L2924/01028 , H01L2924/0105 , H01L2924/00012 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/29199 , H01L2224/45015 , H01L2924/207
摘要： An arrangement for cooling a power semiconductor module, the power semiconductor module having a substrate with a ceramic plate and may have a metallization thereon, the arrangement has a container for the intake of a coolant with a heat-conducting plate; the heat-conducting plate having two sides, one side joined to the metallization of the substrate and the other side being in contact with the coolant; wherein the heat-conducting plate is made of materials having a metal matrix composite (MMC) material with a filling content, which results in a thermal expansion of below that of copper.
摘要翻译：一种用于冷却功率半导体模块的布置，所述功率半导体模块具有带有陶瓷板的基板并且可以在其上具有金属化，所述布置具有用于吸入具有导热板的冷却剂的容器; 所述导热板具有两侧，一侧接合到所述基板的金属化并且另一侧与所述冷却剂接触; 其中导热板由具有填充含量的金属基复合材料（MMC）材料的材料制成，这导致热膨胀低于铜的热膨胀。

62. 发明申请

US20100001785A1 SEMICONDUCTOR COMPONENT AND METHOD OF DETERMINING TEMPERATURE 有权
标题翻译：半导体元件及其测定方法
公开(公告)号：US20100001785A1
公开(公告)日：2010-01-07
申请号：US12168369
申请日：2008-07-07
申请人： Patrick Baginski , Reinhold Bayerer , Holger Ruething , Daniel Domes
发明人： Patrick Baginski , Reinhold Bayerer , Holger Ruething , Daniel Domes
IPC分类号： G01K7/16 , H01L21/66
CPC分类号： H01L23/34 , H01L23/647 , H01L27/0248 , H01L29/0696 , H01L29/42312 , H01L2924/0002 , H01L2924/00
摘要： One embodiment provides a circuit arrangement integrated in a semiconductor body. At least one power semiconductor component integrated in the semiconductor body and having a control connection and a load connection is provided. A resistance component is thermally coupled to the power semiconductor component and likewise integrated into the semiconductor body and arranged between the control connection and the load connection of the power semiconductor component. The resistance component has a temperature-dependent resistance characteristic curve. A driving and evaluation unit is designed to evaluate the current through the resistance component or the voltage drop across the resistance component and provides a temperature signal dependent thereon.
摘要翻译：一个实施例提供集成在半导体本体中的电路装置。提供集成在半导体本体中并且具有控制连接和负载连接的至少一个功率半导体部件。电阻分量热耦合到功率半导体部件，并且同样集成到半导体本体中并且布置在功率半导体部件的控制连接和负载连接之间。电阻分量具有温度依赖性电阻特性曲线。驱动和评估单元被设计为评估通过电阻分量的电流或电阻分量两端的电压降，并提供依赖于其的温度信号。

63. 发明授权

US07548825B2 Method and apparatus for current and temperature measurement in an electronic power circuit 有权
标题翻译：电子电路中电流和温度测量的方法和装置
公开(公告)号：US07548825B2
公开(公告)日：2009-06-16
申请号：US11622727
申请日：2007-01-12
申请人： Reinhold Bayerer , Markus Thoben
发明人： Reinhold Bayerer , Markus Thoben
IPC分类号： G01K15/00 , G01R31/14
CPC分类号： G01R19/0092 , G01K7/30 , H01L23/34 , H01L24/34 , H01L27/0248 , H01L2224/48091 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/00 , H01L2224/37099
摘要： A current/temperature measurement method using parasitic components in an electronic power circuit is disclosed. The measured values derived from these parasitic components with inadequate precision are first of all compensated for, in terms of their current/temperature or voltage dependence, during the production process. The evaluation which takes place during operation involves compensating for the temperature or current dependence of the sensor components using two measurements which are linearly independent of one another and appropriate arithmetic operations in an evaluation unit.
摘要翻译：公开了一种使用电子电路中的寄生元件的电流/温度测量方法。从这些具有不足精度的寄生分量得到的测量值首先在生产过程中根据其当前/温度或电压依赖性进行补偿。在操作期间进行的评估包括使用彼此线性相关的两个测量值和评估单元中适当的算术运算来补偿传感器部件的温度或电流依赖性。

64. 发明授权

US07511961B2 Base plate for a power semiconductor module 有权
标题翻译：功率半导体模块底板
公开(公告)号：US07511961B2
公开(公告)日：2009-03-31
申请号：US11553248
申请日：2006-10-26
申请人： Roman Tschirbs , Reinhold Bayerer
发明人： Roman Tschirbs , Reinhold Bayerer
IPC分类号： H05K7/20
CPC分类号： H01L23/4006 , H01L23/3735 , H01L23/492 , H01L24/48 , H01L25/072 , H01L2224/05599 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01082 , H01L2924/014 , H01L2924/13055 , H01L2924/3511 , H01L2924/00 , H01L2224/45099 , H01L2224/85399
摘要： A power semiconductor module is to be pressed to a heat sink with a first surface of a first side of a base plate. To reduce the heat transfer resistance between the base plate and the heat sink, the first surface has, at least in a state, when the power semiconductor module is not pressed against the heat sink, at least one inflection point.
摘要翻译：将功率半导体模块按压到具有基板的第一侧的第一表面的散热器。为了降低基板和散热片之间的传热阻力，第一表面至少在一个状态下，当功率半导体模块没有被压在散热片上时，至少有一个拐点。

65. 发明授权

US06310401B1 Substrate for high-voltage modules 有权
标题翻译：高压模块基板
公开(公告)号：US06310401B1
公开(公告)日：2001-10-30
申请号：US09607053
申请日：2000-06-29
申请人： Michael Stoisiek , Guy Lefranc , Reinhold Bayerer , Rainer Leuschner
发明人： Michael Stoisiek , Guy Lefranc , Reinhold Bayerer , Rainer Leuschner
IPC分类号： H01L2940
CPC分类号： H01L23/60 , H01L23/49838 , H01L24/48 , H01L2224/05599 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01068 , H01L2924/1301 , H01L2924/13055 , H01L2924/181 , H01L2924/3011 , H05K1/0257 , H05K1/0306 , H05K1/167 , H05K3/4092 , H05K3/4629 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A metallic-ceramic substrate having a ceramic layer and metal layers on both sides of the ceramic layer is provided with a high-impedance layer at the surface of the ceramic layer. The high-impedance layer is located adjacent to the metal layers. Therefore, the electrical field intensity at the edges of the metal layers is limited and an even distribution of the electrical potential at the surface of the ceramic layer is achieved. For example, the high-impedance layer may include a thin CrNi-layer, a doped Si-layer, an a—C:H-layer or a Ti-implantation.
摘要翻译：在陶瓷层的两面上具有陶瓷层和金属层的金属陶瓷基板在陶瓷层的表面设置有高阻抗层。高阻抗层位于金属层附近。因此，金属层边缘的电场强度受到限制，陶瓷层表面的电位均匀分布。例如，高阻抗层可以包括薄的CrNi层，掺杂的Si层，a-C：H层或Ti注入。

66. 发明授权

US5773320A Method for producing a power semiconductor module 失效
标题翻译：功率半导体模块的制造方法
公开(公告)号：US5773320A
公开(公告)日：1998-06-30
申请号：US558022
申请日：1995-11-13
申请人： Reinhold Bayerer
发明人： Reinhold Bayerer
IPC分类号： H01L21/98 , H01L23/473 , H01L23/538 , H01L23/544 , H01L25/07 , H01L25/16 , H01L25/18 , H01L21/60
CPC分类号： H01L25/50 , H01L23/473 , H01L23/5383 , H01L23/544 , H01L25/072 , H01L25/162 , H01L2223/54473 , H01L2924/0002
摘要： In the case of a method for producing a power semiconductor module (10), in which a plurality of submodules (12) are arranged on a common support (11), are interconnected by means of a multilayer laminate made of metal layers (13-15) and insulating layers (16, 17), which layers are layered alternately one above the other, and can be externally connected, reliable production of the laminate is achieved by virtue of the fact that in order to construct the laminate, the individual metal layers (13-15) and insulating layers (16, 17) are stacked one above the other, are aligned with one another and with respect to the support (11) by means of auxiliary alignment means (18, 19) and are interconnected in the aligned state by techniques such as welding, soldering or bonding.
摘要翻译：在多个子模块（12）布置在公共支撑体（11）上的功率半导体模块（10）的制造方法的情况下，通过由金属层（13- 15）和绝缘层（16,17），这些层交替层叠在一起，并且可以是外部连接的，由于以下事实可以实现层压体的可靠生产：为了构造层压体，单独的金属层叠（13-15）和绝缘层（16,17）彼此层叠，通过辅助对准装置（18,19）彼此对准并且相对于支撑件（11）彼此对准并且互连在通过焊接，焊接或粘合等技术对准状态。

67. 发明授权

US5748456A Power semiconductor module system 失效
标题翻译：功率半导体模块系统
公开(公告)号：US5748456A
公开(公告)日：1998-05-05
申请号：US562453
申请日：1995-11-24
申请人： Reinhold Bayerer
发明人： Reinhold Bayerer
IPC分类号： H01L25/00 , H01L25/07 , H01L25/18 , H05K7/00
CPC分类号： H01L25/18 , H01L25/072 , H01L2924/0002
摘要： A power semiconductor module system includes a plurality of types of power semiconductor modules (310), which each contain one or more controllable power semiconductors (36, 37) and are each accommodated in a module housing (311) with power connections (313-317) and control connections which are passed to the outside, as well as a drive unit (325) for each of the power semiconductor modules (310), which drive unit (325) is accommodated in a separate housing (334) and can be detachably connected to the associated power semiconductor module in such a manner that the drive signals which are passed from the drive unit (325) at appropriate control signal outputs pass to the corresponding control connections of the power semiconductor module, the control connections of the power semiconductor modules (310) each being arranged in a first fixed-position three-dimensional configuration, and the control signal outputs of the drive units (325) each being arranged in a second fixed-position three-dimensional configuration which is superimposed on the first configuration. In the case of such a module system, a reduction is achieved on the drive side for the cost of storage and installation in that the first and second configurations are the same for all the power semiconductor modules (310) and drive units (325) and in that the various power semiconductor modules (310) and drive units (325) are distinguished by different wiring of the control connections and control signal outputs.
摘要翻译：功率半导体模块系统包括多个类型的功率半导体模块（310），每个功率半导体模块（310）包含一个或多个可控功率半导体（36,37），并且各自容纳在具有电力连接的模块外壳（311）中（313-317 ）和传递到外部的控制连接以及用于每个功率半导体模块（310）的驱动单元（325），该驱动单元（325）被容纳在单独的壳体（334）中并且可拆卸地连接到相关联的功率半导体模块，使得以适当的控制信号输出从驱动单元（325）传递的驱动信号传递到功率半导体模块的相应控制连接，功率半导体模块的控制连接（310），每个配置在第一固定位置三维配置中，并且每个驱动单元（325）的控制信号输出被布置在第二固定位置三维配置中，叠加在第一配置上的三维配置。在这种模块系统的情况下，由于第一和第二配置对于所有功率半导体模块（310）和驱动单元（325）和驱动单元（325）和因为通过控制连接和控制信号输出的不同布线来区分各种功率半导体模块（310）和驱动单元（325）。

68. 发明授权

US4766481A Power semiconductor module 失效
标题翻译：功率半导体模块
公开(公告)号：US4766481A
公开(公告)日：1988-08-23
申请号：US925414
申请日：1986-10-31
申请人： Jens Gobrecht , Reinhold Bayerer
发明人： Jens Gobrecht , Reinhold Bayerer
IPC分类号： H01L23/12 , H01L23/538 , H01L25/07 , H01L25/16 , H01L25/18 , H05K1/18 , H01L39/02
CPC分类号： H01L25/162 , H01L23/5383 , H01L24/36 , H01L24/40 , H01L2224/40095 , H01L2224/40225 , H01L2224/45124 , H01L2224/48472 , H01L2224/49109 , H01L2224/49111 , H01L2224/73265 , H01L24/45 , H01L24/49 , H01L2924/01014 , H01L2924/01068 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111
摘要： A power semiconductor module includes a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to the first ceramic bottom plate, a metal foil in the form of a textured metallization located between and directly bonded to the ceramic plates, the second ceramic plate having cutouts formed therein, and assembly elements soldered in the cutouts.
摘要翻译：功率半导体模块包括由第一陶瓷底板，设置在第一陶瓷底板上方并平行于第一陶瓷底板的至少一个第二陶瓷板的多层基板，位于其间并且直接结合的纹理金属化形式的金属箔陶瓷板，其中形成有切口的第二陶瓷板和焊接在切口中的组装元件。

69. 发明申请

US20130094122A1 Low Inductance Capacitor Module and Power System with Low Inductance Capacitor Module 有权
标题翻译：低电感电容模块和低电感电容模块的电力系统
公开(公告)号：US20130094122A1
公开(公告)日：2013-04-18
申请号：US13271491
申请日：2011-10-12
申请人： Daniel Domes , Reinhold Bayerer
发明人： Daniel Domes , Reinhold Bayerer
IPC分类号： H01G4/38 , H05K7/20 , H01G4/12
CPC分类号： H05K7/1432 , H01G2/06 , H01G4/40 , H01L2224/48472
摘要： According to one embodiment of a capacitor module, the capacitor module includes a substrate having a metallization on a first side of the substrate, a plurality of connectors electrically coupled to the metallization and a plurality of capacitors disposed on the metallization. The plurality of capacitors includes a first set of capacitors electrically connected in parallel between a first set of the connectors and a second set of the connectors. The capacitor module further includes a housing enclosing the plurality of capacitors within the capacitor module.
摘要翻译：根据电容器模块的一个实施例，电容器模块包括在衬底的第一侧上具有金属化的衬底，电耦合到金属化的多个连接器和设置在金属化上的多个电容器。多个电容器包括并联电连接在第一组连接器和第二组连接器之间的第一组电容器。电容器模块还包括封装电容器模块内的多个电容器的壳体。

70. 发明授权

US08344764B2 Circuit arrangement including voltage supply circuit 有权
标题翻译：电路布置包括电源电路
公开(公告)号：US08344764B2
公开(公告)日：2013-01-01
申请号：US13359150
申请日：2012-01-26
申请人： Reinhold Bayerer , Peter Kanschat , Uwe Jansen
发明人： Reinhold Bayerer , Peter Kanschat , Uwe Jansen
IPC分类号： H03K3/00
CPC分类号： H03K17/0406
摘要： A circuit arrangement comprising a first semiconductor switching element, which has a load path and a drive terminal. A voltage supply circuit, is provided including an inductance connected in series with the load path of the first semiconductor switching element, and a capacitive charge storage arrangement, which is connected in parallel with the inductance and which has a first and a second output terminal for providing a supply voltage.
摘要翻译：一种电路装置，包括具有负载路径和驱动端子的第一半导体开关元件。提供一种电压供给电路，包括与第一半导体开关元件的负载路径串联连接的电感和与电感并联连接的电容性电荷存储装置，具有第一和第二输出端子，提供电源电压。

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