专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明专利

JPH01202973A HOWLER SIGNAL SENDING CIRCUIT 失效
公开(公告)号：JPH01202973A
公开(公告)日：1989-08-15
申请号：JP2788688
申请日：1988-02-09
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI , SATO MASAFUSA
IPC分类号： H04M19/02
摘要： PURPOSE:To send a howler signal without using a howler sound source requiring high power by providing a resistance attenuator and an amplifier having an amplification factor in matching with the attenuation of the resistance attenuator in a 4-wire reception circuit, disconnecting the resistance attenuator in the transmission of a howler signal and inputting directly an input signal to the amplifier. CONSTITUTION:A signal sent from a network side at usual signal is not changed on a level dia because the attenuation and amplification factor are both equal. In case of howler transmission, a sinusoidal wave signal digitized is inputted from a PCMR of the network as a howler signal by the control from the network side. Then the signal is converted into an analog signal from an A/D conversion circuit 6, a howler transmission switch 11 is started by the control by the network side and the round system of the attenuator 9 is opened, then the attenuation becomes Odb. Since the amplifier 10 of the next stage has a prescribed amplification factor, the sound volume required for howler transmission is sent to the 2-wire side and a howler signal tone is listened to from the receiver of the telephone set and a permanent call is warned to the subscriber.

62. 发明专利

JPH0194795A TIME-DIVISION FEEDING SYSTEM 失效
公开(公告)号：JPH0194795A
公开(公告)日：1989-04-13
申请号：JP25270687
申请日：1987-10-07
申请人： FUJITSU LTD
发明人： SAWANO KAZUHIKO , SHINKAWA HIROSHI , YOSHINO HARUYUKI
IPC分类号： H04Q3/42
摘要： PURPOSE:To scale down a subscriber circuit by providing a time-division switch periodically and time-dividedly charging a capacitor provided to the subscriber circuit in a different phase with the aid of D.C. power source supplied from a common power source part. CONSTITUTION:The time division switch 6i, the capacitor for accumulation 7 and a low-pass filter 8 are respectively provided to the subscriber circuit 20i housing each subscriber. When the control signal (fi) of a logical value zero is inputted, the switch 6i is set to a block state and set to a conductive state when the signal (fi) of the logical value '1' is inputted. The signal (fi) shows the logical value 1 only in a prescribed term (t) with a different phase in a prescribed cycle T0 and shows the logical value zero in the other term. As the result, the D.C. electric power source of -48 volt is time-dividedly fed to the circuit 20i from the common electric power source part 1 in the prescribed term (t) with the different phase every prescribed cycle T0, the capacitor 7 is charged and smoothed by the filter 8.

63. 发明专利

JPS6410732A SIGNAL CONVERSION TRANSMISSION CIRCUIT 失效
公开(公告)号：JPS6410732A
公开(公告)日：1989-01-13
申请号：JP16518587
申请日：1987-07-03
申请人： FUJITSU LTD
发明人： MIYOSHI SEIJI , SATO TAKASHI , SHINKAWA HIROSHI , TAKATO KENJI , SAWANO KAZUHIKO
IPC分类号： H03M5/20
摘要： PURPOSE:To obtain a comparatively simple circuit, capable of converting a binary signal into a quaternary signal and transmitting it by providing a series parallel converting part, an operational amplification circuit and a transmitting part. CONSTITUTION:Two bits of the binary signal are made into one symbol by the series parallel converting part 1, and in the operational amplification circuit 2, when the signal of one side converted into a parallel signal, is 1 and 0, it is considered to be, for instance, a positive polarity signal and a negative polarity signal respectively, and when the signal of the other side is 1 and 0, it is considered to be the signal of 3 level and 1 level respectively. Then, these are synthesized, and when the two bits of the binary signal is 11, it is considered to be the quaternary signal of +3 level, and when 10, 01, and 00, it is considered to be the quaternary signal of +1 level, -1 level and -3 level respectively, and the quaternary signal is transmitted from the transmitting part 3 to a transmission line. Thus, the binary signal can be converted into the quaternary signal and can be transmitted by the simple constitution of the series parallel converting part 1 and the operational amplification circuit 2.

64. 发明专利

JPS6232757A SUBSCRIBER LINE ACCESS SYSTEM 失效
公开(公告)号：JPS6232757A
公开(公告)日：1987-02-12
申请号：JP17149185
申请日：1985-08-03
申请人： FUJITSU LTD
发明人： SHINKAWA HIROSHI
IPC分类号： H04M3/30 , H04M3/06
摘要： PURPOSE:To miniaturize and economize a subscriber circuit by using a set of changeover contact points as the call signal transmission and the subscriber line test in common. CONSTITUTION:When the call signal is transmitted to a telephone set 5, the changeover contact point 16 is caused to intermittently act in synchronization with the action of a common changeover contact point 15. Thus, while the changeover contact point 16 is acting, the call signal from a call signal generator 6 is transmitted to the telephone set 5. When the test of a subscriber line 4 terminated through the telephone set 5 is conducted, the changeover contact point 16 is caused to intermittently act in synchronization with the restoration of the common contact point 15. Thus, while the changeover contact point 16 is acting, a tester 13 is connected to the subscriber line 4, whereby the electrostatic capacity test and inter-line insulation/resistance test on the subscriber line 4 can be possible through the tester 13.

65. 发明专利

JPS61128666A Feed control circuit 失效
标题翻译：进料控制电路
公开(公告)号：JPS61128666A
公开(公告)日：1986-06-16
申请号：JP25087784
申请日：1984-11-28
申请人： Fujitsu Ltd , Nippon Telegr & Teleph Corp
发明人： TAKADA KENZO , SHINKAWA HIROSHI , HAYASHI TOSHIO , KIMURA TADAKATSU
IPC分类号： H04M15/00 , H04M19/00
CPC分类号： H04M19/005
摘要： PURPOSE:To output a normal charging pulse irrespective of circumstances of a subscriber line by providing a current mirror for outputting a control current in proportion to a total current value. CONSTITUTION:In the called state, a load current IL1 in proportion to the control current I1 outputted by the current mirror 3 is supplied in the direction of a terminal A from a terminal B. A feedback current I2 in proportion to the load current IL1 is inputted to the current mirror 21 from a converter 15. A current I7 outputted from the current mirror 21 and the same current I6 are inputted to the current mirror 3 and a changeover switch 25, respectively. When a control signal is inputted to a terminal K1, the current I6 is inputted to the current mirror 6 to increase a current I8 slowly, and a current inputted to the current mirror 3 is decreased to reach a normal value. At the moment when the control signal disappears, said current starts its increasing and reaches the normal value. Accordingly the charging pulse width can maintain a reference value irrespective of circumstances of the subscriber line.
摘要翻译：目的：通过提供与总电流值成比例地输出控制电流的电流镜来输出正常的充电脉冲，而与用户线的情况无关。构成：在被叫状态下，从端子B沿端子A的方向供给与电流镜3输出的控制电流I1成比例的负载电流IL1。与负载电流IL1成比例的反馈电流I2为从转换器15输入到电流镜21.从电流镜21输出的电流I7和相同的电流I6分别输入到电流镜3和转换开关25。当控制信号输入到端子K1时，电流I6被输入到电流镜6，缓慢增加电流I8，并且输入到电流镜3的电流降低到正常值。当控制信号消失时，所述电流开始增加并达到正常值。因此，无论用户线路的情况如何，充电脉冲宽度可以保持参考值。

66. 发明专利

JPH05137166A DIGITAL SIGNAL PROCESSOR FOR SUBSCRIBER CIRCUIT 失效
公开(公告)号：JPH05137166A
公开(公告)日：1993-06-01
申请号：JP10146191
申请日：1991-05-07
申请人： FUJITSU LTD
发明人： YOSHIDA KAZUHIRO , SHINKAWA HIROSHI , SATO MASAFUSA , KURAMOCHI NAOYA
IPC分类号： G06F12/02 , H04Q3/42
摘要： PURPOSE:To provide a digital signal processor(DSP) for subscriber circuit which executes the operation of delay processing or the like with a small number of steps. CONSTITUTION:The DSP is provided with a control part 1 which controls each part, an arithmetic part 6 for arithmetic operation, a ROM 5 where data for operation is stored, a RAM 2 for data storage, an address pointer a indicating the RAM address, and an adder 9 which increases or reduces the value of the address pointer 8. By the RAM address increase/reduction control from the control part 1, the RAM address is designated only with increase/reduction of the value of the address pointer 8.

67. 发明专利

JPH05130651A POLE REVERSING SWITCH CONTROLLER 失效
公开(公告)号：JPH05130651A
公开(公告)日：1993-05-25
申请号：JP29158991
申请日：1991-11-07
申请人： FUJITSU LTD
发明人： SATO MASAFUSA , SHINKAWA HIROSHI , KURAMOCHI NAOYA
IPC分类号： H04M19/00 , H04Q3/42
摘要： PURPOSE:To provide a pole reversing switch control device making it unneces sary to apply a gate turn-off signal as off control order in each inverting a switch in respect of a pole reversing switch control device in a subscriber's line. CONSTITUTION:The pole reversing switch control device is constituted of normal switches 11, 12 respectively using thyristors as switching elements to execute normal feeding, reverse switches 13, 14 respectively using thyristors as switching elements to execute reverse feeding, a feeding circuit 2 for feeding power to the switches 11 to 14, and a control circuit 10 for receiving control order from an exchange and applying a normal feeding switching signal, a reverse feeding switching signal and a forced off signal for forcedly turning off respective switches 11 to 14 to the switches 11 to 14.

68. 发明专利

JPH04336789A ELECTRONIC SUBSCRIBER CIRCUIT 失效
公开(公告)号：JPH04336789A
公开(公告)日：1992-11-24
申请号：JP10785191
申请日：1991-05-14
申请人： FUJITSU LTD
发明人： SATO MASAFUSA , SHINKAWA HIROSHI , KURAMOCHI NAOYA , TAKADA KENZO
IPC分类号： H04M19/00 , H04Q3/42
摘要： PURPOSE:To save current consumption and to make a loop monitoring current in a normal polarity state have the same value as that in a reverse polarity state, as to a subscriber circuit in which current supply to subscriber lines and the subscriber lines are monitored in a switch board. CONSTITUTION:In an electronic subscriber circuit in which the supply of communication current to be fed to subscriber lines 3 from a current supply source 2 and the polarity switching of the supply current are performed by the control of a PNPN switch by switch driving circuit 1, first to fourth PNPN switches (S1 to S4) are provided between the current supply source 2 and the subscriber lines 3, and the respective PNPN switches are constructed so that a P gate can be driven between the positive potential of the current supply source and the first line of the subscriber lines, that an N gate can be driven between the negative potential of the current supply source and the second line of the subscriber lines, that the P gate can be driven between the positive potential of the current supply source and the second line of the subscriber lines and the N gate is driven between the negative potential of the current supply source and the first line of the ssubscriber lines.

69. 发明专利

JPH0389620A ANALOG SWITCHING CIRCUIT 失效
公开(公告)号：JPH0389620A
公开(公告)日：1991-04-15
申请号：JP22588789
申请日：1989-08-31
申请人： FUJITSU LTD
发明人： TOJO TOSHIRO , SHINKAWA HIROSHI , TAKADA KENZO , KOSAKO TAICHI
IPC分类号： H03K17/00 , H04Q3/42
摘要： PURPOSE:To realize an analog switch which is economical and requires less space by inputting an analog signal to the inverted input terminal of an operational amplifier, and connecting a DC voltage and the output of a control switch to the non-inverted input terminal. CONSTITUTION:When 0V is inputted as the turn-off signal to a control signal terminal 15, a transistor TR 12 is turned off and the output to a non-inverted input terminal 11b of an operational amplifier 11 is stopped, and therefore, +5V of a DC voltage 14 is inputted to the non-inverted input terminal 11b. Then, the operational amplifier 11 does not output the signal inputted to an inverted input terminal 11a. Consequently, the analog output signal is not supplied to an output terminal 16. That is, this analog switch circuit turns on/off the analog signal by the control signal inputted to the control signal terminal 15. Since this analog switch circuit is inexpensively constituted and the required mounting space is small, it is suitable for miniaturization of a device.

70. 发明专利

JPH02104160A POWER SUPPLY SYSTEM CONVERTING CIRCUIT 失效
公开(公告)号：JPH02104160A
公开(公告)日：1990-04-17
申请号：JP25774188
申请日：1988-10-13
申请人： FUJITSU LTD
发明人： SATO MASAFUSA , SHINKAWA HIROSHI
IPC分类号： H04M19/08
摘要： PURPOSE:To suppress a current value when a subscriber's loop resistance is small by connecting the base side of an n-type Darlington transistor(TR) to the negative side of a Zener diode, connecting the base side of a p-type Darlington TR to the positive side of a Zener diode and controlling the upper limit value of a calling current value flowing between respective terminals. CONSTITUTION:In a circuit connected between subscriber's circuit side connecting terminals A, B and terminal equipment side connecting terminals A', B', an n-type Darlington TR 1, a Zener diode 3, a low resistor 5, and a high resistor 7 are connected between the terminals A' and A and a p-type Darlington TR 2, a Zener diode 4, a low resistor 6, and a high resistor 8 are connected between the terminals B' and B. The base side of the TR 1 is connected to the negative side of the diode 3, the base side of the TR 2 is connected to the positive side of the diode 4 and the upper limit of a calling current value flowing between the terminals B, B' and A', A is controlled. Thus, a loop current at the time of low loop resistance can be restricted.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式