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    • 61. 发明申请
    • Control circuit of DC-DC converter and its control method
    • DC-DC转换器的控制电路及其控制方法
    • US20050285579A1
    • 2005-12-29
    • US10973257
    • 2004-10-27
    • Katsuyuki YasukouchiHidenobu Ito
    • Katsuyuki YasukouchiHidenobu Ito
    • H02M3/155G05F1/40H02M3/158
    • H02M3/1588H02M2001/0032Y02B70/1466Y02B70/16
    • In a DC-DC converter of synchronous rectifying system, a control circuit of DC-DC converter capable of improving the control voltage value of output voltage at light load and enhancing the power conversion efficiency, and its control method are presented. An inverting input terminal of comparator COMP2 of which non-inverting input terminal is connected to a grounding potential is connected to one terminal of choke coil L1 by way of terminal (X). An output terminal (N1) of comparator COMP2 is connected to a delay circuit DL, and an output terminal (N2) of delay circuit DL is connected to AND gate circuit AND1. The delay circuit DL is a circuit for delaying the transition from high level to low level of input terminal (N1). Excessive power supplied more than demanded by the load at light load is returned to choke coil L1. Elevation of output voltage VOUT due to excess power accumulated in output capacitor C1 can be suppressed.
    • 在同步整流系统的DC-DC转换器中,提出了一种能够提高轻载输出电压控制电压值,提高功率转换效率的DC-DC转换器控制电路及其控制方法。 通过端子(X)将同相输入端子连接到接地电位的比较器COMP 2的反相输入端子连接到扼流线圈L 1的一端。 比较器COMP2的输出端(N1)连接到延迟电路DL,并且延迟电路DL的输出端(N 2)连接到与门电路AND 1。 延迟电路DL是用于延迟从高电平到低电平的输入端子(N 1)的转换的电路。 在负载较轻的情况下供电超过供电的功率过大返回扼流圈L1。 可以抑制由于在输出电容器C 1中蓄积的过剩功率而导致的输出电压VOUT的升高。
    • 64. 发明授权
    • Operational amplifier
    • 运算放大器
    • US6163217A
    • 2000-12-19
    • US292935
    • 1999-04-16
    • Kunihiro MatsubaraHidenobu ItoShinichi Nakagawa
    • Kunihiro MatsubaraHidenobu ItoShinichi Nakagawa
    • H03F1/32H03F1/34H03F3/30H03F3/45
    • H03F3/3023H03F3/45183H03F2203/30021H03F2203/30036H03F2203/45508H03F2203/45658
    • A current charged into or discharged from a phase-compensating capacitor C1 in an output circuit is controlled by a level shift circuit so that the current is kept constant for input signals inputted to the input terminals IN+ and IN- of a differential amplifier circuit, and also a current charged into or discharged from a phase-compensating capacitor C2 is controlled by the current correcting circuit so that the current become equal to a constant current controlled by the level shift circuit, namely to a current charged into or discharged from the phase-compensating capacitor C1. Therefore, even if a quickly rising or falling signal is inputted into the differential amplifier circuit, the MOS transistor MP11 or MN11 is not set in an offset state, which prevents generation of an overshoot or an undershot in the output terminal.
    • 通过电平移位电路来控制在输出电路中充入或从相位补偿电容器C1放电的电流,使得电流对于输入到差分放大器电路的输入端IN +和IN-的输入信号保持恒定,以及 另外,由电流校正电路控制充电到相位补偿电容器C2的放电电流,也可以由电平移位电路控制的电流变为等于从相位补偿电容器C2充放电的电流, 补偿电容器C1。 因此,即使快速上升或下降信号被输入到差分放大器电路中,MOS晶体管MP11或MN11也不被设置在偏移状态,这防止了在输出端子中产生过冲或欠压。
    • 65. 发明授权
    • Electronic circuit having comparator
    • 电子电路有比较器
    • US5548162A
    • 1996-08-20
    • US392300
    • 1995-02-22
    • Hidenobu ItoKatsuya ShimizuKenzo HashikawaYasuhiro Yamakawa
    • Hidenobu ItoKatsuya ShimizuKenzo HashikawaYasuhiro Yamakawa
    • H03K5/02G01R19/165H03K19/0175G01R19/00
    • G01R19/16576
    • An electronic circuit comprising a comparator which is operated by a first power source voltage and having first and second input terminals, where the first input terminal is supplied with a reference voltage which is dependent on the first power source voltage, a detecting circuit for detecting a deviation of a second power source voltage and for outputting a control signal dependent on the deviation, where the first and second power source voltages undergo mutually independent deviations, and a voltage converting circuit supplied with an input signal for converting a voltage of the input signal depending on the control signal received from the detecting circuit. The voltage converting circuit supplies the input signal to the second input terminal of the comparator which outputs an error signal indicative of an error between the input signal voltage and the reference voltage.
    • 一种电子电路,包括由第一电源电压操作并具有第一和第二输入端的比较器,其中第一输入端被提供有取决于第一电源电压的参考电压,检测电路用于检测 第二电源电压的偏差和用于输出取决于第一和第二电源电压经历相互独立偏差的偏差的控制信号,以及电压转换电路,其被提供有用于将输入信号的电压变换为相应的输入信号 关于从检测电路接收的控制信号。 电压转换电路将输入信号提供给比较器的第二输入端,该第二输入端输出表示输入信号电压和参考电压之间的误差的误差信号。
    • 66. 发明授权
    • DC-DC converter
    • DC-DC转换器
    • US5502629A
    • 1996-03-26
    • US412112
    • 1995-03-28
    • Hidenobu ItoHiroko Mizuno
    • Hidenobu ItoHiroko Mizuno
    • H02M3/07H02M3/18
    • H02M3/07H03K2217/0018
    • A DC-DC converter includes first and second MOS transistors which selectively connect a first capacitor to a DC power supply so as to charge the first capacitor, and third and fourth MOS transistors which selectively connect the first capacitor to a second capacitor so as to charge the second capacitor by electric charges stored in the first capacitor. A predetermined output voltage is produced at a lead of the second capacitor serving as an output terminal, based on the charge/discharge operations of the first and second capacitors in response to the switching operations of the four MOS transistors. A variable voltage is applied to a back gate of one MOS transistor selected from the first to fourth MOS transistors. When the selected MOS transistor is on, a first control transistor in the converter forms a connection between a source and a back gate of the selected MOS transistor, to reduce the resistance value of the selected MOS transistor when turned on. When the selected MOS transistor is off, a second control transistor in the converter applies a voltage, selected from the predetermined output voltage and the supply voltages of the first and second DC power supplies, to the back gate of the selected MOS transistor. This prevents a parasitic bipolar transistor, inherently formed in the selected MOS transistor, from turning on.
    • DC-DC转换器包括第一和第二MOS晶体管,其选择性地将第一电容器连接到DC电源以对第一电容器充电;以及第三和第四MOS晶体管,其选择性地将第一电容器连接到第二电容器以便充电 所述第二电容器通过存储在所述第一电容器中的电荷。 基于四个MOS晶体管的开关操作,基于第一和第二电容器的充电/放电操作,在作为输出端子的第二电容器的引线处产生预定的输出电压。 将可变电压施加到从第一至第四MOS晶体管选择的一个MOS晶体管的背栅极。 当所选择的MOS晶体管导通时,转换器中的第一控制晶体管形成所选择的MOS晶体管的源极和后栅极之间的连接,以便在导通时降低所选择的MOS晶体管的电阻值。 当所选择的MOS晶体管截止时,转换器中的第二控制晶体管将从预定输出电压和第一和第二直流电源的电源电压中选择的电压施加到所选择的MOS晶体管的背栅极。 这防止了所选MOS晶体管中固有地形成的寄生双极晶体管导通。