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    • 62. 发明授权
    • Allocating rename register from separate register sets for each result data of multiple data processing instruction
    • 为多个数据处理指令的每个结果数据,从单独的寄存器集分配重命名寄存器
    • US08438366B2
    • 2013-05-07
    • US12805476
    • 2010-08-02
    • Yasunobu AkizukiToshio Yoshida
    • Yasunobu AkizukiToshio Yoshida
    • G06F9/345
    • G06F9/30036G06F9/30112G06F9/3012G06F9/3013G06F9/384G06F9/3857G06F9/3885G06F9/3891
    • Multiple data processing instructions instruct a computing device to process multiple data including first data and second data. When a multiple data processing instruction is decoded, two allocatable registers are selected. One is used to store the result of a processing operation performed on first data by one processing unit, and the other is used to store the result of a processing operation performed on second data by another processing unit. Those stored processing results are then transferred to result registers. Normal data processing instructions, on the other hand, instruct a processing operation on third data. When a normal data processing instruction is decoded, one allocatable register is selected and used to store the result of processing that a processing unit performs on the third data. The stored processing result is then transferred to a result register.
    • 多个数据处理指令指示计算设备处理包括第一数据和第二数据的多个数据。 当多重数据处理指令被解码时,选择两个可分配寄存器。 一个用于存储由一个处理单元对第一数据执行的处理操作的结果,另一个用于存储由另一处理单元对第二数据执行的处理操作的结果。 然后将那些存储的处理结果传送到结果寄存器。 另一方面,正常数据处理指令指示关于第三数据的处理操作。 当正常数据处理指令被解码时,选择一个可分配寄存器并用于存储处理单元对第三数据执行的处理结果。 然后将存储的处理结果传送到结果寄存器。
    • 66. 发明授权
    • Adjusting voltage provided by battery within portable electronic device
    • 在便携式电子设备内调整电池提供的电压
    • US08115327B2
    • 2012-02-14
    • US12447085
    • 2007-08-30
    • Tomonari YomodaToshio Yoshida
    • Tomonari YomodaToshio Yoshida
    • F03B13/00
    • H02J7/32H04M1/021H04M1/21Y02B40/90
    • There is provided a portable electronic device capable of being immediately operated without the use of a battery even when the battery reaches exhaustion. An electricity generating unit 131 is embedded in the portable electronic device. The electricity generating unit 131 has a mechanism to pull out a pull line 113 wound around a pulley 135 to wind up a spiral spring 133 and a mechanism to transfer torque occurring when the spiral spring 133 is released and to rotate the motor at high speed. An output voltage from the motor 142 is adjusted and smoothed by a constant voltage circuit and is directly supplied as power to power consuming components. The portable electronic device connecting two flips can wind up the spiral spring 133 by opening and closing the two flips.
    • 提供了即使在电池耗尽时也能立即使用电池而不使用电池的便携式电子设备。 发电单元131嵌入在便携式电子设备中。 发电单元131具有拉出缠绕在滑轮135上的拉线113以卷起螺旋弹簧133的机构,以及用于传递当螺旋弹簧133被释放时发生的扭矩并且使马达高速旋转的机构。 来自电动机142的输出电压由恒定电压电路调节和平滑,并且直接作为功率供应给功率消耗部件。 连接两个翻转件的便携式电子设备可以通过打开和关闭两个翻转来卷起螺旋弹簧133。
    • 67. 发明授权
    • Information processing apparatus and method of controlling register
    • 信息处理装置和控制寄存器的方法
    • US08019973B2
    • 2011-09-13
    • US12638764
    • 2009-12-15
    • Takashi SuzukiToshio Yoshida
    • Takashi SuzukiToshio Yoshida
    • G06F9/312G06F9/52
    • G06F9/3885G06F9/30127G06F9/3824G06F9/3851
    • An information processing apparatus and a method of controlling the same that employs a register window system and a Simultaneous Multithreading method for reducing circuit areas by sharing a data transfer bus between threads, said bus connecting a master register and a work register provided for each thread and for avoiding interference in instruction execution with other threads caused by a conflict between accesses to a register between threads. An information processing apparatus and a method of controlling the information processing apparatus employing a register window system for register reading, in which a master register and a work register are held for each thread and a bus for transferring data from the master to the work register is shared by threads in order to realize Simultaneous Multithreading.
    • 一种信息处理装置及其控制方法,其采用寄存器窗口系统和同时多线程方法,用于通过在线程之间共享数据传输总线来减少电路面积,所述总线连接主寄存器和为每个线程提供的工作寄存器, 用于避免在对线程之间的寄存器的访问之间的冲突引起的与其他线程的指令执行的干扰。 一种信息处理设备和方法,用于控制信息处理设备,该信息处理设备采用用于寄存器读取的寄存器窗口系统,其中为每个线程保持主寄存器和工作寄存器,并且用于将数据从主器件传送到工作寄存器的总线是 由线程共享,以实现同时多线程。
    • 68. 发明申请
    • Instruction control apparatus and instruction control method
    • 指令控制装置及指令控制方法
    • US20100100709A1
    • 2010-04-22
    • US12654262
    • 2009-12-15
    • Toshio Yoshida
    • Toshio Yoshida
    • G06F9/312G06F9/30G06F9/38
    • G06F9/3851G06F9/3802G06F9/3857G06F9/3859
    • In a CPU having a SMT function of executing plural threads composed of a series of instructions representing processing, there are provided a decode section for decoding processing represented by instructions of plural threads, an instruction buffer for obtaining instructions from a thread and holding the instructions, and inputting the held instructions to the decode section in order in the thread, and an execution pipeline for executing processing of instructions decoded by the decode section. The decode section checks whether or not an executable condition is ready for an instruction when the instruction is decoded and requests that the instructions held in the instruction buffer and an instruction subsequent to an instruction that is not ready with an executable condition are inputted again to the decode section.
    • 在具有执行由表示处理的一系列指令构成的多个线程的SMT功能的CPU中,提供了一种用于解码由多个线程的指令表示的处理的解码部分,用于从线程获取指令并保持指令的指令缓冲器, 以及在所述线程中按顺序将所保持的指令输入到所述解码部分,以及用于执行由所述解码部件解码的指令的处理的执行流水线。 解码部分在指令被解码时检查可执行条件是否准备好用于指令,并且请求将保持在指令缓冲器中的指令和未准备好可执行条件的指令之后的指令再次输入到 解码部分。
    • 69. 发明申请
    • INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING REGISTER
    • 信息处理装置和控制寄存器的方法
    • US20100095093A1
    • 2010-04-15
    • US12638764
    • 2009-12-15
    • Takashi SUZUKIToshio Yoshida
    • Takashi SUZUKIToshio Yoshida
    • G06F9/30
    • G06F9/3885G06F9/30127G06F9/3824G06F9/3851
    • An information processing apparatus and a method of controlling the same that employs a register window system and a Simultaneous Multithreading method for reducing circuit areas by sharing a data transfer bus between threads, said bus connecting a master register and a work register provided for each thread and for avoiding interference in instruction execution with other threads caused by a conflict between accesses to a register between threads. An information processing apparatus and a method of controlling the information processing apparatus employing a register window system for register reading, in which a master register and a work register are held for each thread and a bus for transferring data from the master to the work register is shared by threads in order to realize Simultaneous Multithreading.
    • 一种信息处理装置及其控制方法,其采用寄存器窗口系统和同时多线程方法,用于通过在线程之间共享数据传输总线来减少电路面积,所述总线连接主寄存器和为每个线程提供的工作寄存器, 用于避免在对线程之间的寄存器的访问之间的冲突引起的与其他线程的指令执行的干扰。 一种信息处理设备和方法,用于控制信息处理设备,该信息处理设备采用用于寄存器读取的寄存器窗口系统,其中为每个线程保持主寄存器和工作寄存器,并且用于将数据从主器件传送到工作寄存器的总线是 由线程共享,以实现同时多线程。