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61. 发明授权

US5581577A Device for and method of counting bit errors and device for and method of identifying signals 失效
标题翻译：用于计数位错误的装置和方法以及用于识别信号的装置和方法
公开(公告)号：US5581577A
公开(公告)日：1996-12-03
申请号：US196258
申请日：1994-02-16
申请人： Masami Abe
发明人： Masami Abe
IPC分类号： H03M13/00 , H03M13/23 , H03M13/41 , H04L1/20 , H04B3/46 , H04B17/00
CPC分类号： H04L1/208 , H03M13/00 , H03M13/23 , H03M13/3961 , H03M13/41 , H04L1/20
摘要： A bit error counter for a digital communication system has transmitter and receiver. The transmitter includes circuitry for convolution encoding of an input original signal and outputting a transmission signal. The receiver includes error correcting/decoding circuitry for inputting a reception signal corresponding to the transmission signal and outputting a decoded signal, and when an overflow occurs, for outputting an overflow signal. State monitoring circuitry is provided for receiving the overflow signal and issuing a switching instruction signal to a switch only when the overflow signal is received. The switch also receives the decoded signal and outputs at least one of a bit error rate or a number of errors when the switching instruction signal is received. The switch outputs the decoded signal when the switching instruction signal is not received. Re-encoding circuitry receives the decoded signal from the switch and outputs a re-encoded signal by subjecting the decoded signal to the same encoding as that of the reception signal. A comparator receives the re-encoded signal and a delayed reception signal, and outputs the bit error rate and the number of errors.
摘要翻译： PCT No.PCT / JP93 / 00831 Sec。 371日期：1994年2月16日 102（e）日期1994年2月16日PCT提交1993年6月21日PCT公布。第WO94 / 00915号公报日期1994年1月6日数字通信系统的位错误计数器有发送器和接收器。发射机包括用于对输入原始信号进行卷积编码并输出发送信号的电路。接收机包括用于输入与发送信号相对应的接收信号并输出解码信号的纠错/解码电路，当发生溢出时，输出溢出信号。提供状态监视电路，用于接收溢出信号，并且仅当接收到溢出信号时才向开关发出切换指令信号。当接收到切换指令信号时，开关还接收解码信号并输出误码率或错误数目中的至少一个。当未接收到切换指令信号时，开关输出解码信号。重新编码电路从开关接收解码信号，通过对解码信号进行与接收信号相同的编码来输出重新编码的信号。比较器接收重新编码的信号和延迟的接收信号，并输出误码率和误码数。

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