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61. 发明授权

US08320158B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08320158B2
公开(公告)日：2012-11-27
申请号：US12882685
申请日：2010-09-15
申请人： Hiroshi Kanno , Reika Ichihara , Takayuki Tsukamoto , Kenichi Murooka , Hirofumi Inoue
发明人： Hiroshi Kanno , Reika Ichihara , Takayuki Tsukamoto , Kenichi Murooka , Hirofumi Inoue
IPC分类号： G11C11/00
CPC分类号： G11C7/02 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C13/0064 , G11C13/0097 , G11C2213/31 , G11C2213/71 , G11C2213/72
摘要： Nonvolatile semiconductor memory device of an embodiment includes: a memory cell array including a plurality of first and second lines intersecting each other and plural memory cells provided at intersections of the first and second lines and having data written and erased upon application of voltages of the same polarity; and a writing circuit configured to select first and second lines and supply a set or reset pulse to the memory cell through the selected first and second lines. In an erase operation, the writing circuit repeatedly supplies the reset pulse to a selected memory cell until data is erased, by increasing or decreasing voltage level and voltage application time of the reset pulse within a reset region. The reset region, or an aggregate of combinations of voltage level and voltage application time of the reset pulse, is a region where voltage level and voltage application time are negatively correlated.
摘要翻译：一个实施例的非易失性半导体存储器件包括：存储单元阵列，包括彼此相交的多个第一和第二线，以及设置在第一和第二线的交点处的多个存储单元，并且在施加相同的电压时写入和擦除数据极性; 以及写入电路，被配置为选择第一和第二行，并且通过所选择的第一和第二行向存储器单元提供置位或复位脉冲。在擦除操作中，写入电路通过增加或减小复位区域内的复位脉冲的电压电平和电压施加时间，将复位脉冲重复地提供给所选择的存储单元，直到数据被擦除。复位区域或复位脉冲的电压电平和电压施加时间的组合的总和是电压电平和电压施加时间呈负相关的区域。

62. 发明申请

US20100237314A1 RESISTANCE CHANGE TYPE MEMORY 有权
标题翻译：电阻变化型存储器
公开(公告)号：US20100237314A1
公开(公告)日：2010-09-23
申请号：US12563470
申请日：2009-09-21
申请人： Takayuki Tsukamoto , Reika Ichihara , Hiroshi Kanno , Kenichi Murooka
发明人： Takayuki Tsukamoto , Reika Ichihara , Hiroshi Kanno , Kenichi Murooka
IPC分类号： H01L27/10 , H01L45/00
CPC分类号： G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C2213/72 , H01L27/101 , H01L27/2409 , H01L27/2481
摘要： A resistance change type memory of an aspect of the present invention including a first wiring configured to extend in a first direction, a second wiring configured to extend in a second direction crossing the first direction, a series circuit configured to connect to the first and second wirings, the series circuit including a non-ohmic element being more conductive in the first to second wiring direction than in the second to first direction and a resistance change type storage element in which data is stored according to a change of a resistance state, an energy supplying circuit configured to connect to the first wiring to supply energy to the first wiring, the energy being used to store the data in the resistance change type storage element, and a capacitance circuit configured to include a capacitive element and being connected to the second wiring.
摘要翻译：本发明的一个方面的电阻变化型存储器包括：构造成沿第一方向延伸的第一布线，沿与第一方向交叉的第二方向延伸的第二布线;串联电路，被配置为连接到第一和第二端布线，包括在第一至第二布线方向上比在第二至第一方向上更加导电的非欧姆元件的串联电路和根据电阻状态的变化存储数据的电阻变化型存储元件，能量供给电路，被配置为连接到所述第一布线以向所述第一布线供应能量，所述能量用于将所述数据存储在所述电阻变化型存储元件中;以及电容电路，被配置为包括电容元件并连接到所述第二布线接线。

63. 发明授权

US09406882B2 Nonvolatile resistance change element 有权
标题翻译：非易失性电阻变化元件
公开(公告)号：US09406882B2
公开(公告)日：2016-08-02
申请号：US13603718
申请日：2012-09-05
申请人： Shosuke Fujii , Hidenori Miyagawa , Reika Ichihara
发明人： Shosuke Fujii , Hidenori Miyagawa , Reika Ichihara
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/145 , H01L27/2472 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/148
摘要： According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode, a first layer and a second layer. The second electrode contains at least one metal element selected from Ag, Cu, Ni, Co, Al, and Ti. The first layer is arranged between the first electrode and the second electrode. The second layer is arranged between the first electrode and the first layer. A diffusion coefficient of the metal element in the second layer is larger than a diffusion coefficient of the metal element in the first layer.
摘要翻译：根据一个实施例，非易失性电阻变化元件包括第一电极，第二电极，第一层和第二层。第二电极含有选自Ag，Cu，Ni，Co，Al和Ti中的至少一种金属元素。第一层布置在第一电极和第二电极之间。第二层布置在第一电极和第一层之间。金属元素在第二层中的扩散系数大于第一层中的金属元素的扩散系数。

64. 发明授权

US08804401B2 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08804401B2
公开(公告)日：2014-08-12
申请号：US13601570
申请日：2012-08-31
申请人： Kikuko Sugimae , Reika Ichihara
发明人： Kikuko Sugimae , Reika Ichihara
IPC分类号： G11C11/00
CPC分类号： G11C13/0002 , G11C13/0011 , G11C13/0064 , G11C13/0069 , G11C2213/71 , G11C2213/73
摘要： A non-volatile semiconductor memory device includes a cell array layer including a first wire, a memory cell, and a second wire, and a control circuit. When performing set operation for setting the memory cell to a low resistance state, until a resistance value of the memory cell becomes lower than a predetermined resistance value, the control circuit repeating: applying a first voltage for setting to the memory cell; and a verify read verifying that the resistance value of the memory cell has become lower than the predetermined resistance value. After the verify read, the control circuit applies a second voltage having a different polarity from the first voltage to the memory cell before applying the first voltage that follows.
摘要翻译：非挥发性半导体存储器件包括包括第一布线，存储单元和第二布线的单元阵列层以及控制电路。当进行用于将存储单元设置为低电阻状态的设定操作，直到存储单元的电阻值变得低于预定电阻值为止，控制电路重复：向存储单元施加用于设置的第一电压; 以及验证存储单元的电阻值已经变得低于预定电阻值的验证读取。在验证读取之后，控制电路在施加随后的第一电压之后，将具有与第一电压不同的极性的第二电压施加到存储单元。

65. 发明授权

US08274815B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08274815B2
公开(公告)日：2012-09-25
申请号：US12886931
申请日：2010-09-21
申请人： Reika Ichihara , Takayuki Tsukamoto
发明人： Reika Ichihara , Takayuki Tsukamoto
IPC分类号： G11C11/00
CPC分类号： G11C11/00 , G11C2013/0083
摘要： A nonvolatile semiconductor memory device in accordance with an embodiment comprises a plurality of first, second lines, a plurality of memory cells, and a control circuit. The plurality of second lines extend so as to intersect the first lines. The plurality of memory cells are disposed at intersections of the first, second lines, and each includes a variable resistor. The control circuit is configured to control a voltage applied to the memory cells. The control circuit applies a first pulse voltage to the variable resistor during a forming operation. In addition, the control circuit applies a second pulse voltage to the variable resistor during a setting operation, the second pulse voltage having a polarity opposite to the first pulse voltage. Furthermore, the control circuit applies a third pulse voltage to the variable resistor during a resetting operation, the third pulse voltage having a polarity identical to the first pulse voltage.
摘要翻译：根据实施例的非易失性半导体存储器件包括多个第一，第二线，多个存储单元和控制电路。多个第二线延伸以与第一线相交。多个存储单元设置在第一和第二线的交点处，并且每个都包括可变电阻器。控制电路被配置为控制施加到存储器单元的电压。控制电路在成形操作期间向可变电阻器施加第一脉冲电压。此外，控制电路在设定操作期间向可变电阻施加第二脉冲电压，第二脉冲电压具有与第一脉冲电压相反的极性。此外，控制电路在复位操作期间向可变电阻器施加第三脉冲电压，第三脉冲电压具有与第一脉冲电压相同的极性。

66. 发明申请

US20120228576A1 STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：存储装置及其制造方法
公开(公告)号：US20120228576A1
公开(公告)日：2012-09-13
申请号：US13236793
申请日：2011-09-20
申请人： Koji Asakawa , Shigeki Hattori , Hideyuki Nishizawa , Satoshi Mikoshiba , Reika Ichihara , Masaya Terai
发明人： Koji Asakawa , Shigeki Hattori , Hideyuki Nishizawa , Satoshi Mikoshiba , Reika Ichihara , Masaya Terai
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L51/0591 , G11C13/0014 , G11C13/003 , G11C2213/72 , G11C2213/73 , G11C2213/77
摘要： A storage device includes: a plurality of first electrode wirings; a plurality of second electrode wirings which cross the first electrode wirings; a via plug which is formed between the second electrode wiring and the two adjacent first electrode wirings, and in which a maximum diameter of a bottom surface opposing the first electrode wirings in a direction vertical to a direction in which the first electrode wirings stretch is smaller than a length corresponding to a pitch of the first electrode wiring plus a width of the first electrode wirings; a first storage element which is formed between the via plug and one of the two first electrode wirings; and a second storage element which is formed between the via plug and the other one of the two first electrode wirings.
摘要翻译：存储装置包括：多个第一电极布线; 与第一电极布线交叉的多个第二电极布线; 形成在所述第二电极布线和所述两个相邻的第一电极布线之间的通孔塞，其中与所述第一电极布线相反的方向上的与所述第一电极相对的底面的最大直径在与所述第一电极布线拉伸的方向垂直的方向上布线的最大直径较小比对应于第一电极布线的间距加上第一电极布线的宽度的长度; 第一存储元件，其形成在所述通孔插头和所述两个第一电极布线中的一个之间; 以及第二存储元件，其形成在所述通孔插头和所述两个第一电极布线中的另一个之间。

67. 发明申请

US20110026299A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DATA WRITE/DATA ERASE THEREIN 有权
标题翻译：非易失性半导体存储器件及数据写入/数据擦除方法
公开(公告)号：US20110026299A1
公开(公告)日：2011-02-03
申请号：US12713667
申请日：2010-02-26
申请人： Hiroshi Kanno , Reika Ichihara , Takayuki Tsukamoto , Kenichi Murooka
发明人： Hiroshi Kanno , Reika Ichihara , Takayuki Tsukamoto , Kenichi Murooka
IPC分类号： G11C11/00 , G11C5/14 , G11C7/00
CPC分类号： G11C5/025 , G11C13/0007 , G11C13/003 , G11C13/0061 , G11C13/0069 , G11C13/0097 , G11C2013/0073 , G11C2213/71 , G11C2213/72 , G11C2213/74 , G11C2213/76
摘要： A nonvolatile semiconductor memory device comprises: a plurality of first lines; a plurality of second lines; a plurality of memory cells each disposed at each of crossing-points of the first lines and the second lines and each comprising a variable resistor and a bi-directional diode; and a voltage control circuit configured to control a voltage of selected one of the first lines, unselected ones of the first lines, selected one of the second lines, and unselected ones of the second lines, respectively. The variable resistor is configured to change its resistance value depending on a polarity of a voltage applied thereto. The voltage control circuit is configured to apply a voltage pulse to the selected one of the first lines and to connect a capacitor of a certain capacitance to one end of the selected one of the second lines.
摘要翻译：非易失性半导体存储器件包括：多条第一线; 多条第二线; 多个存储单元，每个存储单元分别设置在第一线和第二线的交叉点的每一个处，并且每个存储单元包括可变电阻器和双向二极管; 以及电压控制电路，被配置为分别控制所选择的第一行，未选择的第一行，所选择的第二行和未选择的第二行中的一个的电压。可变电阻器被配置为根据施加到其的电压的极性来改变其电阻值。电压控制电路被配置为向所选择的第一线中的一个施加电压脉冲，并且将一定电容的电容器连接到所选择的一条第二线路的一端。

68. 发明授权

US09105838B2 Nonvolatile variable resistive device 有权
标题翻译：非易失性可变电阻器件
公开(公告)号：US09105838B2
公开(公告)日：2015-08-11
申请号：US13228753
申请日：2011-09-09
申请人： Takashi Haimoto , Reika Ichihara , Haruka Kusai
发明人： Takashi Haimoto , Reika Ichihara , Haruka Kusai
IPC分类号： G11C11/00 , H01L45/00 , G11C11/56 , G11C13/00 , H01L27/24
CPC分类号： H01L45/085 , G11C11/5614 , G11C13/0011 , H01L27/2436 , H01L27/2463 , H01L45/1233 , H01L45/1266 , H01L45/148
摘要： According to one embodiment, a first electrode includes a metal element. A second electrode includes a semiconductor element. A third electrode includes a metal element. A first variable resistive layer is arranged between the first electrode and the second electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the first electrode. A second variable resistive layer is arranged between the second electrode and the third electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the third electrode.
摘要翻译：根据一个实施例，第一电极包括金属元件。第二电极包括半导体元件。第三电极包括金属元件。第一可变电阻层布置在第一电极和第二电极之间，并且能够通过灯丝形成和第一电极的金属元件的溶解来可逆地改变电阻。第二可变电阻层布置在第二电极和第三电极之间，并且能够通过灯丝形成和第三电极的金属元件的溶解来可逆地改变电阻。

69. 发明授权

US08610101B2 Nonvolatile variable resistance element having a variable resistive layer disposed between first and second electrodes 有权
标题翻译：具有设置在第一和第二电极之间的可变电阻层的非易失性可变电阻元件
公开(公告)号：US08610101B2
公开(公告)日：2013-12-17
申请号：US13359880
申请日：2012-01-27
申请人： Takashi Yamauchi , Shosuke Fujii , Reika Ichihara
发明人： Takashi Yamauchi , Shosuke Fujii , Reika Ichihara
IPC分类号： H01L29/02
CPC分类号： H01L45/085 , H01L27/2463 , H01L45/1266 , H01L45/148
摘要： According to one embodiment, there are provided a first electrode, a second electrode containing a 1B group element having an Al element added thereto, and a variable resistive layer disposed between the first electrode and the second electrode and having a silicon element.
摘要翻译：根据一个实施例，提供了第一电极，包含添加有Al元素的1B族元素的第二电极和设置在第一电极和第二电极之间并具有硅元素的可变电阻层。

70. 发明申请

US20130234097A1 NONVOLATILE RESISTANCE CHANGE ELEMENT 有权
标题翻译：非易失性电阻变化元件
公开(公告)号：US20130234097A1
公开(公告)日：2013-09-12
申请号：US13603718
申请日：2012-09-05
申请人： Shosuke FUJII , Hidenori Miyagawa , Reika Ichihara
发明人： Shosuke FUJII , Hidenori Miyagawa , Reika Ichihara
IPC分类号： H01L45/00
CPC分类号： H01L45/145 , H01L27/2472 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/148
摘要： According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode, a first layer and a second layer. The second electrode contains at least one metal element selected from Ag, Cu, Ni, Co, Al, and Ti. The first layer is arranged between the first electrode and the second electrode. The second layer is arranged between the first electrode and the first layer. A diffusion coefficient of the metal element in the second layer is larger than a diffusion coefficient of the metal element in the first layer.
摘要翻译：根据一个实施例，非易失性电阻变化元件包括第一电极，第二电极，第一层和第二层。第二电极含有选自Ag，Cu，Ni，Co，Al和Ti中的至少一种金属元素。第一层布置在第一电极和第二电极之间。第二层布置在第一电极和第一层之间。金属元素在第二层中的扩散系数大于第一层中的金属元素的扩散系数。

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